TLE 8110 EE Smart Multichannel Low Side Switch with Parallel Control and SPI Interface coreFLEX TLE8110EE Data Sheet Rev. 1.4, 2013-07-02 Automotive Power TLE 8110 EE Smart Multichannel Switch Table of Content Table of Content 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 3.1 3.2 3.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 4.1 4.2 4.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Description Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Electrical Characteristics Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 6.1 6.2 Reset and Enable Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Description Reset and Enable Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical Characteristics Reset Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 7.1 7.2 7.3 7.4 Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description of the Clamping Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parallel Connection of the Power Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 20 21 26 8 8.1 8.1.1 8.1.2 8.2 Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnosis Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overcurrent / Overtemperature diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 29 30 30 32 9 9.1 9.2 Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Description Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Electrical Characteristics Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 10 10.1 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Electrical Characteristics Overload Protection Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 11 11.1 11.2 11.3 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 41 41 42 12 Control of the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.1 Internal Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2 SPI Interface. Signals and Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.1 Description 16 bit SPI Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.2 Daisy Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3 SPI Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3.1 16-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3.2 2x8-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3.3 16- and 2x8-bit protocol mixed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 44 44 44 45 45 45 47 48 Data Sheet 2 11 11 12 13 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Table of Content 12.2.3.4 Daisy-Chain and 2x8-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.4 safeCOMMUNICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.4.1 Encoding of the commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.4.2 Modulo-8 Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3 Register and Command - Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1 CMD - Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1.1 CMD_RSD - Command: Return Short Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1.2 CMD_RSDS - Command: Return Short Diagnosis and Device Status . . . . . . . . . . . . . . . . . . . . 12.3.1.3 CMD_RPC - Command: Return Pattern Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1.4 CMD_RINx - Command: Return Input Pin (INx) -Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2 DCC - Diagnosis Registers and compactCONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2.1 DRx - Diagnosis Registers Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2.2 DRx - Return on DRx Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2.3 DMSx/OPSx - Diagnosis Mode Set / Output Pin Set Commands . . . . . . . . . . . . . . . . . . . . . . . . 12.3.3 OUTx - Output Control Register CHx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.4 ISx - INPUT or Serial Mode Control Register, Bank A and Bank B . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.5 PMx - Parallel Mode Register CHx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.6 DEVS - Device Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 52 52 52 52 55 56 57 60 60 62 65 66 66 68 69 70 70 13 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 14 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Data Sheet 3 Rev. 1.4, 2013-07-02 Smart Multichannel Low Side Switch with Parallel Control and SPI Interface coreFLEX 1 TLE8110EE Overview Features * * * * * * * * Overvoltage, Overtemperature, ESD -Protection Direct Parallel PWM Control of all Channels safeCOMMUNICATION (SPI and Parallel) Efficient Communication Mode: compactCONTROL Compatible with 3.3V- and 5V- Micro Controllers I/O ports clampSAFE for highly efficient parallel use of the channels Green Product (RoHS compliant) AEC Qualified PG-DSO-36 Application * Power Switch Automotive and Industrial Systems switching Solenoids, Relays and Resistive Loads Description 10-channel Low-Side Switch in Smart Power Technology [SPT] with Serial Peripheral Interface [SPI] and 10 open drain DMOS output stages. The TLE8110EE is protected by embedded protection functions and designed for automotive and industrial applications. The output stages are controlled via Parallel Input Pins for PWM use or SPI Interface. The TLE8110EE is particularly suitable for Engine Management and Powertrain Systems. Type Package Marking TLE8110EE PG-DSO-36 TLE8110EE Data Sheet 4 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Overview Table 1 Product Summary Parameter Symbol Value Unit Analogue Supply voltage VDD VCC VDS(CL)typ RON1-4 RON5-6 RON7-10 RON1-4 RON5-6 RON7-10 IDnom IDnom IDnom IDSD(low) IDSD(low) IDSD(low) 4.50 ... 5.50 V 3.00 ... 5.50 V 55 V 0.30 0.25 0.60 0.60 0.50 1.20 1.50 A 1.70 A 0.75 A 2.60 A 3.70 A 1.70 A Digital Supply Voltage Clamping Voltage (CH 1-10) On Resistance typical at Tj=25C and IDnom On Resistance maximum at Tj=150C and IDnom Nominal Output current (CH 1-4) Nominal Output current (CH 5-6) Nominal Output current (CH 7-10) Output Current Shut-down Threshold (CH 1-4) min. Output Current Shut-down Threshold (CH 5-6) min. Output Current Shut-down Threshold (CH 7-10) min. VBatt VDD = typ. 5V Supply IC VCC = typ. 3. 3....5V RST Micro I /O Controller I /O I/O SPI_SI SPI_SO SPI _CLK SPI_CS EN TLE8110 EE OUT1 IN1 IN10 OUT10 4 to 6 Injectors or Solenoids General purpose Channels in parallel connection General purpose Channels for Relays SPI_SO SPI_SI SPI _CLK SPI_CS Appl _Diag_10ch_TLE8110 .vsd Figure 1 Data Sheet Block Diagram TLE8110EE 5 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Block Diagram 2 Block Diagram RST VDD IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN10 S_CS S_CLK S_SI S_ SO Input Control (TTL or CMOS) EN analogue control, diagnostic and protective functions input register SPI (TTL or CMOS) diagnosis register control register VCC Logic control unit OUT1 OUT2 temperature sensor OUT3 OUT4 short circuit detection OUT5 OUT6 gate control OUT7 open load detection OUT9 OUT8 OUT10 short to GND detection GND Figure 2 Block Diagram 2.1 Description Block_diag_10ch_TLE8110.vsd Communication The TLE8110EE is a 10-channel low-side switch in PG-DSO-36 package providing embedded protection functions. The 16-bit serial peripheral interface (SPI) can be utilized for control and diagnosis of the device and the loads. The SPI interface provides daisy-chain capability in order to assemble multiple devices in one SPI chain by using the same number of micro-controller pins 1). The analogue and the digital part of the device is supplied by 5V. Logic Input and Output Signals are then compatible to 5V logic level [TTL - level]. Optionally, the logic part can be supplied with lower voltages to achieve signal compatibility with e.g. 3.3V logic level [CMOS - level]. The TLE8110EE is equipped with 10 parallel input pins that are routed to each output channel. This allows control of the channels for loads driven by Pulse Width Modulation (PWM). The output channels can also be controlled by SPI. Reset The device is equipped with one Reset Pin and one Enable. Reset [RST] serves the whole device, Enable [EN] serves only the Output Control Unit and the Power Stages. 1) Daisy Chain Data Sheet 6 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Block Diagram Diagnosis The device provides diagnosis of the load, including open load, short to GND as well as short circuit to VBatt detection and over-load / over-temperature indication. The SPI diagnosis flags indicates if latched fault conditions may have occurred. Protection Each output stage is protected against short circuit. In case of over load, the affected channel is switched off. The switching off reaction time is dependent on two switching thresholds. Restart of the channel is done by clearing the Diagnosis Register 1). This feature protects the device against uncontrolled repetitive short circuits. The reaction to a short-circuit and over-temperature can be alternatively changed to further modes, such as semi- or auto - restart of the affected channel. There is a temperature sensor available for each channel to protect the device in case of over temperature. In case of over temperature the affected channel is switched off and the Over-Temperature Flag is set. Restart of the channel is done by deleting the Flag. This feature protects the device against uncontrolled temperature toggling. Parallel Connection of Channels The device is featured with a central clamping structure, so-called CLAMPsafe. This feature ensures a balanced clamping between the channels and allows in case of parallel connection of channels a high efficient usage of the channel capabilities. This parallel mode is additionally featured by best possible parameter- and thermal matching of the channels and by controlling the channels accordingly. 1) Restart after Clear Data Sheet 7 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Pin Configuration 3 Pin Configuration 3.1 Pin Assignment 1 GND GND 36 2 P_IN1 OUT7 35 3 P_IN2 OUT8 34 4 EN N.C. 33 5 RST GND 32 6 P_IN3 OUT5 31 7 P_IN4 OUT1 30 8 VDD 9 P_IN5 10 VCC 11 S_SO 12 S_CLK 13 OUT2 29 P_IN10 28 P_IN9 27 OUT3 26 OUT4 25 S_CS OUT6 24 14 S_SI GND 23 15 P_IN6 N.C. 22 16 P_IN7 OUT10 21 17 P_IN8 OUT9 20 18 GND GND 19 Figure 3 Pin Configuration 3.2 Pin Definitions and Functions GND Heat-Slug /Exposed Pad (back-side) Pin Symbol Function 1 GND Ground 2 P_IN1 Parallel Input Pin 1. Default assignment to Output Channel 1. 3 P_IN2 Parallel Input Pin 2. Default assignment to Output Channel 2. 4 EN Enable Input Pin. If not needed, connect with Pull-up resistor to VCC. 5 RST Reset Input Pin. (low active). If not needed, connect with Pull-up resistor to VCC. 6 P_IN3 Parallel Input Pin 3. Default assignment to Output Channel 3. 7 P_IN4 Parallel Input Pin 4. Default assignment to Output Channel 4. 8 VDD Analogue Supply Voltage 9 P_IN5 Parallel Input Pin 5. Default assignment to Output Channel 5. 10 VCC Digital Supply Voltage 11 S_SO Serial Peripheral Interface [SPI], Serial Output 12 S_CLK Serial Peripheral Interface [SPI], Clock Input 13 S_CS Serial Peripheral Interface [SPI], Chip Select (active Low) 14 S_SI Serial Peripheral Interface [SPI], Serial Input 15 P_IN6 Parallel Input Pin 6. Default assignment to Output Channel 6. 16 P_IN7 Parallel Input Pin 7. Default assignment to Output Channel 7. 17 P_IN8 Parallel Input Pin 8. Default assignment to Output Channel 8. 18 GND Ground Data Sheet 8 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Pin Configuration Pin Symbol Function 19 GND Ground 20 OUT9 Drain of Power Transistor Channel 9 21 OUT10 Drain of Power Transistor Channel 10 22 N.C. internally not connected, connect to Ground 23 GND Ground 24 OUT6 Drain of Power Transistor Channel 6 25 OUT4 Drain of Power Transistor Channel 4 26 OUT3 Drain of Power Transistor Channel 3 27 P_IN9 Parallel Input Pin 9. Default assignment to Output Channel 9. 28 P_IN10 Parallel Input Pin 10. Default assignment to Output Channel 10. 29 OUT2 Drain of Power Transistor Channel 2 30 OUT1 Drain of Power Transistor Channel 1 31 OUT5 Drain of Power Transistor Channel 5 32 GND Ground 33 N.C. internally not connected, connect to Ground 34 OUT8 Drain of Power Transistor Channel 8 35 OUT7 Drain of Power Transistor Channel 7 36 GND Ground Cooling GND Tab Data Sheet Cooling Tab; internally connected to GND 9 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Pin Configuration 3.3 Terms VB att PG-DSO-36 IP _IN1 VP _IN1 I P _IN2 V P _IN2 IE N VE N I RS T VRS T I P _IN3 VP _IN3 I P _IN4 V P _IN4 IV DD V V DD IP _IN5 V P _IN5 IV CC V V CC IS _S O VS _S O IS _CLK VS _CLK IS _CS V S _CS V S _S I VP _IN6 VP _IN7 IS _S I IP _IN6 IP _IN7 IP _IN8 VP _IN8 1 GND 2 P_IN1 GND 36 OUT7 35 3 P_IN2 OUT8 34 4 EN N.C. 33 5 RST GND 32 6 P_IN3 OUT5 31 7 P_IN4 8 VDD 9 P_IN5 10 VCC 11 S_SO 12 S_CLK 13 GND Heat-Slug / Exposed Pad (back-side) OUT1 30 OUT2 29 P_IN10 28 P_IN9 27 OUT3 26 OUT4 25 S_CS OUT6 24 14 S_SI GND 23 15 P_IN6 N.C. 22 16 P_IN7 OUT10 21 17 P_IN8 OUT9 20 18 GND GND 19 IOUT7 V OUT7 IOUT8 VOUT8 IOUT5 VOUT5 IOUT1 VOUT1 IOUT2 VOUT2 IP _IN10 V P _IN10 IP _IN9 VP _IN9 IOUT3 VOUT3 IOUT4 VOUT4 IOUT6 I OUT10 V OUT6 VOUT10 IOUT9 V OUT9 Top View Terms_TLE8110.vsd Figure 4 Data Sheet Terms 10 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings1) Tj = -40C to +150C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VCC VCC VDD VDD -0.3 5.5 V permanent -0.3 6.2 V t < 10s -0.3 5.5 V permanent -0.3 6.2 V t < 10s Load Current (CH 1 to 10 ) IDn - IDSD(low) A - 4.1.6 Reverse Current Output (CH 1-10) IDn -IDSD(low) - A - 4.1.7 Total Ground Current IGND -20 20 A - 4.1.8 Continuous Drain Source Voltage (Channel 1 to 10) VDSn -0.3 45 V - 4.1.9 maximum Voltage for short circuit protection on Output VDSn - 24 V one event on one single channel. Single Clamping Energy Channel Group 1-4 EAS - 29 mJ ID = 2.6A Single Clamping Energy Channel Group 5-6 EAS - Single Clamping Energy Channel Group 7-10 EAS - Vx Vx Vx -0.3 5.5 V permanent -0.3 6.2 V t < 10s -0.3 45 V permanent Supply Voltages 4.1.1 Digital Supply voltage 4.1.2 Digital Supply voltage 4.1.3 Analogue Supply voltage 4.1.4 Analogue Supply voltage Power Stages 4.1.5 Clamping Energy - Single Pulse2)3) 4.1.10 4.1.11 4.1.12 1 single pulse 31 mJ ID = 3.7A 1 single pulse 11 mJ ID = 1.7A 1 single pulse Logic Pins (SPI, INn, EN, RST) 4.1.13 Input Voltage at all Logic Pin 4.1.14 Input Voltage at all Logic Pin 4.1.15 Input Voltage at Pin 27, 28 (IN9, 10, ) Temperatures 4.1.16 Junction Temperature Tj -40 150 C - 4.1.17 Junction Temperature Tj -40 175 C max. 100hrs cumulative 4.1.18 Storage Temperature Tstg -55 150 C - VESD -4 4 kV All Pins HBM4) 1.5KOhm, 100pF ESD Robustness 4.1.19 Electro Static Discharge Voltage "Human Body Model - HBM" Data Sheet 11 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch General Product Characteristics Absolute Maximum Ratings1) (cont'd) Tj = -40C to +150C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Max. Unit Conditions 4.1.20 Electro Static Discharge Voltage "Charged Device Model - CDM" VESD -500 500 V All Pins CDM5) 4.1.21 Electro Static Discharge Voltage "Charged Device Model - CDM" VESD -750 750 V Pin 1, 18, 19, 36 (corner pins) CDM5) 1) 2) 3) 4) 5) Not subject to production test, specified by design. One single channel per time. Triangular Pulse Shape (inductance discharge): ID(t) = ID(0)*(1 - t / tpulse); 0 < t < tpulse. ESD susceptibility, HBM according to EIA/JESD 22-A114-B ESD susceptibility, Charged Device Model "CDM" EIA/JESD22-C101-C Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 4.2 Pos. Functional Range Parameter Symbol Limit Values Unit Conditions 5.5 V - 3 VDD V - VDD 5.5 V leakage Currents (ICC) might increase if VCC > VDD. A resistive loads1) Min. Max. 4.5 Supply Voltages 4.2.1 Analogue Supply Voltage 4.2.2 Digital Supply Voltage 4.2.3 Digital Supply Voltage VDD VCC VCC Power Stages 4.2.4 Ground Current IGND_typ 9 Temperatures 4.2.5 Junction Temperature 4.2.6 Junction Temperature Tj Tj -40 150 C - -40 175 C 1) for 100hrs 1) Not subject to production test, specified by design. Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Data Sheet 12 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch General Product Characteristics 4.3 Pos. Thermal Resistance Parameter 4.3.1 Junction to Soldering Point 4.3.2 Junction to Ambient Symbol RthJSP RthJA Limit Values Unit Conditions Min. Typ. Max. - 1.75 3.60 K/W Pvtot = 3W1)2)3) - 25.00 - K/W Pvtot = 3W1)2)3) 1) Not subject to production test, specified by design. 2) Homogenous power distribution over all channels (All Power stages equally heated), dependent on cooling set-up. 3) Refer to Figure 5 Dimensions : 76.2 x 114.3 x 1.5 mm , FR4 Metallization: JEDEC 2s2p (JESD 51-7) + (JESD 51-5) Thermal Vias : =0.3 mm; plating 25 m; 24 pcs. for PG-DSO-36 1.5mm 70m modeled (traces) 35m, 90% metallization 35m, 90% metallization 70m, 5% metallization Rth PCB setup.vsd Figure 5 Data Sheet PG-DSO-36 PCB set-up 13 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Supply 5 Power Supply 5.1 Description Power Supply The TLE8110EE is supplied by analogue power supply line VDD which is used for the analogue functions of the device, such as the gate control of the power stages. The digital power supply line VCC is used to supply the digital part and offers the possibility to adapt the logic level of the serial output pins to lower logic levels. RST VCC VDD VCC Under Voltage Monitor VDD Under Voltage Monitor or or EN input register Input and Serial Interface diagnosis register Logic control unit control register analogue control, diagnostic and protective functions OUTx Fault Detection Gate Control GND Block_diag_Supply_Reset.vsd Figure 6 Block Diagram Supply and Reset Description Supply The Supply Voltage Pins are monitored during the power-on phase and under normal operating conditions for under voltage. If during Power-on the increasing supply voltage exceeds the Supply Power-on Switching Threshold, the internal Reset is released after an internal delay has expired. In case of under voltage, a device internal reset is performed. The Switching Threshold for this case is the Poweron Switching threshold minus the Switching Hysteresis. In case of under voltage on the analogue supply line VDD the outputs are turned off but the content of the registers and the functionality of the logic part is kept alive. In case of under voltage on the digital supply VCC line, a complete reset including the registers is performed. After returning back to normal supply voltage and an internal delay, the related functional blocks are turned on again. For more details, refer to the chapter "Reset". The device internal under-voltage set will set the related bits in SDS (Short Diagnosis and Device Status) to allow the micro controller to detect this reset. For more information, refer to the chapter "Control of the Device". Data Sheet 14 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Supply 5.2 Electrical Characteristics Power Supply Electrical Characteristics: Power Supply 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. 3 - 5.5 V - 15 20 A fSCLK = 0Hz, S_CS = VCC, Tj=85C 1) VCC = 2.0V VDD > VCC - 20 40 A fSCLK = 0Hz, S_CS = VCC, Tj=150C VCC = 2.0V VDD > VCC - 2 5 A fSCLK = 0Hz, S_CS = VCC, Tj=85C1) VDD > VCC - 5 15 A fSCLK = 0Hz, S_CS = VCC, Tj=150C VDD > VCC - 0.15 2 mA fSCLK = 0Hz, Tj=150C. all Channels ON Digital Supply and Power-on Reset 5.2.2 VCC Digital Supply Current during Reset ICCstb a) (VCC < VCCpo ) 5.2.1 Digital Supply Voltage b) 5.2.3 a) Digital Supply Current during Reset ICCstb ( VRST < VRSTl) b) 5.2.4 a) Digital Supply Operating Current VCC = 3.3V ICC 1) - b) 0.5 5 mA fSCLK = 5MHz, Tj=150C. all Channels ON 1)2) 5.2.5 a) Digital Supply Operating Current VCC = 5.5V ICC b) - 0.25 2 mA fSCLK = 0Hz, Tj=150C. all Channels ON - 0.8 10 mA fSCLK = 5MHz, Tj=150C. all Channels ON 1)2) 5.2.6 Digital Supply Power-on Switching Threshold VCCpo 1.9 2.8 3 V VCC increasing 5.2.7 Digital Supply Switching Hysteresis VCChy 100 300 500 mV 1) Data Sheet 15 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Supply Electrical Characteristics: Power Supply 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. 4.5 - 5.5 V - - 10 20 A fSCLK = 0Hz, Tj=85C 1) VDD = 2V - 15 40 A fSCLK = 0Hz, Tj=150C VDD = 2V - 1 5 A fSCLK = 0Hz, Tj=85C 1) - 2 15 A fSCLK = 0Hz, Tj=150C - 8 25 mA fSCLK = 0...5MHz1) Tj=150C all Channels ON Analogue Supply and Power-on Reset 5.2.8 Analogue Supply Voltage 5.2.9 Analogue Supply Current during Reset (VDD< VDDpo ) a) VDD IDDstb b) 5.2.10 IDDstb b) Analogue Supply Current during Reset ( VEN< VENl) 5.2.11 Analogue Supply Operating Current IDD 5.2.12 Analogue Supply Power-on Switching Threshold VDDpo 3 4.2 4.5 V VDD increasing 5.2.13 Analogue Supply Switching Hysteresis VDDhy 100 200 400 mV 1) 5.2.14 Analogue Supply Power-on Delay Time tVDDpo - 100 200 s VDD increasing 1) a) 1) Parameter not subject to production test. Specified by design. 2) C = 50pF connected to S_SO Data Sheet 16 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Reset and Enable Inputs 6 Reset and Enable Inputs 6.1 Description Reset and Enable Inputs The TLE8110EE contains one Reset- and one Enable Input Pin as can be seen in Figure 6. Description: Reset Pin [RST] is the main reset and acts as the internal under voltage reset monitoring of the digital supply voltage VCC: As soon as RST is pulled low, the whole device including the control registers is reset. The Enable Pin [EN] resets only the Output channels and the control circuits. The content of the all registers is kept. This functions offers the possibility of a "soft" reset turning off only the Output lines but keeping alive the SPI communication and the contents of the control registers. This allows the read out of the diagnosis and setting up the device during or directly after Reset. 6.2 Electrical Characteristics Reset Inputs Electrical Characteristics: Reset Inputs 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions - Min. Typ. Max. Low Level of RST -0.3 - VCC *0.2 V High Level of RST VCC *0.4 - VCC V - Reset Input Pin [RST] 6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 VRSTl VRSTh RST Switching Hysteresis VRSThy Reset Pin pull-down Current IRSTresh IRSTresl Required Reset Duration time RST tRSTmin 20 100 300 mV 1) 20 40 85 A VRST=5V 2.4 - - A VRST=0.6V1) 2 - - s 1) -0.3 - VCC *0.2 V - Enable Input Pin [EN] 6.2.6 Low Level of EN 6.2.7 High Level of EN 6.2.8 EN Switching Hysteresis 6.2.9 Enable Pin pull-down Current VENl VENh VENhy IENresh IENresl tENrr 6.2.10 Enable Reaction Time (reaction of OUTx) 6.2.11 Required Enable Duration time EN tENmin VCC *0.4 - VCC V - 20 60 300 mV 1) 5 35 85 A VEN=5V 2.4 - - A VEN=0.6V1) - 4 - s 1) 2 - - s 1) 1) Parameter not subject to production test. Specified by design. Data Sheet 17 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Reset and Enable Inputs VDD t Enable not valid VEN VENh VENl OUTx Device OFF Enable valid T< tENmin Device ON VENhy t Enable of Output OUTx OFF t ENrr tVDDpo Device operating t External _reset.vsd Figure 7 Data Sheet Timing 18 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs 7 Power Outputs 7.1 Description Power Outputs The TLE8110EE is a 10 channel low-side powertrain switch. The power stages are built by N-channel power MOSFET transistors. The device is a universal multichannel switch but mostly suited for the use in Engine Management Systems [EMS]. Within an EMS, the best fit of the channels to the typical loads is: * * * Channel 1 to 4 for Injector valves or mid-sized solenoids with a nominal current requirement of 1.5A. Channel 5 to 6 for mid-sized solenoids or Injector valves with a nominal current requirement of 1.7A Channel 7 to 10 for small solenoids or relays with a nominal current requirement of 0.75A Channel 1 to 10 provide enhanced clamping capabilities of typically 55V best suited for inductive loads such as injectors and valves. It is recommended in case of an inductive load, to connect an external free wheeling- or clamping diode, where-ever possible to reduce power dissipation. All channels can be connected in parallel. Channels 1 to 4, 5 to 6 and 7 to 10 are prepared by matching for parallel connection with the possibility to use a high portion of the capability of each single channel also in parallel mode (refer to Chapter 7.4). Channel 5 and 6 have a higher current shut down threshold to allow to connect in parallel mode a load with a high inrush-current, such as a lambda sensor heater. RST VCC VDD EN OUT1 IN1 IN2 IN3 gate control CH1 OUT2 gate control CH2 OUT4 OUT3 temperature sensor OUT5 OUT6 INx Serial and Parallel Input control (for details , see Chapter Control of the device" ) input register short circuit detection diagnosis register open load detection control register short to GND detection OUT7 OUT8 OUT9 OUT10 GND Block _diag_10ch_TLE8x10_Outputs.vsd Figure 8 Data Sheet Block Diagram of Control and Power Outputs 19 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs 7.2 Description of the Clamping Structure When switching off inductive loads, the potential at pin OUT rises to VDS(CL) potential, because the inductance intends to continue driving the current. The clamping voltage is necessary to prevent destruction of the device, see Figure 9 for the clamping circuit principle. Nevertheless, the maximum allowed load inductance is limited. Vbat ID OUT V L, RL V DS DScl GND OutputClamp.vsd Figure 9 Internal Clamping Principle Clamping Energy During demagnetization of inductive loads, energy has to be dissipated in the device. This energy can be calculated with following equation: RL IL LL V DS ( CL ) - V BAT E = V DS ( CL ) ------ I L - ------------------------------------- ln 1 + ------------------------------------ RL RL V DS ( CL ) - V BAT (1) The maximum energy, which is converted into heat, is limited by the thermal design of the component. Attention: It is strongly recommended to measure the load Energy and Current under operating conditions, example of measurement setup is shown in Figure 10. Load small-signal parameters might not reflect the real load behavior under operating conditions, see Figure 11. For more details please refer to the Application Note "Switching Inductive Loads". Oscilloscope Temperature Chamber T=TL Active Clamping Low-Side Switch OUT Inductive Load VCL DMOS Ctrl iL(t) LL RL vD(t) VBAT GND Load Measurement Setup Figure 10 Data Sheet ECL measurement setup 20 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs Decreasing Inductance with IL Increasing Inductance with IL (Relays and some Valve types) Ctrl ON (Injectors, Valves) OFF Ctrl ON OFF vD, iL vD, iL VCL VCL IL ILm IL ILm VBAT VON VBAT VON t vD * iL R-Temp. Effect t calculated vD * iL R-Temp. Effect measured calculated measured ECL ECLm 0 ECL -increase Effect tF tFm L-Saturation Effect ECLm t tFm 0 tF t Deviation from measured values Figure 11 Deviation of calculation from measurement 7.3 Electrical Characteristics Power Outputs Electrical Characteristics: Power Outputs 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. - 0.3 - Unit Conditions Ohm IDnom=1,5A; Output Channel Resistance 7.3.1 On State Resistance Channel Group 1-4 RDSon Tj=25C1) - 0.45 0.6 Ohm IDnom=1,5A; Tj=150C 7.3.2 On State Resistance Channel Group 5-6 RDSon - 0.25 - Ohm IDnom=1.7A; Tj=25C1) - 0.35 0.5 Ohm IDnom=1.7A; Tj=150C 7.3.3 On State Resistance Channel Group 7-10 RDSon - 0.6 - Ohm IDnom=0.75A; Tj=25C1) - 0.85 1.2 Ohm IDnom=0.75A; Tj=150C Data Sheet 21 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs Electrical Characteristics: Power Outputs (cont'd) 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. - - 11 Unit Conditions mJ ID = 1.0A Clamping Energy - Repetitive1)2)3)4) Channel Group 1-4 7.3.4 Repetitive Clamping Energy EAR 109 cycles - - 12 mJ ID = 2.1A 104 cycles - - 15 mJ ID = 2.6A 10 cycles 5) Channel 5-6 7.3.5 Repetitive Clamping Energy EAR - - 13 mJ ID = 1.3A 109 cycles - - 15 mJ ID = 2.7A 104 cycles - - 20 mJ ID = 3.2A 10 cycles 5) Channel 7-10 7.3.6 Repetitive Clamping Energy EAR - - 4 mJ ID = 0.7A 109 cycles - - 4 mJ ID = 1.4A 104 cycles - - 5 mJ ID = 1.7A 10 cycles 5) Leakage Current 7.3.7 7.3.8 7.3.9 Output Leakage Current in standby IDoff mode, Channel 1 to 4 Output Leakage Current in standby IDoff mode, Channel 5 to 6 Output Leakage Current in standby IDoff mode, Channel 7 to 10 Data Sheet - - 3 A VDS=13.5V; VDD=5V, Tj=85C1) - - 8 A VDS=13.5V; VDD=5V, Tj=150C - - 6 A VDS=13.5V; VDD=5V, Tj=85C1) - - 12 A VDS=13.5V; VDD=5V, Tj=150C - - 2 A VDS=13.5V; VDD=5V, Tj=85C1) - - 5 A VDS=13.5V; VDD=5V, Tj=150C 22 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs Electrical Characteristics: Power Outputs (cont'd) 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Min. Typ. Max. 45 55 60 V - - 20 kHz Conditions Clamping Voltage 7.3.10 Output Clamping Voltage, Channel VDScl 1 to 10 Timing 7.3.11 Output Switching Frequency fOUTx 1) resistive load duty cycle > 25%. 7.3.12 Turn-on Time tdON - 5 10 s VDS=20% of Vbatt Vbatt = 13.5V, IDS1 to IDS6 = 1A, IDS7 to IDS10 = 0.5A, resistive load 7.3.13 Turn-off Time tdOFF - 5 10 s VDS=80% of Vbatt Vbatt = 13.5V, IDS1 to IDS6 = 1A, IDS7 to IDS10 = 0.5A resistive load 1) Parameter is not subject to production test, specified by design. 2) Either one of the values has to be considered as worst case limitation. Cumulative scenario and wide range of operating conditions are treated in the Application Note "Switching Inductive Loads - TLE8110 addendum". 3) This lifetime statement is an anticipation based on an extrapolation of Infineon's qualification test results. The actual lifetime of a component depends on its form of application and type of use etc. and may deviate from such statement. The lifetime statement shall in no event extend the agreed warranty period. 4) Triangular Pulse Shape (inductance discharge): ID(t) = ID(0)*(1 - t / tpulse); 0 < t < tpulse. 5) Repetitive operation not allowed. Starting Tj must be kept within specs. In case of high energy pulse an immediate switchoff strategy is recommended Data Sheet 23 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs RDS_ON / Ohm 0,6 RON_vs_Tj_CH1-4,6.vsd RDS_ON vs. Tj : CH 1-4 (V DD=5V) 0,5 0,4 0,3 0,2 -40 Figure 12 -20 0 20 40 60 80 100 120 140 Tj/C CH 1-4: typical behavior of RDS_ON versus the junction temperature Tj RDS_ON / Ohm 0,5 RON_vs_Tj_CH5-6.vsd R DS_ON vs. Tj: CH 5-6 (VDD=5V) 0,4 0,3 0,2 0,1 -40 -20 Figure 13 Data Sheet 0 20 40 60 80 100 120 140 Tj/C CH 5-6: typical behavior of RDS_ON versus the junction temperature Tj 24 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs RDS_ON / Ohm 1.2 RON_vs_Tj_CH7-10.vsd RDS_ON vs. T j: CH 7-10 (V DD=5V) 1.0 0.8 0.6 0.4 -40 Figure 14 -20 0 20 40 60 80 100 120 140 Tj/C CH7-10: typical behavior of RDS_ON versus the junction temperature Tj VCL_vs_Tj_all_CH.vsd VCL / V VCLn vs. Tj: all Channels 57 56 55 54 53 -40 -20 Figure 15 Data Sheet 0 20 40 60 80 100 120 140 Tj/C All Channels: typical behavior of the clamping voltage versus the junction temperature 25 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs VINx VINh VINh t VOUTx VBATT 80% 20% t t dON tdOFF Figure 16 Timing of Output Channel switching (resistive load) 7.4 Parallel Connection of the Power Stages Timing_Power_Outx _res1.vsd The TLE8110EE is equipped with a structure which improves the capability of parallel-connected channels. The device can be "informed" via the PMx.PMx - bits (see chapter control of the device) which of the channels are connected in parallel. The input channels can be mapped to the parallel connected output channels in order to apply the PWM signals. This feature allows a flexible adaptation to different load situations within the same hardware setup. In case of overload the ground current and the power dissipation is increasing. The application has to take into account that all maximum ratings are observed (e.g. operating temperature TJ and total ground current IGND, see Maximum Ratings). In case of parallel connection of channels with or w/o PM-bit set, the defined maximum clamping energy must not be exceeded. All stages are switched on and off simultaneously. The C has to ensure that the stages which are connected in parallel have always the same state (on or off). The PM-bit should be set according to the parallel connected power stages in order to achieve the best possible performance. The PM-bit is set to its default value in case of a Reset event (Reset pin Low or at Digital Supply undervoltage), that means the improved Parallel Mode is no longer active. In the event of reset the channels will be switched off causing the clamping energy to be dissipated with low performance of the current sharing as without PM-bit set, for more details please refer to the Application Note Switching Inductive Loads - TLE8110 addendum. The performance during parallel connection of channels is specified by design and not subject to the production test. All channels at the same junction temperature level. ON-Resistance The typical ON-Resistance RDSsum(typ) of parallel connected channels is given by: 1 1 R DSsum ( typ ) = ---------------------------- + ----------------------------------R DSon, n ( typ ) R DSon, n + 1 ( typ ) Data Sheet -1 (2) 26 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs Performance1)2)3)4) in case of Parallel Connection of Channels: related PM-Bit set Table 2 Pos. Parameter Symbol Channels in Parallel 2x 3x 4x Unit Conditions Channel Group 1-4 7.4.1 Maximum overall current before reaching lower limit threshold IDsum(low) 5.1 7.6 10.1 A 1) 7.4.2 Maximum overall Repetitive Clamping Energy EARsum 37 - - mJ ID=1.0A 109 cycles 17 38 69 mJ ID=1.75A 109 cycles - 23 42 mJ ID=2.5A 109 cycles - - 33 mJ ID=3.0A 109 cycles Channel Group 5-6 7.4.3 Maximum overall current before reaching lower limit threshold IDsum(low) 7.2 - - A 7.4.4 Maximum overall Repetitive Clamping Energy EARsum 43 - - mJ ID=1.3A 109 cycles 21 - - mJ ID=2.2A 109 cycles Channel Group 7-10 7.4.5 Maximum overall current before reaching lower limit threshold IDsum(low) 3.3 5.0 6.6 A 7.4.6 Maximum overall Repetitive Clamping Energy EARsum 15 - - mJ ID=0.7A 109 cycles 6 15 30 mJ ID=1.2A 109 cycles - 9 18 mJ ID=1.6A 109 cycles - - 11 mJ ID=2.1A 109 cycles 1) The performance during parallel connection of channels is specified by design and not subject to the production test. 2) Homogenous power distribution over all channels (all power stages equally heated), dependent on cooling set-up. 3) This lifetime statement is an anticipation based on an extrapolation of Infineon's qualification test results. The actual lifetime of a component depends on its form of application and type of use etc. and may deviate from such statement. The lifetime statement shall in no event extend the agreed warranty period. 4) Triangular Pulse Shape (inductance discharge): ID(t) = ID(0)*(1 - t / tpulse); 0 < t < tpulse. Data Sheet 27 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Power Outputs Performance1)2)3)4) in case of Parallel Connection of Channels: related PM-Bit NOT set Table 3 Pos. Parameter Symbol Channels in Parallel 2x 3x 4x Unit Conditions Channel Group 1-4 7.4.1 Maximum overall current before reaching lower limit threshold IDsum(low) 5.1 7.6 10.1 A 1) 7.4.2 Maximum overall Repetitive Clamping Energy EARsum 18 - - mJ ID=1.0A 109 cycles 8 13 19 mJ ID=1.75A 109 cycles - 8 11 mJ ID=2.5A 109 cycles - - 9 mJ ID=3.0A 109 cycles Channel Group 5-6 7.4.3 Maximum overall current before reaching lower limit threshold IDsum(low) 7.2 - - A 7.4.4 Maximum overall Repetitive Clamping Energy EARsum 22 - - mJ ID=1.3A 109 cycles 11 - - mJ ID=2.2A 109 cycles Channel Group 7-10 7.4.5 Maximum overall current before reaching lower limit threshold IDsum(low) 3.3 5.0 6.6 A 7.4.6 Maximum overall Repetitive Clamping Energy EARsum 7 - - mJ ID=0.7A 109 cycles 3 4 7 mJ ID=1.2A 109 cycles - 3 4 mJ ID=1.6A 109 cycles - - 3 mJ ID=2.1A 109 cycles 1) The performance during parallel connection of channels is specified by design and not subject to the production test. 2) Homogenous power distribution over all channels (all power stages equally heated), dependent on cooling set-up. 3) This lifetime statement is an anticipation based on an extrapolation of Infineon's qualification test results. The actual lifetime of a component depends on its form of application and type of use etc. and may deviate from such statement. The lifetime statement shall in no event extend the agreed warranty period. 4) Triangular Pulse Shape (inductance discharge): ID(t) = ID(0)*(1 - t / tpulse); 0 < t < tpulse. Data Sheet 28 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Diagnosis 8 Diagnosis 8.1 Diagnosis Description The TLE8110EE provides diagnosis information about the device and about the load. Following diagnosis flags have been implemented for each channel: Diagnosis1) Symbol DRn[1:0]x2) Device reaction Confirmation Procedure3) Short to Ground SCG 00B - - No Fault OK 11B - - Open Load OL 01B - Chapter 8.1.1 10B Switch-off of related channel Chapter 8.1.2 Overcurrent / Overtemperature OCT 1) No priority scheme is implemented for the diagnosis detection, any new diagnosis entry will override the previous one 2) Diagnosis Register (A/B banks) bit configuration, see Chapter 12.3.2.1 3) For some diagnosis a confirmation procedure is required for a safe operation of the device, refer to Figure 17 Updating of the Diagnosis is based on a filter-dependent standard delay time (td) of 220s max. This value is set as a default. Refer to Figure 18 for details. If SCG or OL condition is asserted and before the Diagnosis Delay Time (td) is elapsed a condition change occurs, OL-to-SCG or SCG-to-OL, filter timer is not reset and latest condition before td expiration will be stored into the diagnosis register. * Application Hint: It is recommended to avoid OFF periods of the channel shorter than td(max) (220s) in order to ensure the filter time is expired and the correct diagnosis information is stored. * Application Hint: In specific application cases - such as driving Uni-Polar Stepper Motor - it might be possible, that reverse currents flow for a short time, which possibly can disturb the diagnosis circuit at neighboring channels and cause wrong diagnosis results of those channels. To reduce the possibility, that this effect appears in a certain timing range, the filter time of Channels 7 to 10 can be extended to typ. 2.5ms or typ. 5ms by setting the "Diagnosis Blind Time" - Bits (DBTx). If Channels 7 to 10 are used for driving loads causing reverse currents, they influence each other and additionally might affect Channels 5 and 6 . It is recommended to use the channels 7 + 8 and 9 + 10 as pairs for anti-parallel control signals, such as for the stepper motors. For logic setting details, see chapter "Control of the Device". Data Sheet 29 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Diagnosis 8.1.1 Open Load diagnosis If an OL is read out of the Diagnosis Register, the following procedure is required in order to confirm the channel status and ensure a safe operation of the device: After reading the OL [01B] in the diagnosis register (Chapter 12.3.2) 1. Switch-OFF for t td(max) the related channel (via serial or direct control, see Chapter 12.3.3 and Chapter 12.3.4) 2. Read again the diagnosis register a) If OL is confirmed Then take actions according to system implementation 3. Continue normal operation Refer to Figure 17 for the procedure flow-chart. 8.1.2 Overcurrent / Overtemperature diagnosis After an OCT assertion the related channel is switched OFF for safety reasons. If an OCT is read out of the Diagnosis Register, the following procedure is required in order to confirm the channel status and ensure a safe operation of the device: After reading the OCT [10B] in the diagnosis register (Chapter 12.3.2) 1. 2. 3. 4. Set related bit DEVS.DCCx = 0 to disable OFF-diagnosis, see Chapter 12.3.6 Clear the Diagnosis issuing a DCC.DRxCL command, see Chapter 12.3.2 Switch-ON for t tOFFcl_l(max) the related channel Read again the diagnosis register a) If OCT is confirmed Then take actions according to system implementation 5. Set related bit DEVS.DCCx = 1 to enable OFF-diagnosis 6. Continue normal operation Refer to Figure 17 for the procedure flow-chart. Data Sheet 30 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Diagnosis DCC.DRx (read diagnosis) OK ? yes SCG ? yes OL ? yes no actions no take SCG action no wait t d(max) with Channel OFF no DCC.DRx (read Diagnosis) yes OL ? take OL action no yes OCT ? DEVS.DCCx=0 (disable OFF-diag) no DCC.DRxCL (clear diagnosis) wait tOFFcl _l(max) with Channel ON DCC.DRx (read Diagnosis) yes OCT ? take OCT action no DEVS.DCCx=1 (enable OFF-diag) Diagnosis Confirmation Figure 17 Diagnosis Confirmation procedure VDD Diagnosis Register IDSsg MUX 00 01 10 OUTn Latch IDSpd Latch VDSsg VDSol Temp. Sensor gate control n Latch OR n protective functions GND Diagnosis-serial.vsd Figure 18 Data Sheet Block Diagram of Diagnosis 31 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Diagnosis 8.2 Electrical Characteristics Diagnosis Electrical Characteristics: Diagnosis 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. 2.00 2.60 3.20 V - 50 90 150 A VDS = 13.5 V Open Load Diagnosis VDSol 8.2.1 Open load detection threshold voltage 8.2.2 Output pull-down diagnosis current IDpd per channel (low level) 8.2.3 Open Load Diagnosis Delay Time (all channels) td 100 - 220 s DEVS.DBT1=0 DEVS.DBT2=1 or 0 8.2.4 Channel 7-10: td Open Load Diagnosis Delay Time "Diagnosis Blind Time" see chapter "Control of the device" Figure 19, Figure 20 1.65 2.5 3.45 ms DEVS.DBT1=1 DEVS.DBT2=0 3.3 5 7.3 ms DEVS.DBT1=1 DEVS.DBT2=1 1.00 1.50 2.00 V - a) b) Short to GND Diagnosis 8.2.5 Short to ground detection threshold VDSsg voltage 8.2.6 Output diagnosis current for short to ground per channel (low level) IDsg -150 -100 -50 A VDS = 0V 8.2.7 Short to GND Diagnosis Delay Time td 100 - 220 s DEVS.DBT1=0 DEVS.DBT2=1 or 0 8.2.8 Channel 7-10: Short to GND Diagnosis Delay Time. "Diagnosis Blind Time" see chapter "Control of the device", Figure 19, Figure 20 td 1.65 2.5 3.45 ms DEVS.DBT1=1 DEVS.DBT2=0 3.3 5 7.3 ms DEVS.DBT1=1 DEVS.DBT2=1 a) b) Data Sheet 32 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Diagnosis Diagnosis Blind Time [DBT] activation DBT is triggered by Open Load [OL] or Short-to-Ground [SG] -detection during OFF-condition of CH7-10. DBT is activated by DEVS.DBT1, DEVS.DBT2 (see Control of the device"). INx Signal Channel 7 - 10 OFF OL, SG -Diagnosis active ON Output Voltage Incident - e.g. temporal short to GND" [SG] Diagnosis Blind Time [DBT] triggered by Diagnostic Incident Diagnosis Blind Time [DBT] active DBT Blind" window finishes as soon as the error disappears within the DBT 1 1 Figure 19 t err < tDBT t err< tDBT 1 1 terr > t DBT 1 1 Diagnostic Register Entry, because Failure present after ending DBT Diagnosis Register : 11: No Error 10: Over Load 01: Open Load 00: Short to Ground 0 0 DBT.vsd Diagnosis Blind Time Channel OFF YES OL, SGError present? YES OL, SGError detected DBT Counter SET 0 = tDBT Decrement DBT Counter OL, SGError present? No Reset Counter (finish DBTframe) Yes No Counter t > tDBT Yes Failure detected => Register Entry DBT_Flow. vsd Figure 20 Data Sheet Diagnosis Blind Time - Logic Flow 33 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Parallel Inputs 9 Parallel Inputs 9.1 Description Parallel Inputs There are 10 input pins available are on TLE8110EE to control the output stages. Each input signal controls the output stages of its assigned channel. For example, IN1 controls OUT1, IN2 controls OUT2, etc. A "Low"-Signal at INx switches the related Output Channel off. The zener diode protects the input circuit against ESD pulses. For details about the Boolean operation, refer to the chapter "Control of the device", for details about timing refer to Figure 12. 9.2 Electrical Characteristics Parallel Inputs Electrical Characteristics: Parallel Inputs 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions Parallel Inputs 9.2.1 Low Level of parallel Input pin VINxl -0.3 - VCC* 0.2 V - 9.2.2 High Level of Parallel Input pin VINxh VCC* 0.4 - VCC V - 9.2.3 Parallel Input Pin Switching Hysteresis VINxhy 15 60 300 mV 1) IINxh IINxl 20 40 85 A VINx=5V 2.4 - - A VINx=0.6V1) 9.2.4 a) Input Pin pull-down Current .........b) 1) Parameter not subject to production test. Specified by design. Data Sheet 34 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Protection Functions 10 Protection Functions The device provides embedded protective functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in this Document. Fault conditions are considered "outside" the normal operating range. Protection functions are not designed for continuous repetitive operation. There is an over load and over temperature protection implemented in the TLE8110EE. If a protection function becomes active during the write cycle of Diagnosis Information into the Diagnosis Register, the information is latched and stored into the diagnosis register after the write process. In order to achieve a maximum protection, the affected channel with over current or over temperature (OCT) is switched and latched OFF, channel can be turned ON again after the diagnosis register is cleared (Chapter 12.3.2) or if a different new diagnosis overrides the OCT. For the failure condition of Reverse Currents, the device contains a "Reverse Current Protection Comparator" [RCP]. This RCP can optionally be activated by setting the DEVS.RCP Bit. In case the comparator is activated, it detects a reverse current and switches ON the related output channel. The channel is kept ON up to a reverse current channel dependent threshold IRCP_off. This threshold is defined by regulators target value to keep the output voltage at >/~-0.3V. If the current exceeds a defined value, the comparator switches OFF and other protection functions are protecting the circuit against reverse current. That means that at higher currents / or in case RCP is de-activated / not activated, the reverse current is flowing through the body diode of the DMOS. In that case, the voltage drops to typically -0.6V according the voltage of the body diode. In case the comparator threshold has been exceeded and the RCP has been switched OFF, the functions remains OFF until the reverse current arrives back to zero reverse current. Only then, the comparator can be activated again after a delay time tRCP_on_delay. This function reduces the un-wanted influence of a reverse current to the analogue part of the circuit (such as the diagnosis). For more details about the functionality, see Figure 23 and Figure 24 and concerning the settings and the related registers, refer to Chapter "Control of the Device". RCP Logic Ctrl. temperature sensor Ref. -300mV OUTx T gate control Serial control short circuit detection Block_diag_Protection.vsd Figure 21 Data Sheet Block Diagram Protection Functions 35 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Protection Functions IDS tOFFcl _l tOFFcl_h switch-off after t OFFcl_h (short) with I >IDSD(high) switch-off after t OFFcl_l (long) if I falls below IDSD(high) before t OFFcl_h I DSD(high) switch-off after t OFFcl_l (long) with I >I DSD(low) immediate switch-off if I= IDSD(high) after t OFFcl_h IDSD(low) no switch-off with I <IDSD(low) t Filter timer is started at I DSD(low) threshold and stopped: * at t =tOFFcl _h if at t= tOFFcl _h I > I DSD(high) * at t =tOFFcl _l if IDSD(low) < I < I DSD(high) Overload shutdown thresholds and delay times Figure 22 Data Sheet Overload shutdown thresholds and delay times 36 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Protection Functions 10.1 Electrical Characteristics Overload Protection Function Electrical Characteristics: Overload Protection Function 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions Over Current Protection 10.1.1 Output Current Shut-down Threshold Low (Channel 1 to 4) IDSD(low) 2.6 3.8 5 A - 10.1.2 Output Current Shut-down Threshold Low (Channel 5 to 6) IDSD(low) 3.70 4.85 6.00 A - 10.1.3 Output Current Shut-down Threshold Low (Channel 7 to 10) IDSD(low) 1.7 2.3 2.9 A - 10.1.4 Output Current Shut-down Threshold High (Channel 1 to 4) IDSD(high) - 1.5 * - A 1) Output Current Shut-down Threshold High (Channel 5 to 6) IDSD(high) - - A 1) - A 1) IDSD (low) 10.1.5 1.5 * IDSD (low) Output Current Shut-down Threshold High (Channel 7 to 10) IDSD(high) - 10.1.7 Short Overload shutdown Delay Time (all Channels) tOFFcl_h 5 21 40 s valid for "Output Current Threshold High" 1) 10.1.8 Long Overload shutdown Delay Time (all Channels) tOFFcl_l 10 40 70 s valid for "Output Current Threshold Low" TjSD TjSDh 175 190 205 C 1) 10 - 20 K 1) 10.1.6 1.5 * IDSD (low) Over Temperature Protection 10.1.9 Thermal Shut Down Temperature 10.1.10 Thermal Shut Down Hysteresis Data Sheet 37 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Protection Functions Electrical Characteristics: Overload Protection Function (cont'd) 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions Reverse Current Protection 10.1.11 Reverse Current Comparator Switch-off Current level CH 1 - 4 IRCP_off - -0.9 - A DEVS.RCP = 11) Tj = 25C 10.1.12 Reverse Current Comparator Switch-off Current level CH 5 - 6 IRCP_off - -0.6 - A DEVS.RCP = 11) Tj = 25C 10.1.13 Reverse Current Comparator Switch-off Current level CH 7 - 10 IRCP_off - -0.45 - A DEVS.RCP = 11) Tj = 25C - s DEVS.RCP = 11) Tj = 25C 10.1.14 Reverse Current Comparator tRCP_on_ 24 switch on delay time delay 1) Parameter not subject to production test. Specified by design. Data Sheet 38 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Protection Functions ID Leakage (neighbour channel) RCP not active RCP active Reverse Current Comparator Switch-off Current level IRCP_off Reverse Current ID 0 t Reverse Current Comparator Switch-off Current level IRCP_off Maximum Rating -IDSD(low) VD VBatt 0 t ~ - 300mV tRCP_on_delay RCP active: RCP not active: Regulation to ID through Body VD ~ - 300mV; Diode of DMOS -ID through DMOS Figure 23 Data Sheet RCP.vsd Reverse Current Protection Comparator 6 39 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Protection Functions -40 -20 0 20 40 60 80 100 120 140 Tj / C -0.1 CH7-10 -0.3 -0.5 CH1-6 -0.7 -0.9 -1.1 -1.3 -1.5 IRCP_off /A Figure 24 Data Sheet IRCP_OFF_TC_12_ch.vsd Reverse Current Protection Comparator (typical behavior vs junction temperature) 40 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch 16 bit SPI Interface 11 16 bit SPI Interface 11.1 Description 16 bit SPI Interface The diagnosis and control interface is based on a serial peripheral interface (SPI). The SPI is a full duplex synchronous serial slave interface, which uses four lines: S_SO, S_SI, S_CLK and S_CS. Data is transferred by the lines S_SI and S_SO at the data rate given by S_CLK. The falling edge of S_CS indicates the beginning of a data access. Data is sampled in on line S_SI at the falling edge of S_CLK and shifted out on line SO at the rising edge of SCLK. Each access must be terminated by a rising edge of S_CS. A modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not a multiple of 8 bits have been counted, the data frame is ignored. The interface provides daisy chain capability. S_SO MSB 14 13 12 11 10 9 8 7 6 5 4 3 2 1 S_SI MSB 14 13 12 11 10 9 8 7 6 5 4 3 2 1 LSB LSB S_CS S_CLK time SPI.vsd Figure 25 16 bit SPI Interface The SPI protocol is described in Chapter "Control of the device". Concerning Reset of the SPI, please refer to the chapter "Reset" 11.2 Timing Diagrams t CS lead t CSlag t S_CS t CStd SCLKp 0.7Vdd 0.2Vdd t SCLKh t SCLKl 0.7Vdd 0.2Vdd S_CLK t SIsu t SIh 0.7Vdd S_SI 0.2Vdd tSO(en) t SOv t SOdis 0.7Vdd S_SO Figure 26 Data Sheet 0.2Vdd SPI timing diagram 41 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch 16 bit SPI Interface 11.3 Electrical Characteristics 16 bit SPI Interface Electrical Characteristics: 16 bit SPI Interface 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. -0.3 - VCC* 0.2 V - VCC* 0.4 - VCC V - 20 100 300 mV - 20 40 85 A VIN=5V 2.4 - - A VIN=0.6V1) -4 - - A -20 -40 -85 A VS_CS = 2 V, VCC=3.3V VS_CS = 0 V, VCC=5V Input Characteristics (CS, SCLK, SI) 11.3.1 L level of pin S_CS S_CLK S_SI 11.3.2 VS_CSl VS_CLKl VS_SIl H level of pin S_CS S_CLK S_SI 11.3.3 11.3.4 a) b) 11.3.5 VS_CSh VS_CLKh VS_SIh VS_CShy Hysteresis Input Pins VS_CLKhy VS_SIhy IS_CLKh Input Pin pull-down Current IS_SIh S_CLK IS_CLKl S_SI IS_SIl IS_CSh Input Pin pull-up Current a) S_CS b) IS_CSl Output Characteristics (SO) 11.3.6 L level output voltage 11.3.7 H level output voltage VS_SOl VS_SOh 11.3.8 Output tristate leakage current 11.3.9 Serial clock frequency 11.3.10 Serial clock period 11.3.11 Serial clock high time 11.3.12 Serial clock low time 11.3.13 Enable lead time (falling CS to rising SCLK) 11.3.14 Enable lag time (falling SCLK to rising CS) 11.3.15 V IS_SO = -2 mA IS_SO = 1.5 mA 10 A VS_SO = Vcc - 5 MHz -CL = 50 pF 1) 200 - - ns 1) 50 - - ns 1) 50 - - ns 1) 250 - - ns 1) tCS(lag) 250 - - ns 1) Transfer delay time (rising CS to falling CS) tCS(td) 250 - - ns 1) 11.3.16 Data setup time (required time SI to falling SCLK) tSI(su) 20 - - ns 1) 11.3.17 Data hold time (falling SCLK to SI) 20 - - ns 1) 11.3.18 Output enable time (falling CS to SO valid) tSI(h) tSO(en) - - 200 ns CL = 50 pF 1) 0 - 0.4 Vcc 0.4 V - Vcc IS_SOoff -10 - fS_CLK tS_CLK(P) tSCLK(H) tSCLK(L) tCS(lead) 0 Timings Data Sheet 42 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch 16 bit SPI Interface Electrical Characteristics: 16 bit SPI Interface (cont'd) 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. 11.3.19 Output disable time (rising CS to SO tristate) tSO(dis) - - 200 ns CL = 50 pF 1) 11.3.20 Output data valid time with capacitive load tSO(v) - - 100 ns CL = 50 pF 1) 11.3.21 Diagnosis Clear-to-Read Idle Time tDidle 16 - - s 1) 11.3.22 Diagnosis Overcurrent-to-Clear Idle Time tOCidle 12 - - s 1) 1) Not subject to production test, specified by design. Data Sheet 43 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device 12 Control of the device This chapter describes the SPI-Interface signals, the protocol, registers and commands. Reading this chapter allows the Software Engineer to control the device. The chapter contains also some information about communication safety features of the protocol. 12.1 Internal Clock The device contains an internal clock oscillator. Electrical Characteristics: Internal Clock 3.0V < VCC < 5.5V; 4.5V < VDD < 5.5V, Tj = -40C to +150C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. - 500 - Unit Conditions kHz 1) Parallel Inputs 12.1.1 internal clock oscillator frequency fint_osc 1) Parameter not subject to production test. Specified by design. 12.2 SPI Interface. Signals and Protocol 12.2.1 Description 16 bit SPI Interface Signals S_CS - Chip Select: The system micro controller selects the TLE8110EE by means of the S_CS pin. Whenever the pin is in low state, data transfer can take place. When S_CS is in high state, any signals at the S_CLK and S_SI pins are ignored and S_SO is forced into a high impedance state. S_CS High to Low transition: * * The information to be transferred loaded into the shift register (16-bit Protocol). S_CS Low to High transition: * Command decoding is only done, when after the falling edge of CS exactly a multiple (1, 2, 3, ...) of eight S_CLK signals have been detected. (See Modulo-8 Counter: Chapter 12.2.4.2) Data Sheet 44 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device S_CLK - Serial Clock: This input pin clocks the internal shift register. The serial input (S_SI) transfers data is shifted into the register on the falling edge of S_CLK while the serial output (S_SO) shifts the information out on the rising edge of the serial clock. It is essential that the S_CLK pin is in low state whenever chip select CS makes any transition. S_SI - Serial Input: Serial input data bits are shifted in at this pin, the most significant bit first. The bit at the S_SI Pin is read on the falling edge of S_CLK. S_SO Serial Output: Data is shifted out serially at this pin, the most significant bit first. S_SO is in high impedance state until the S_CS pin goes to low state.The next bits will appear at the S_SO pin following the rising edge of S_CLK. 12.2.2 Daisy Chain The SPI-Interface of TLE8110EE provides daisy chain capability, see Chapter 12.2.3.4 for more details. In this configuration several devices are activated by the same S_CS signal. The S_SI line of one device is connected with the S_SO line of another device (see Figure 27), which builds a chain. The ends of the chain are connected with the output and input of the master device, S_SO and S_SI respectively. The master device provides the master clock CLK, which is connected to the S_CLK line of each device in the chain. By each clock edge on S_CLK, one bit is shifted into the S_SI. The bit shifted out can be seen at SO. After 16 S_CLK cycles, the data transfer for one device has been finished. In single chip configuration, the S_CS line must go high to make the device accept the transferred data. In daisy chain configuration the data shifted out at device 1 has been shifted in to device 2. Example: When using three devices in daisy chain, three times 16 bits have to be shifted through the devices. After that, the S_CS line must go high (see Figure 27). SI SO SO device 3 SO device 2 SO device 1 SI device 3 SI device 2 SI device 1 CS CLK time SPI_DasyChain2.emf Figure 27 Principle example for Data Transfer in Daisy Chain Configuration Note: Due to the integrated modulo 8 counter, 8 bit and 16 bit devices can be used in one daisy chain. 12.2.3 SPI Protocol The device contains two protocol styles which are applied dependent of the used commands. There is the standard 16-bit protocol and the 2x8-bit protocol. Both protocols can appear also be mixed. 12.2.3.1 16-bit protocol Each Cycle where a serial data or command frame is sent to the S_SI of the SPI interface, a data frame is returned at the same time by the S_SO The content of the S_SO frame is dependent on the previous command which has been sent to S_SI. Read Command (R/W = R) returns one cycle later the content of the addresses register. (see Figure 28 ). Data Sheet 45 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device S_CS S_SI R S_SO ADR / DATA W dept. of previous R/W ADR / DATA R Register Short Diagnosis* * dependent on ADR; In case CMD or DCC is addressed, related content. Figure 28 SPI_Protocol_Normal_Mode.vsd 16-bit protocol S_SI Serial Input 15 ADR / DATA 14 W/R Reset Value: N.A. 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DATA / CMD ADDR Field Bits Description W/R 15 W/R - Write / Read 0 Write register: The register content of the addressed register will be updated after CS low high transition. After sending a WRITE command, the device returns data according the addressed register 1 Read register: The register content of the addressed register will be sent in the next frame. ADDR 14:12 ADDR - Address Pointer to register for read and write command DATA/CMD 11:0 DATA_CMD - Data / Command Data written to or read from register selected by address ADDR S_SO Serial Output CS 15 Reset Value: xxxx xxxx xxxx xxxxB1) 14 PAR 13 12 11 10 9 8 7 ADDR 6 5 4 3 2 1 0 DATA 1) after reset is send a Short Diagnosis and Device Status CMD_CSDS, see Chapter 12.3.1.2. Field Bits Description PAR 15 PAR - Parity Bit 1: odd number of '1' in data and address field 0: even number of '1' in data and address field ADDR 14:12 Address Address which has bin addressed DATA 11:0 Data Content of Address or feedback Data Data Sheet 46 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame the output at SPI signal SO will contain the requested information. A new command can be executed in the second frame. 12.2.3.2 2x8-bit protocol Each Cycle where a serial data or command frame is sent to the S_SI of the SPI interface, a data frame is returned at the same time by the S_SO. The content of the S_SO frame is dependent of the previous command which has been sent to S_SI and the content of the actual content of S_SI: The first Upper Byte send to S_SI controls the content of the Lower Byte actual returned by S_SO. The Lower Byte send to S_SI controls the Lower Byte in S_SO of the next frame. (see Figure 29 ). S_CS S_SI S_SO DMSx OPSx Upper Byte Lower Byte Upper Byte Lower Byte Upper Byte DO OPF Lower Byte Upper Byte Lower Byte SPI_Protocol_2x8bit.vsd Figure 29 Data Sheet 2x8-bit protocol 47 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device S_SI Serial Input 15 Reset Value: N.A. 14 13 12 11 10 9 8 7 6 5 4 Upper Byte 3 2 1 0 Lower Byte Field Bits Description Upper Byte 15:8 Upper Byte contains the command, which is performed after sending 8 bit to S_SI. The action out of this command is affecting the Lower Byte of S_SO of the actual communication frame. Lower Byte 7:0 Lower Byte contains the command and data, which is performed at the end of the actual communication frame. The action out of this command is affection the Upper Byte of S_SO of next communication frame. S_SO Serial Output CS 15 Reset Value: xxxx xxxx xxxx xxxxB1) 14 13 12 11 10 9 8 Upper Byte 7 6 5 4 3 2 1 0 Lower Byte 1) after reset is send a Short Diagnosis and Device Status CMD_CSDS, see Chapter 12.3.1.2. Field Bits Description Upper Byte 15:8 Upper Byte contains the data according the command and data in the Lower Byte of the previous communication Frame. Lower Byte 7:0 Lower Byte contains the data according the command in the Upper Byte of the actual communication frame Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame the output at SPI signal SO will contain the requested information. A new command can be executed in the second frame. 12.2.3.3 16- and 2x8-bit protocol mixed. The 16-bit and 2x8-bit protocols are mixed according the used commands (see Chapter 12.3.1). Special care should be taken, changing from the 16-bit protocol to the 2x8-bit protocol. In this case, it is important to send a NOP command to S_SI. Otherwise, by sending instead a Command, a collision between the S_SO data in the following frame and the Lower Byte of the 2x8-bit protocol will happen (see Chapter 12.2.3.2). Data Sheet 48 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Protocol Change from 2x8-bit to 16-bit S_CS S_SI S_SO Upper Byte Lower Byte Upper Byte Lower Byte CMD CMD Upper Byte 0 NOP Upper Byte Lower Byte Upper Byte Lower Byte Data 0 Lower Byte Upper Byte Lower Byte Data Protocol Change from 16-bit to 2x8-bit S_CS S_SI S_SO Critical Protocol Change from 16-bit to 2x8-bit S_CS 2x8-bit protocol is dominant S_SI CMD Upper Byte Lower Byte Upper Byte Lower Byte Data Data... Lower Byte Upper Byte Lower Byte S_SO collission SPI_Protocol_16_2x8bit_mixed.vsd Figure 30 16-bit protocol 12.2.3.4 Daisy-Chain and 2x8-bit protocol When using the TLE8110EE in a daisy-chain connection with other devices (TLE8110EE and non) special care has to be taken to avoid interference of 2x8-bit protocol with normal communication. Few simplified rules must be followed for a safe SPI communication in daisy-chain environment: 1. All TLE8110EE devices have to be routed at the beginning of the chain, other devices than TLE8110EE afterward 2. compactCONTROL commands (2x8-bit protocol) must not be addressed to TLE8110EE 3. The SPI frame of the daisy-chain must be extended of additional 8-bit (all zeros 00H) at beginning of the frame 4. When a Read/Clear Diagnosis Register A command (DRA, DRACL) is addressed to TLE8110EE, a NOP command must be sent to the next TLE8110EE on the chain 5. When a Read/Clear Diagnosis Register A command (DRA, DRACL) is addressed to TLE8110EE, response of the next device on the chain must be ignored in the next SPI cycle Details in Figure 31 and Figure 32. Data Sheet 49 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Critical Communication with first 8-bit interpreted as compactCONTROL (2x8-bit protocol ) SPI daisy-chain word S_CS first 8-bit that could interfere with compacCONTROL of device 1 S_SI to dev.n to dev.1 from dev.n from dev.1 S_SO lower-byte from dev.n affected by the reaction of dev.1 to compactCONTROL t Safe Communication with first all zeros 8-bit extension SPI daisy-chain word S_CS all zeros 8-bit extension S_SI 00 H to dev.n to dev.1 S_SO from dev.n from dev.1 last 8-bit to be ignored t Daisy-Chain and 2x8-bit protocol Figure 31 Data Sheet Daisy-Chain and 2x8-bit protocol 50 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Critical Communication with dev.n+1 response altered by dev .n response to previous DRA /DRACL SPI daisy-chain word SPI daisy-chain word S_CS S_SI x-command DRA/DRACL to dev.n+1 to dev.n to dev.n+1 to dev.n from dev.n+1 from dev.n from dev.n+1 from dev.n S_SO response to x-command response to DRA-/CL 8-bit altered by dev.n response to DRA-/CL t Safe Communication with NOP command send to dev .n+1 and ignored response SPI daisy-chain word SPI daisy-chain word S_CS S_SI NOP DRA/DRACL to dev.n+1 to dev.n to dev.n+1 to dev.n from dev.n+1 from dev.n from dev.n+1 from dev.n S_SO no response expected ignored response to DRA-/CL t DRA, DRACL to dev .n and NOP command to dev .n+1 Figure 32 Data Sheet DRA, DRACL to dev.n and NOP command to dev.n+1 51 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device 12.2.4 safeCOMMUNICATION The device contains some safety features, which are improving the protection of the application against malfunction in case of disturbance of the communication between the Micro Controller and the Device: 12.2.4.1 Encoding of the commands The Commands are encoded. In case other bit-patterns, then the defined once are received, the commands are ignored and the communication error can be read out with the command CMD_RSDS (seeChapter 12.3.1.2). 12.2.4.2 Modulo-8 Counter The modulo is the integral remainder in integral division. In data communications, a modulo based approach is used to ensure that user information in SPI protocols is in the correct order. The device has a receiver-side counter, and a defined counter size. The modulo counter specifies the number of subsequent numbers available. In case of TLE8110EE Modulo 8 counter specifies 8 serial numbers. The modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not a multiple of 8 bits have been counted, the data frame is ignored and a Communication Error is indicated in the CMD_RSDS - Feedback (seeChapter 12.3.1.2). 12.3 Register and Command - Overview This Chapter describes the Registers and Commands. The commands allow to carry through some actions, such as reading out or clearing the diagnosis or reading out the Input Pins. Specially highlighted here should be the encoded CMD_DMSx/OPSx commands - compactCONTROL -, a highly efficient command-set to set a part of the output pins and read out the diagnosis at the same time. Included in this command set is the possibility to check, if the communication works well as also the possibility to read-out some of the parallel Input Pins INx. Using this compact command set can reduce the workload of the micro-controller during run-time significantly. CMD_RSD is preformed and short diagnostics [SD] is returned after each Write Cycle to any of the writable registers. After start-up of the device, the registers are loaded with the default settings as described below in the register descriptions. The Registers are cleared and set back to the default values, when a low signal is applied to the pin RST or an under-voltage condition appears at the supply pin VCC what causes an under-voltage reset. If a low signal at pin EN is applied or an under-voltage condition appears at pin VDD, the Registers are not cleared. Data Sheet 52 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Table 1 Name Type Addr Short Description see: 000B Commands Chapter 12.3.1 001B Diagnosis Registers and Compact Control Chapter 12.3.2 W/R 010B Output Control Register CHx. Chapter 12.3.3 DEVS W/R 011B Device Settings Chapter 12.3.6 MSCS W/R 100B reserved ISAx W/R 101B Input or Serial Mode Register CHx Bank A Chapter 12.3.4 ISBx W/R 110B Input or Serial Mode Register CHx Bank B Chapter 12.3.4 PMx W/R 111B Parallel Mode Control of CHx with CHy Chapter 12.3.5 W 1) DCC W 1) OUTx CMD 1) if a read command is send, the command is ignored and S_SO returns a frame with '0'. Table 2 Register Overview Name Addr 11 10 9 8 0 1 1 1 7 6 5 4 3 2 1 0 CMD W2) 000B DCC W2) 001B OUTx W/R 010B 1 1 OUT 10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 DEVS W/R 011B RCP DBT2 DBT1 0 0 0 0 0 0 DCC 10 DCC 9 DCC 18 MSCS W/R 100B ISAx W/R 101B ISBx W/R 110B 0 0 0 0 PMx W/R 111B 0 0 0 0 Command --- Command --- C00h reserved IS6 def.1) IS5 000h IS4 IS3 IS2 IS1 IS10 IS9 IS8 IS7 PM91 0 PM89 007h PM78 PM56 0 PM34 PM23 AAAh 0AAh PM12 000h 1) Default Values after Reset 2) if a read command is send, the command is ignored and S_SO returns a frame with '0'. Data Sheet 53 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device IS1[1:0]: AND IN/Serial-Mod0 = 11 IN-Mode = 10 Serial-Mode OUT1=1 = 01 Serial-Mode OUT1=0 = 00 DC18[0]: Diagn. current off = 0 Diagn. Current on = 1 IS1[1:0] OUT1 11 IN1 10 0x OUT1 IS2[1:0] 11 IN2 OUT2 PM12=1 10 PM12=0 0x OUT2 OUT3 PM23=1 IN3 PM23=0 OUT6 CH5 IN4 PM56=1 PM56=0 OUT7 OUT8 PM78=1 PM78=0 IS10[1:0] 11 IN10 10 0x OUT10 CH9 PM910=1 PM910=0 OUT 10 Logic_Output_Control_CORE10.vsd Figure 33 Data Sheet Logic Output Control Block Diagram TLE8110EE 54 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device 12.3.1 CMD - Commands By using the Address Range CMD[14:12]='000' commands can be send to the device. The Feedback of the commands is provided in the next SPI SO Frame.Details about the Feedback on each command is described in the Chapter 12.3.1.1. It is possible to perform per each Communication Frame ONE Command out of Group-A (see following description of the Commands) and ONE Command out of Group-B at the same time. Performing more then one Command of one Group is not possible. For the case, this happens, the commands are ignored. CMD Command Register Reset Value: N.A. Overview Commands S_SI SPI_Serial Input CMD 11 10 9 8 7 6 5 4 3 2 1 0 RSD 0 1 1 1 0 0 0 0 0 0 0 1 RSDS 0 1 1 1 0 0 0 0 0 0 1 0 RPC 0 1 1 1 0 0 0 0 0 1 0 0 RINx 0 1 1 1 0 0 0 0 1 0 0 0 CSDS 0 1 1 1 0 0 0 1 0 0 0 0 NOP 0 1 1 1 0 0 0 0 0 0 0 0 Field Command Type Description Command Bits Group-B (Bits [7:4]) All other bit combinations are not valid. Command will be ignored then. NOP 0000 W NOP - no operation. A frame with '0000h' will be returned CMD_CSDS 0001 W CMD_CSDS - Command: Clear Short Diagnosis and Device Status Clear the Device Status information. Performing this Clear Command clears the Information in the Reset and Communication Error Information as long as the incident is not present anymore. If the incident is still present, the related Bits remain setted. Performing this command does NOT clear the Diagnosis Registers. The Diagnosis Information is cleared by the Clear Diagnosis Commands. (see Chapter 12.3.2) SO returns a Frame with '0000h' after performing CMD_CSDS or in case this command is carried out together with a command out of Group-A, the feedback is according the Group-A command Command Bits Group-A (Bits [3:0]) All other bit combinations are not valid. Command will be ignored then. Data Sheet 55 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Field Command Type Description CMD_NOP 0000 W NOP - no operation. A frame with '0000h' will be returned CMD_RINx 1000 W CMD_RINx - Command: Return Input Pin INx -Status (Chapter 12.3.1.4) CMD_RPC 0100 W CMD_RPC - Command: Return Pattern Check (Chapter 12.3.1.3) CMD_RSDS 0010 W CMD_RSDS - Command: Return Short Diagnosis and Device Status (Chapter 12.3.1.2) CMD_RSD W CMD_RSD - Command: Return Short Diagnosis (Chapter 12.3.1.1) 12.3.1.1 0001 CMD_RSD - Command: Return Short Diagnosis The Command CMD_RSD offers the possibility to read out the OR-operated "short"-Diagnosis within one SO Feedback Frame. The data to be send is latched at the end of the command frame . CMD_RSD S_CS S_SI W S_SO CMD_RSD R/W dept. of previous R/W xxxx xxxx R/W SD xxxx SPI_Protocol_CMD_RSD.vsd Figure 34 SPI Feedback on CMD_RSD S_SO SPI_Serial Output CS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PAR 0 0 0 0 0 SD10 SD9 SD8 SD7 SD6 SD5 SD4 SD3 SD2 SD1 Data Sheet 56 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Field Bits Type Description - - - SD1-10 Short Diagnosis 0 Normal Operation 1 Each SD-Bit contains the NAND-operated Diagnosis Error of each related Channel. Details can be read in diagnosis registers SD is returned after each Write Cycle to any of the writable registers. 12.3.1.2 CMD_RSDS - Command: Return Short Diagnosis and Device Status The Command CMD_RSD offers the possibility to read out the OR-operated "short"-Diagnosis and the device Status - such as Reset-Information and Communication Error - within one SO Feedback Frame. The data to be send is latched at the end of the command frame . CMD_RSDS S_CS S_SI W S_SO CMD_RSDS R/W dept. of previous R/W xxxx SDS R/W xxxx xxxx SPI_Protocol_CMD_RSDS.vsd Figure 35 Data Sheet SPI Feedback on CMD_RSDS 57 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device S_SO SPI_Serial Output CS 15 14 13 12 11 10 9 8 PAR 0 0 0 0 0 0 0 7 6 5 4 Bits Type Description - 7:0 - SDS - Short Diagnosis and Device Status - 0 - SDS1 - Diagnosis Error in Channel 1 to 6 - 1 - 2 - - 3 - 1 0 normal operation diagnosis failure SDS2 - Diagnosis Error in Channel 7 to 10 0 1 - 2 SDS8 SDS7 SDS6 SDS5 SDS4 SDS3 SDS2 SDS1 Field 0 1 3 normal operation diagnosis failure SDS3 - Under Voltage on VCC (Digital Supply Voltage) see Figure 36 SDS4 - Under Voltage on VDD (Analogue Supply Voltage) see Figure 36 - 4 - SDS5 - Modulo Counter Error 0 1 - 5 - SDS6 - Previous Communication Error - Encoded Command Ignored 0 1 - 6 - - 7 - normal operation Previous Modulo Counter Error normal operation Previous Communication Error - Encoded Command Ignored SDS7 - not used = '0' always '0' SDS8 - not used = '0' always '0' Data Sheet 58 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Behaviour of SDS 3 and SDS 4 in relation to RST , EN, VDD, VCC and CMD .CSDS SDS3 VCC or... RST SDS4 EN=1 SDS3 0 1 0 CMD.CSDS VCC or... RST SDS4 0 1 0 CMD.CSDS VDD SDS4 0 SDS4 EN=0 1 1 0 CMD.CSDS VCC or... RST SDS4 0 0 0 CMD.CSDS VDD SDS4 0 0 0 SDS4 EN=0AE1 0 CMD.CSDS EN SDS4 0 1* CMD.CSDS 0 * During EN = 0, the device internal VDD supply is disabled in order to fulfill low quiescent current requirements. After the transition from EN=0 to 1, the SDS4 will detect under voltage (it is set SDS4=1) until the clear command CMD.CSDS it sent (SDS4=0). SDS3_4_behaviour.vsd Figure 36 Data Sheet Behaviour of SDS3, 4 59 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device 12.3.1.3 CMD_RPC - Command: Return Pattern Check The Command CMD_RPC offers the possibility to get returned the previous Command to check if the communication works well. The data to be send is latched at the end of the command frame . CMD_RPC S_CS S_SI W S_SO CMD_RPC R/W dept. of previous R/W xxxx xxxx R/W CMD_RPC xxxx SPI_Protocol_CMD_RPC.vsd Figure 37 SPI Feedback on CMD_RPC S_SO SPI_Serial Output CS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PAR= 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 Field Bits Type Description - - - CMD_RPC is returned 12.3.1.4 CMD_RINx - Command: Return Input Pin (INx) -Status The Command CMD_RINx offers the possibility to read out the actual status of the Input Pins. This command allows to check the correct communication on the INx Pins. The data to be send is latched at the end of the command frame . Data Sheet 60 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device CMD_RINx S_CS S_SI W S_SO CMD_RINx R/W dept. of previous R/W xxxx xxxx R/W INx xxxx SPI_Protocol_CMD_RINx.vsd Figure 38 SPI Feedback on CMD_RINx S_SO SPI_Serial Output CS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PAR 0 0 0 0 0 IN10 IN9 IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN1 Field Bits Type Description - - - INx Input Pin Status The Status of the INx Pins is read out at the moment of CS High-to-Low transition. Details see Figure 39. 0 INx = Low corresponding OFF 1 INx = High corresponding ON Data Sheet 61 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device OUT1 Control Logic IN1 OUT2 IN2 OUTn INx Temporal INx Register latched by CMD_PINx and CS High-to-Low transition Latch on CS Transfer on CS to SPI-SO-Register CS SI CMD_RINx SO RINx INx_readout.vsd Figure 39 Read-out of INx Pins 12.3.2 DCC - Diagnosis Registers and compactCONTROL The DCC - Diagnosis and Compact Control Set allows to read out and clear the Diagnosis Registers. Additionally this Command set offers the possibility to proceed with a compactCONTROL Mode using DMS - Diagnosis Mode Set and OPS - Output Pin Set Commands. This compactCONTROL Mode offers the possibility to Control the device with lowest work load on the micro controller side. If any other pattern then the defined commands is received on S_SI, the command is ignored and rated as a Communication Error. In this case, this incident is reported in SDS (Chapter 12.3.1.2). If an Error in the Output Channels is detected by the diagnosis circuit, the result is latched in the diagnosis registers related to each channel. The Diagnosis Register is not deleted, when it is just read out. The Diagnosis Register byte can only be cleared by using the appropriated command. In this case, the complete Register Bank is cleared. When issuing a Diagnosis Register Clear command (DRxCL or DMSCL), the idle time tDidle needs to elapse, from the CS low-to-high transition of the clear command, before the register content is effectively cleared (Figure 40); this time has to be taken into account when trying to read the Diagnosis register content after a clear, see Chapter 11.3 for tDidle definition. After an overcurrent entry is stored in the diagnosis register (OC), the idle time tOCidle needs to elapse before a clear command can effectively clear the entry; if trying to clear the Diagnosis register after an OCT entry is read (Figure 40), this time has to be taken into account starting from the CS high-to-low transition of the previous read command, see Chapter 11.3 for tOCidle definition. Data Sheet 62 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Diagnosis Clear-to-Read idle time (tDidle ) tDidle S_CS t > tDidle S_SI DRxCL/DMSCL DRx Clear Diagnosis Read Diagnosis Cleared diagnosis can be read Diagnosis gets cleared t Diagnosis Overcurrent -to-Clear idle time ( tOCidle ) tOCidle S_CS t > tOCidle DRx DRxCL/DMSCL Read Diagnosis Clear Diagnosis S_SI Effective Diagnosis Clear OCT detected OCT can be cleared t Diagnosis Idle Times Figure 40 Diagnosis idle times DCC Diagnosis Registers and Compact Control S_SI SPI_Serial Input DCC 11 Reset Value: N.A. 10 9 8 7 6 5 4 3 2 1 0 0 DRA 0 1 0 1 0 0 0 0 0 0 0 DRB 0 1 1 0 0 0 0 0 0 0 0 0 DRACL 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRBCL 0 0 1 0 DMSCL/OPSx 1 0 0 0 OPSx DMS1/OPSx 1 0 1 1 OPSx DMS2/OPSx 1 1 0 1 OPSx DMS3/OPSx 1 1 1 0 OPSx Data Sheet 63 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device DMSx/OPS1 1 DMSx 0 0 0 0 0 0 0 1 DMSx/OPS2 1 DMSx 0 0 0 0 0 0 1 0 DMSx/OPS3 1 DMSx 0 0 0 0 0 1 0 0 DMSx/OPS4 1 DMSx 0 0 0 0 1 0 0 0 DMSx/OPS5 1 DMSx 0 0 0 1 0 0 0 0 DMSx/OPS6 1 DMSx 0 0 1 0 0 0 0 0 DMSx/OPS7 1 DMSx 0 1 0 0 0 0 0 0 DMSx/OPS8 1 DMSx 1 0 0 0 0 0 0 0 Field Bits Type Description 11:0 W DRA - Diagnosis Register A (see Chapter 12.3.2.1) Read out Diagnosis Register A. Return the contents in the next SPI Frame. (see Chapter 12.3.2.2) 11:0 W DRB - Diagnosis Register B (see Chapter 12.3.2.1) Read out Diagnosis Register B. Return the contents in the next SPI Frame. (see Chapter 12.3.2.2) 11:0 W DRACL - Diagnosis Register A Clear Clear the contents of the Diagnosis Register A. Return the content present before the clear in the next SPI Frame. If the Diagnosis Error Remains, the Information remains.(see Chapter 12.3.2.2) DCC_ DRBCL 11:0 W DRBCL - Diagnosis Register B Clear Clear the contents of the Diagnosis Register B. Return the content present before the clear in the next SPI Frame. If the Diagnosis Error Remains, the Information remains. (see Chapter 12.3.2.2) DCC_ DMSCL 11:8 W DMSCL/OPSx - Diagnosis Mode Set, Clear / Output Pins Set On sending this command, the diagnosis registers DRA, DRB as well as the "virtual" Diagnosis Output Registers DO[7:0] (see Chapter 12.3.2.3) are cleared. Output Pin Settings are done according the content of OPSx. Returns the contents of cleared DR2 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) DCC_ DMS1 11:8 W DMS1/OPSx - Diagnosis Mode Set, Register1 / Output Pins Set On sending this command, the diagnosis registers DR1 is selected. Output Pin Settings are done according the content of OPSx. Returns the contents of DR1 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) DCC_ DMS2 11:8 W DMS2/OPSx - Diagnosis Mode Set, Register2 / Output Pins Set On sending this command, the diagnosis registers DR2 is selected. Output Pin Settings are done according the content of OPSx. Returns the contents of DR2 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) DCC_DRA DCC_DRB DCC_ DRACL Data Sheet 64 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Field Bits Type Description DCC_ DMS3 11:8 W DMS3/OPSx - Diagnosis Mode Set, Register3 / Output Pins Set On sending this command, the diagnosis registers DR3 is selected. Output Pin Settings are done according the content of OPSx. Returns the contents of DR3 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) W DMSx/OPS1 - Diagnosis Mode Set x/ Output Pin Set Command 1 On sending this command, the diagnosis register is selected according DMSx. The Output Pins of Channel 7-10 are set according the following definitions. The OPSx are commands, no register. The commands are controlling the contents of ISA, ISB and OUTx. OPS[7:0] - Output Pin Set 0000 0001: CH7 input select, 1: parallel* / 0 : Serial 0000 0010: CH8 input select, 1: parallel* / 0 : Serial 0000 0100: CH9 input select, 1: parallel* / 0 : Serial 0000 1000: CH10 input select, 1: parallel* / 0 : Serial 0001 0000: CH7 output set, 1: ON / 0:OFF 0010 0000: CH8 output set, 1: ON / 0:OFF 0100 0000: CH9 output set, 1: ON / 0:OFF 1000 0000: CH10 output set, 1: ON / 0:OFF (*parallel controlled by INx) DCC_ 7:0 DMSx/OPSx Sending OR operated combinations of above listed options (only OPSx) are possible in order to control more then one channel at the same time. If parallel mode Mode is selected (in "input select"), the serial settings (in "output select") are ignored. In parallel Mode, the selected Channels are controlled via INx Pins. The default setting of ISB corresponds the command OPS[7:0] = xxxx 1111b. (parallel mode, status of the Outputs according signal on INx) Returns the contents the selected DRx register on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback [OPF] in the 1st Byte of the next frame. (see Chapter 12.3.2.3) 12.3.2.1 DRx - Diagnosis Registers Contents DRA[1:0]x / DRB[1:0]x Diagnosis Register CHx Bank A and Bank B Reset Value: 0000 0000 0000B = 000h 11 10 9 8 7 6 5 4 3 2 1 0 DRA[1]6 DRA[0]6 DRA[1]5 DRA[0]5 DRA[1]4 DRA[0]4 DRA[1]3 DRA[0]3 DRA[1]2 DRA[0]2 DRA[1]1 DRA[0]1 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 DRB[0]9 DRB[1]8 DRB[0]8 DRB[1]7 DRB[0]7 Data Sheet DRB[1]10 DRB[0]10 DRB[1]9 65 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Field Bits Type Description DRA[1:0]x / DRB[1:0]x 1:0 R DRA[1:0]x / DRB[1:0]x DRn[1]x/DRn[0]x = 11 no Error DRn[1]x/DRn[0]x = 10 Over Load, Shorted Load, Over temperature in ON-Mode DRn[1]x/DRn[0]x = 01 Open Load in OFF-Mode DRn[1]x/DRn[0]x = 00 Short to GND in OFF-Mode default DRx[1:0] = 11B A new error on the same channel will overwrite older information. The diagnosis information which is returned by SO is latched when CS makes a High-to-Low transistion of the frame which sends out the register. 12.3.2.2 DRx - Return on DRx Commands x_DRx S_CS S_SI W S_SO x_DRx R/W dept. of previous R/W xxxx xxxx R/W DRx xxxx SPI_Protocol_x_DRx.vsd Figure 41 SPI Feedback on x_DRx commands S_SO SPI_Serial Output CS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PAR 0 0 1 DRx [1]x DRx [0]x DRx [1]x DRx [0]x DRx [1]x DRx [0]x DRx [1]x DRx [0]x DRx [1]x DRx [0]x DRx [1]x DRx [0]x Field Bits Type Description - - - DRx Contents 0 no Diagnosis Error 1 Diagnosis Error 12.3.2.3 DMSx/OPSx - Diagnosis Mode Set / Output Pin Set Commands Protocol Data Sheet 66 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Each Cycle where a serial data or command frame is sent to the Serial Input [SI] of the SPI interface, a data frame is returned immediately by the Serial Output [SO]. The content of the SO frame is dependent of the previous command which has been sent to SI and the content of the actual content of SI: The first Byte send by S_SI controls the content of the second byte actual returned by S_SO. The second Byte send by S_SI controls the first byte in S_SO of the next frame. (see Figure 42) S_CS S_SI S_SO DMSx OPSx Upper Byte Lower Byte Upper Byte Lower Byte Upper Byte DO OPF Lower Byte Upper Byte Lower Byte SPI_Protocol_Short_Mode.vsd Figure 42 Data Transfer in Diagnosis and Compact Control S_SI SPI_Serial Input 15 14 13 12 11 Diagnosis Mode Set DMS[4:0] 0 0 0 1 - S_SO SPI_Serial Output 15 14 13 12 10 - 11 9 - 10 8 8 Output Pin Set Feedback OPF[7:0] 6 5 4 3 2 1 0 Output Pin Set OPS[7:0] serial mode selected parallel or serial mode CH10: CH9: CH8: CH7: CH10: CH9: CH8: CH7: 0= 0= 0= 1:ON 1:ON 1:ON 1:ON 0 = 0:OFF 0:OFF 0:OFF 0:OFF serial serial serial serial 1= 1= 1= 1= par. par. par. par. - 9 7 7 6 5 4 3 2 1 0 Diagnosis Output DO[7:0] Diagnosis Register Diagnosis Output Registers DO[7:0] 7 6 Diag Register-1 Diag Register-2 Diag Register-3 Data Sheet DR4[1] DR1NA DR10[1] DR4[0] DR3NA DR10[0] 5 DR3[1] 1 DR9[1] 4 DR3[0] 1 DR9[0] 67 3 DR2[1] DR6[1] DR8[1] 2 DR2[0] DR6[0] DR8[0] 1 DR1[1] DR5[1] DR7[1] 0 DR1[0] DR5[0] DR7[0] Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Field Bits Type Description DO[7:0] 7:0 R DO[7:0] - Diagnosis Output Contents according settings of DMS[4:0] Returned within the same frame as the pointer is send. DRx[1:0] definitions: see Chapter 12.3.2.1 DO[7:6] Diag Register-2 7:6 R DO1NA: NAND-operated diagnosis of Diag Register-1 DO3NA: NAND-operated diagnosis of Diag Register-3 1: at least one diagnosis error is stored in the related Diag Register 0: no diagnosis error is stored in the related Diag Register. Output Pin Feedback Output Pin Feedback OPF[7:0] 15 14 13 12 11 OPF[3] OPF[2] 9 8 OPF[1] OPF[0] OPF[7] OPF[6] OPF[5] Field Bits Type Description OPF[7:0] 15:8 R OPF[7:0] - Output Pin Feedback Principally, OPF can return the previously send OPS word and the IN 10:7 -pin settings, dependent serial/parallel-setting of OPS: - If Serial Mode is selected by one or more OPS[3:0]-bits, the related OPF[7:4]-bits are returning the settings of OPS[7:4], send at the previous frame. - if parallel Mode is selected by one or more OPS[3:0]-bits, the related OPF[7:4]-bits are returning the condition available at the related IN 10:7 Pins at the moment of S_CS high-to-low transition. A mix of both modes is possible and depends on the channel related settings. 12.3.3 OPF[4] 10 OUTx - Output Control Register CHx The Output Control Register OUTx consists of 10 Bits to control the Output Channel. Each Bit switches ON/OFF the related Channel. OUTx becomes only active when ISx[1:0] = 0x. For details refer to Chapter 12.3.4. OUTx Output Control Register DATA Reset Value: 1100 0000 0000B = C00h Data Sheet 68 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device 11 10 9 8 7 6 5 4 3 2 1 0 1 1 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3] OUT2 OUT1 Field Bits Type Description OUTx[9:0] 9:0 R/W Data - OUTx[9:0] OUTx = 0 According Channel is switched OFF OUTx = 1 According Channel is switched ON default (all channels OFF) OUT[9:0] = 00 0000 0000B = 000h OUT[11:10] 11:10 R/W Data - OUTx[11:10] bits are set to OUT[11:10] = 1. 12.3.4 ISx - INPUT or Serial Mode Control Register, Bank A and Bank B The INPUT or Serial Control Register [ ISx[1:0] ] allows to define the way of controlling the Output Channels. There are 4 setting options possible: * * * * Standard Serial Control: The related Output Channel is set according the content of the OUTx Register. (Chapter 12.3.3) A further possibility is the control by the Input Pins The settings of the Parallel Mode Register PMx[0]. (Chapter 12.3.5) Additionally possible is the AND operation between the setting of the OUTx register and the PWM signal at the INPUT Pin. ISAx INPUT or Serial Mode Control Register Bank A 11 10 9 8 7 IS6 IS5 COMMAND Reset Value: 1010 1010 1010B = AAAh 6 5 IS4 4 IS3 10 9 8 0 0 0 0 Data Sheet 7 2 1 IS2 ISBx INPUT or Serial Mode Control Register Bank B 11 3 0 IS1 COMMAND Reset Value: 0000 1010 1010B = 0AAh 6 5 IS10 4 IS9 69 3 2 IS8 1 0 IS7 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device Field Bits Type Description ISx[1:0] 11:0 ISAx 7:0 ISBx R/W Command - IS[1:0] ISx[1:0]= 0x: Serial Mode - The Channel is set ON/OFF by OUTx. 10: INPUT Mode - CHx ON/OFF according INx 11: AND operate Mode INx with OUTx -> CHx ON if OUTx & INx =1 default all Channels ISx[1:0] = 10B 12.3.5 PMx - Parallel Mode Register CHx The Parallel Mode Register PMx[1] allows to "inform" the device about externally parallel connected output channels. If a PMx bit is set, the "lower" related Input Channel controls the indicated Output Channels to achieve best possible matching and according to that highest efficiency of both channels. Additionally to that, the CLAMPsafe feature allows high matching during clamping. PMx Parallel Mode Register CHx 11 10 9 0 0 0 8 7 6 5 0 PM910 PM89 PM78 COMMAND Reset Value: 0000 0000 0000B = 000h 4 3 2 1 0 PM56 0 PM34 PM23 PM12 Field Bits Type Description PMx 11:8 R/W 0 PMx 7:0 R/W PMx - Parallel Mode Bit 0 Direct Mode 1 Parallel Mode of Channel 1 with x+1 default PMx[0] = 0 Controlling Parallel Mode is possible between Channel 1 to 4, 5 to 6, 7 to 10. In between the groups, no parallel mode is supported but possible. In case Parallel Mode is chosen and a diagnosis error at only one of the channels is detected, the according diagnosis bit is set. This information mismatch can be caused by tolerance related inbalance of the channels connected together in parallel mode. The diagnosis bits should be or-operated by the Micro Controller side. 12.3.6 DEVS - Device Settings This Register allows additional Device settings. For details refer also to the Chapter "Electrical Characteristics". The Diagnosis Current Control register allow to select between different Diagnosis Modes. The Diagnosis Currents can be switched off to avoid glowing of any connected LEDs. DEVS Device Settings Data Sheet COMMAND Reset Value: 0000 0000 0111B = 007h 70 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Control of the device 11 10 9 8 7 6 5 4 3 2 1 0 RCP DBT2 DBT1 0 0 0 0 0 0 DCC10 DCC9 DCC18 Field Bits Type Description RCP 11 R/W RCP - Reverse Current Protection 1: reverse current comp is enabled (valid for all Channels) 0: disabled default: RCP = 0 DBT2 10 DBT1 9 DEVS[7:5] 7:5 R/W Reserved, must be set to 0 default: 0 DEVS[4:3] 4:3 R/W not used. set to '0' DCCx 2:0 R/W DCCx - Diagnosis Current Control DCC18 switching ON/OFF diagnosis current of CH1-8 DCC9 switching ON/OFF diagnosis current of CH9 DCC10 switching ON/OFF diagnosis current of CH10 0 OFF-State Diagnosis (Detection of open load and short to GND) of CHx is switched OFF. ON state diagnosis (over current and over temperature detection) is still active. Diagnosis Current is switched OFF. 1 OFF-State (Detection of open load and short to GND) and ONState (over current and over temperature detection) Diagnosis of CHx switched ON, Diagnosis Current is switched ON default DCC = 1 Data Sheet R/W DBT2,1 - Diagnosis Blind Time Channel 7 to 10 0,0 standard Filter Time of typ. 150s 1,0 standard Filter Time of typ. 150s 0,1 OFF-state diagnosis Blind Time of typ. 2.5ms 1,1 OFF-state diagnosis Blind Time of typ. 5ms 71 Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Package Outlines Package Outlines 8 MAX. 1.1 7.6 -0.2 1) 0.65 0.7 0.2 C 17 x 0.65 = 11.05 0.33 0.08 2) 0.23 +0.09 0.35 x 45 2.55 MAX. 3) 0...0.10 STAND OFF 2.45 -0.2 13 0.1 C 36x SEATING PLANE 10.3 0.3 0.17 M A-B C D 36x D Bottom View A 19 19 Ejector Mark 36 Exposed Diepad 1 Index Marking Ey 36 18 1 18 B Ex 12.8 -0.21) Index Marking Ey 5.1 5.1 4.6 5.4 Ex 0.45 9.73 1.67 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.05 max. per side 3) Distance from leads bottom (= seating plane) to exposed diepad 4) Excluding the mold flash allowance of 0.3 max per side Ey Exposed Diepad Dimensions 4) Ex Leadframe Package PG-DSO-36-24, -41, -42 A6901-C001 7 A6901-C003 7 PG-DSO-36-38 A6901-C007 5.2 PG-DSO-36-38 PG-DSO-36-50 A6901-C008 6.0 PG-DSO-36-24, -38, -41, -42, -50-PO V09 0.65 17 x 0.65 = 11.05 Figure 43 PG-DSO-36 Exposed Pad Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 72 Dimensions in mm Rev. 1.4, 2013-07-02 TLE 8110 EE Smart Multichannel Switch Revision History 14 Revision History TLE8110EE Revision History: Rev. 1.4 2013-07-02 Rev. 1.4 Document Release Added pin names to Pin Configuration picture, Figure 3 Improved definition of Item 6.2.5 Improved definition of Item 6.2.11 Rev. 1.3.1 2011-05-26: Data Sheet Release New detailed description of device diagnosis in Chapter 8, polling procedure provided Load Clamping Energy measurement setup description added at Chapter 7.2 Removed LOTC-bit configuration/functionality, Parameters 10.1.9 and 10.2.12 with related footnote 2), both removed Figure. 20: Timing (CLn Over Current Latch...), removed Chapter 12.3.2, description reworked Added Figure 22 for Over-Current protection explanation Added Item 11.3.21, Item 11.3.22 for diagnosis clear/read delays Chapter 12.3.2, added description of Diagnosis Clear/Read delays Chapter 12.2.3.4 added to describe daisy-chain operation TOR-bit Functionality Removed Package name generalized to PG-DSO-36 Rev. 1.3 2011-05-02: Added Reverse Current Comparator Functionality Rev. 1.2 2011-02-02: Removed Reverse Current Comparator Functionality Rev. 1.11 2011-02-02: footnote added for EAR specs added footnotes 2) 3) 4) 5) in Chapter 7.3 Rev. 1.1 2011-01-10: EAS/EAR Spec Update for Single and Parallel Connection Parallel Connection factors removed, parallel EAR spec cleaned/updated, Chapter 7.4 EAR Cumulative Scenario removed, Chapter 7.2 EAR ratings cleaned/updated, Chapter 7.3 EAS ratings cleaned/updated, Chapter 4.1 Rev. 1.01 2010-12-01: Minor changes Clamping Energy Formula reorganized in Chapter 7.2, Equation for RL=0 removed Rev. 1.0 Data Sheet 2009-06-15: Data Sheet Release 73 Rev. 1.4, 2013-07-02 Edition 2013-07-02 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2013 Infineon Technologies AG All Rights Reserved. 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