SSW/I2N60A Advanced Power MOSFET FEATURES BVDSS = 600 V Avalanche Rugged Technology RDS(on) = 5.0 Rugged Gate Oxide Technology Lower Input Capacitance ID = 2 A Improved Gate Charge Extended Safe Operating Area D2-PAK Lower Leakage Current : 25 A (Max.) @ VDS = 600V Lower RDS(ON) : 3.892 (Typ.) I2-PAK 2 1 1 2 3 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS Characteristic Drain-to-Source Voltage Value o ID Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed VGS Gate-to-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy dv/dt Peak Diode Recovery dv/dt 1 O 6 + _ 30 A O 1 O 1 O O3 131 mJ 2 A 2 Total Power Dissipation (TC=25 oC ) Linear Derating Factor TJ , TSTG TL A 1.3 Total Power Dissipation (TA=25 oC ) * PD V 2 o IDM Units 600 Operating Junction and V 5.4 mJ 3.0 V/ns 3.1 W 54 W 0.43 W/ C o - 55 to +150 Storage Temperature Range o Maximum Lead Temp. for Soldering C 300 Purposes, 1/8" from case for 5-seconds Thermal Resistance Symbol R R R Characteristic Typ. Max. Junction-to-Case -- 2.32 JA Junction-to-Ambient * -- 40 JA Junction-to-Ambient -- 62.5 JC Units o C /W * When mounted on the minimum pad size recommended (PCB Mount). Rev. B (c)1999 Fairchild Semiconductor Corporation N-CHANNEL POWER MOSFET SSW/I2N60A Electrical Characteristics (TC=25 oC unless otherwise specified) Symbol Characteristic BVDSS Drain-Source Breakdown Voltage BV/TJ Breakdown Voltage Temp. Coeff. VGS(th) IGSS IDSS RDS(on) Min. Typ. Max. Units Gate Threshold Voltage 600 -- -- -- 0.77 -- 2.0 -- 4.0 VDS=5V,ID=250 A VGS=30V -- -- 100 -- -- -100 -- -- 25 -- -- 250 -- -- 5.0 VGS=10V,ID=1A 4 O VDS=50V,ID=1A 4 O Drain-to-Source Leakage Current Static Drain-Source On-State Resistance -- 1.37 -- Ciss Input Capacitance -- 315 410 Coss Output Capacitance -- 38 45 Crss Reverse Transfer Capacitance -- 14 17 td(on) Turn-On Delay Time -- 12 35 Rise Time -- 15 40 Turn-Off Delay Time -- 41 90 Fall Time -- 16 40 Qg Total Gate Charge -- 15 21 Qgs Gate-Source Charge -- 2.6 -- Qgd Gate-Drain( "Miller" ) Charge -- 6.7 -- tf V See Fig 7 Gate-Source Leakage , Reverse Forward Transconductance td(off) VGS=0V,ID=250 A V/ oC ID=250 A Gate-Source Leakage , Forward gfs tr V Test Condition nA A pF VGS=-30V VDS=600V o VDS=480V,TC=125 C VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=300V,ID=2A, ns RG=18 See Fig 13 4 O 5 O VDS=480V,VGS=10V, nC ID=2A See Fig 6 & Fig 12 4 O 5 O Source-Drain Diode Ratings and Characteristics Symbol Characteristic Min. Typ. Max. Units Test Condition IS Continuous Source Current -- -- ISM Pulsed-Source Current 1 O -- -- 6 VSD Diode Forward Voltage O -- -- 1.4 V TJ=25 oC ,IS=2A,VGS=0V trr Reverse Recovery Time -- 280 -- ns TJ=25 C ,IF=2A Qrr Reverse Recovery Charge -- 0.62 -- C diF/dt=100A/ s 4 2 A Notes ; 1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature O o 2 L=60mH, I =2A, V =50V, R =27 , Starting T =25 C O AS DD G J _ _ O3 ISD <_ 2A, di/dt < 80A/ s, VDD < BVDSS , Starting T J =25 oC _ 2% 4 Pulse Test : Pulse Width = 250 s, Duty Cycle < O Essentially Independent of Operating Temperature 5 O Integral reverse pn-diode in the MOSFET o 4 O N-CHANNEL POWER MOSFET SSW/I2N60A Fig 1. Output Characteristics Fig 2. Transfer Characteristics 100 ID , Drain Current 15V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V [A] ID , Drain Current [A] VGS Top : 10-1 @ Notes : 1. 250 s Pulse Test 2. TC = 25 oC 10-2 10-1 100 100 150 oC 10-1 @ Notes : 1. VGS = 0 V 25 oC 10-2 101 2 4 6 8 10 VGS , Gate-Source Voltage [V] [A] VDS , Drain-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage 10 8 IDR , Reverse Drain Current RDS(on) , [ ] Drain-Source On-Resistance 2. VDS = 50 V 3. 250 s Pulse Test - 55 oC VGS = 10 V 6 4 VGS = 20 V 2 @ Note : TJ = 25 oC 1 2 3 4 5 10-1 6 @ Notes : 1. VGS = 0 V 150 oC 2. 250 s Pulse Test 25 oC 10-2 0.2 0 0 100 ID , Drain Current [A] 0.4 0.6 0.8 1.0 1.2 VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage C iss [V] 400 Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd VGS , Gate-Source Voltage Capacitance [pF] 500 300 200 100 00 10 C oss @ Notes : 1. VGS = 0 V C rss 2. f = 1 MHz 101 VDS , Drain-Source Voltage [V] VDS = 120 V 10 VDS = 300 V VDS = 480 V 5 @ Notes : ID = 2.0 A 0 0 3 6 9 QG , Total Gate Charge [nC] 12 15 N-CHANNEL POWER MOSFET Fig 7. Breakdown Voltage vs. Temperature 1.2 1.1 1.0 0.9 Fig 8. On-Resistance vs. Temperature RDS(on) , (Normalized) Drain-Source On-Resistance BVDSS , (Normalized) Drain-Source Breakdown Voltage SSW/I2N60A @ Notes : 1. VGS = 0 V 2. ID = 250 A 0.8 -75 -50 -25 0 25 50 75 100 125 150 3.0 2.5 2.0 1.5 1.0 @ Notes : 1. VGS = 10 V 0.5 2. ID = 1.0 A 0.0 -75 175 -50 TJ , Junction Temperature [ oC] -25 0 25 50 75 100 125 150 175 TJ , Junction Temperature [ oC] Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature [A] Operation in This Area is Limited by R DS(on) ID , Drain Current 101 100 s 1 ms 10 ms 100 DC 10-1 @ Notes : 1. TC = 25 oC 2.0 1.5 1.0 0.5 2. TJ = 150 oC 3. Single Pulse 10-2 100 101 102 0.0 25 103 50 75 100 Tc , Case Temperature [ oC] VDS , Drain-Source Voltage [V] Thermal Response Fig 11. Thermal Response 100 D=0.5 @ Notes : 1. Z J C (t)=2.32 0.2 0.1 o C/W Max. 2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Z J C (t) 0.05 10- 1 ZJC(t) , ID , Drain Current [A] 2.5 0.02 0.01 PDM single pulse t1 t2 10- 2 10- 5 10- 4 10- 3 10- 2 10- 1 t 1 , Square Wave Pulse Duration 100 [sec] 101 125 150 N-CHANNEL POWER MOSFET SSW/I2N60A Fig 12. Gate Charge Test Circuit & Waveform " Current Regulator " 50K 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS Qgd Qgs VGS DUT 3mA R1 R2 Current Sampling (IG) Resistor Charge Current Sampling (ID) Resistor Fig 13. Resistive Switching Test Circuit & Waveforms RL Vout Vout 90% VDD Vin ( 0.5 rated VDS ) RG DUT Vin 10V 10% td(on) tr td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID BVDSS IAS ID RG C DUT ID (t) VDD VDS (t) VDD 10V tp tp Time N-CHANNEL POWER MOSFET SSW/I2N60A Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS -- IS L Driver VGS RG VGS VGS ( Driver ) Same Type as DUT VDD * dv/dt controlled by "RG" * IS controlled by Duty Factor "D" Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf Body Diode Forward Voltage Drop VDD TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 TinyLogicTM UHCTM VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. 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