MOTORCLA SC XSTRS/R F MOTOROLA ma SEMICONDUCTOR TECHNICAL DATA NPN Silicon Power Transistors Horizontal Deflection .. specifically designed for use in large screen color deflection circuits. Glass Passivated (Patented Photoglass) Triple Diffused Mesa Technology for Long Term Stability Collector-Emitter Voltage Vcg = 1500 Vde Collector-Emitter Sustaining Voitage VCEO{sus) = 700 Vde @ Switching Times with Inductive Loads, tf = 0.5 us (Typ) @ Ic = 4.5A @ Optimum Drive Condition Curves L2E D Bf uauzasy gosuaLl? 3 i 7733/3 BU508 BU508D BUSO8A BUS508AD POWER TRANSISTORS 8 AMPERES 1500 VOLTS Glass Base-Collector Junction "Ey" SUFFIX @ TO-218 Package for Low Cost Mounting @ Availabte with Internal Flyback Diode, D' Suffix CASE 340-02 TO-218AC MAXIMUM RATINGS Rating Symbol All Parts Unit Collector-Emitter Voltage VCEO(sus} 700 Vdc Collector-Emmiter Voltage VcES 1500 Vde Emitter Base Voltage Veg 5 Vde Collector Current Continuous Ic 8 Adc Peak(1) Icom 15 Base Current Continuous Ip 4 Ade Peak(1) Iam 6 Tota! Power Dissipation @ Tc = 25C Pp 126 Watts Derate above 25C 1 wre Operating and Storage Temperature Range Ty. Tstg -65 to +150 c THERMAL CHARACTERISTICS Characteristic Symboi Max Unit Thermal Resistance, Junction to Case Rac 1 CW Maximum Lead Temperature for Saldering Purposes, TL 275 C 1/8" from Case for 5 seconds (1) Pulse Test: Pulse Width = 5 ms, Duty Cycle < 10%, 3-372; MOTORCLA SC XSTRS/R F BU508, BU508D, BU508A, BUS08AD 12E D Bf cse7es4 o084ala i TT" 33-/3 ELECTRICAL CHARACTERISTICS (Tc = 25 unless otherwise noted) | Characteristic Symbot Min Typ Max | Unit OFF CHARACTERISTICS(1) Collector-Emitter sustaining voltage VCEO(sus) 700 - _ Vde (I = 100 mAds, Ip = 0} Collector Cutoff Current Ices mAde (Vce = 1500 Vde, Vgg = 0, Tc = 25C} - 0.1 (VcE = 1500 Vde, Vge = 0, Te = 125C} - - 2 Emitter Base Leakage BUSO8, A leBo 10, mAdc (Veg = 6V, Ic = 0) BU508D, AD 300 ON CHARACTERisTics(1) OC Current Gain hee 2,25 _ - _ (Ig = 4.5 Adc, Vcg = Vdc) Collector-Emitter Saturation Voltage BU508, D VcE(sat) - _- 3 Vde (le = 4.5 Ade, Ig = 2 Ade) BUSO8A, AD 1 Base Emitter Saturation Voltage VBE(sat) _ _ 1.3 Vde {Ic = 4.5 Ade, Ig = 2 Ade) Second Breakdown Collector Current with Base Isp See Forward Biased Figure 11 DYNAMIC CHARACTERISTICS Current-Gain Bandwidth Product fr - 7 - MHz (l = 0.1 Adc, Vcg = 5 Vde, frest = 1 MHz) Qutput Capacitance Cob _ 125 - pF {Vcog = 10 Vde, IE = 0, f = 0.1 MHz} SWITCHING CHARACTERISTICS (Ic = 4.5 Adc, Ip = 1.8 Ade, ts 8 us Fall Time LB = 10 uH, see Figure 1) tf 08 (1) Pulse Test: Pulse Width = 5 ms, Duty Cycle < 10%. Com +60V 1kS wf 130 & 10 mF 100V], 3 i005 W osw> '5750Hz 4s 37736 FREQ ADJ INSGHS) OS tc wt 7 Lote, $ 2000 AR 0.005 wt 1 , 05 W 1500 s L 15kS 2W MR918 1.2 f [e000 pF 1 (SELECTED To 3 in 66 (76S 1500 V) 10 pF 1k 8 . 180V PULSE WIDTH ADJ o- WA MPS-U04 5 50% DUTY CYCLE > Metso 9 2900 Ik > 10.2 gk? FAR 360 pF 5W + COM +125V = DRIVER TRANSFORMER (T1} 1 L Cc Ferrox cube pot core #4229P-L00-3C8 L mH uF Adjust gap for primary inductance Lp =70 mH (approximately 5 mil spacer) 3.5 0.87 0.013 45 0.67 0,017 Primary 230T #28 AWG (5 layers) @ Secondary 157 #22 AWG (1 layer) @ Secondary leakage inductance should be fess than 3 4H Use 3 mit mylar tape between each winding layer Figure 1. Switching Times Test Circuit 3-373MOTORCLA SC XSTRS/R F 12E D Bf caczasy ogaye14 7 i BU508, BU508D, BUS08A, BUSO8AD BASE DRIVE; The Key to Performance By now, the concept of controlling the shape of the turn-off base current is widely accepted and applied in horizontal de- flection design. The problem stems from the fact that good sat- uration of the output device, prior to turn-off, must be assured. This is accomplished by providing more than enough Igy to satisfy the lowest gain output device hrg at the end of scan Icny. Worst-case component variations and maximum high voltage loading must also be taken into account. If the base of the output transistor is driven by a very low impedance source, the turn-off base current will reverse very quickly as shown in Figure 2. This results in rapid, but only partial, collector turn-off, because excess carriers become trap- ped in the high resistivity collector and the transistor is still conductive. This is a high dissipation mode, since the collector voltage is rising very rapidly. The problem is overcome by add- ing Inductance to the base circuit to slow the base current re- versal as shown in Figure 3, thus allowing excess carrier recom- bination in the collector to occur while the base current is stil! flowing. Choosing the right Lg is usually done empirically, since the equivalent circuit Is complex, and since there are several im- portant variables (Ich, Ig1, and hee at Icny). One method is to plot fall time as a function of Lg, at the desired conditions, for T~ 33-13 several devices within the hgg specification. A more informative method is to plot power dissipation versus Igy for a range of values of Lg. This kind of analysis shows the parameter which really matters is dissipation, whether caused by switching or by saturation. The negative slope of these curves at the left (low 'g4) is caused by saturation losses. The positive slope portion at higher Igz, and low values of Lg is due to switching losses as described above. For very low Lg a very narrow optimum is obtained. This occurs when Ig1 hre = Icy, and therefore would be acceptable only for the typical device with constant Ica4. As Lg is Increased, the curves become broader and flatter above the lg7 hpe = Icy point as the turn-off tails are brought under control. Eventually, if Lg is raised too far, the dissipation all across the curve will rise, due to poor initiation of switching rather than tailing. Plotting this type of curve family for devices of different hee, essentially moves the curves to the left or right according to the relation {g1 hfe = constant. It then becomes obvious that, for a specified Icry, an Lg can be chosen which will give low dissipation over a range of hpg and/or Igy. The only remaining decision is to pick Ig1 high enough to accom- modate the lowest hrg part specified. Neither Lg nor Igy are absolutely critical, and should be selected for the specific re- quired condition. Similar curves relating to this discussion can be found on Motorolas data sheet for the BU207. TEST CIRCUIT WAVEFORMS (TIME) Figure 2. (TIME} Figure 3. TEST CIRCUIT OPTIMIZATION The test circuit may be used to evaluate devices in the con- ventional manner, i.e., to meaaure fall time, storage time, and saturation voltage, However, this circuit was designed to eval- uate devices by a simple criterion, power supply input. Excessive power input can be caused by a variety of problems, but it is the dissipation in the transistor that is of fundamental impor- tance, Once the required transistor operating current is deter- mined, fixed circuit values may be selected from the table. Fac- tory testing is performed by reading the current meter only, since the input power is proportional to current. No adjustment of the test apparatus is required. 3-374 weMOTORCLA SC XSTRS/R F L2E D Bj eaerasy ooa4aed 3 i BU508, BU508D, BU508A, BUS508AD hpg, de CURRENT GAIN 1 2 Ic. COLLECTOR CURRENT (AMPS} Figure 4. Typical dc Current Gain 7-33-73 2 an 2 > we Vcetsat) COLLECTOR-EMITTER VOLTAGE (VOLTS) 2 2 = o of Ic, COLLECTOR CURRENT (AMPS} Figure 5S. Typical Collector Saturation Voltage 28 _ 19 2 18 = B17 ie gy 1s ge 2 = 18 = 3 14 e = 16 13 4s E12 agi = 2: ag il 4 4 1 BE 08 g BE i 09 s #08 08 07 1 0.2 0.1 03 1 Ic, COLLECTOR CURRENT {AMPS) Ig. BASE CURRENT CONTINUOUS (AMPS) Figure 6. Typical Base Emitter Saturation Voltage Figure 7. Typical Collector Saturation Region 1.6 2 16 140 a ~ 14 a Fi E = 13 2 3 12 S 100 2 2 2 ge tai Bt 3 a 08 to D Suffix Devices on! e 297 * 20 0.6 0 O41 07 4 0 60 140 160 1 lec, DIODE FORWARD CURRENT (AMPS) Tc, CASE TEMPERATURE (C} Figure 8. Typical Damper Diode Forward Voltage* Figure 9. Power-Temperature Derating Curve 3-375* MOTORCLA SC XSTRS/R F L2eE D Bf uae7254 gos4sel s i BU508, BU508D, BU508A, BU508AD 77-3373 0.50 Rayclt) = rit) Raye Rac = 1CW MAX D CURVES APPLY FOR POWER 020 PULSE TRAIN SHOWN , READ TIME @ ty { | | | | Typ) Te = Pion) Rasctt! 0.10 Plot) ne = Pioxl Rauct L = DUTY CYCLE, D = ty Hit), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0.02 0.01 0.02 0.05 01 0.2 05 1 2 5 10 20 50 100 0 500 1000-2000 t, TIME (ms) Figure 10. Therma! Response 20 10 5 CASE 340-02 STYLE 1 TO-218AC PIN 1 BASE 3. EMITTER 2 2 COLLECTOR 4 COLLECTOR 1 fate* h 8 [as 0. 0.6 0.02 0.01 LY TT THERMAL LIMIT (SINGLE 0,005 0.002 2 p= ic, COLLECTOR CURRENT (AMPS) a [ wes on Kee 5 1 500 F tib-D COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 11. Maximum Forward Biased Safe Operating Area 2K Note (2) Operation In this area limited to Pulse Width < 20 ys, Duty Cycle < 0.25, Rgg < 100 ohms 3-376