MRF5035 - Motorola / Freescale Semiconductor

MRF5035MOTOROLA RF DEVICE DATA

The RF MOSFET Line

    

N–Channel Enhancement–Mode

Designed for broadband commercial and industrial applications at frequen-

cies to 520 MHz. The high gain and broadband performance of this device

makes it ideal for large–signal, common source amplifier applications in 12.5

volt mobile, and base station FM equipment.

•Guaranteed Performance at 512 MHz, 12.5 Volt

Output Power — 35 Watts

Power Gain — 6.5 dB Min

Efficiency — 50% Min

•Characterized with Series Equivalent Large–Signal Impedance Parameters

•S–Parameter Characterization at High Bias Levels

•Excellent Thermal Stability

•All Gold Metal for Ultra Reliability

•Capable of Handling 20:1 Load VSWR, @ 15.5 Volt, 512 MHz,

2 dB Overdrive

•Circuit board photomaster available upon request by contacting

RF Tactical Marketing in Phoenix, AZ.

MAXIMUM RATINGS

Rating Symbol Value Unit

Drain–Source Voltage VDSS 36 Vdc

Drain–Gate Voltage (RGS = 1 MΩ) VDGR 36 Vdc

Gate–Source Voltage VGS ± 20 Vdc

Drain Current — Continuous ID15 Adc

Total Device Dissipation @ TC = 25°C

Derate above 25°CPD97

0.56 Watts

W/°C

Storage Temperature Range Tstg – 65 to +150 °C

Operating Junction Temperature TJ200 °C

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction to Case RθJC 1.8 °C/W

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain–Source Breakdown Voltage (VGS = 0, ID = 20 mAdc) V(BR)DSS 36 — — Vdc

Zero Gate Voltage Drain Current (VDS = 15 Vdc, VGS = 0) IDSS — — 5 mAdc

Gate–Source Leakage Current (VGS = 20 Vdc, VDS = 0) IGSS — — 5 µAdc

(continued)

NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and

packaging MOS devices should be observed.

Order this document

by MRF5035/D



SEMICONDUCTOR TECHNICAL DATA



35 W, 12.5 VOLTS, 512 MHz

N–CHANNEL BROADBAND

RF POWER FET

CASE 316–01, STYLE 3

 Motorola, Inc. 1994

REV 6

MRF5035

2MOTOROLA RF DEVICE DATA

ELECTRICAL CHARACTERISTICS — continued (TC = 25°C unless otherwise noted.)

Characteristic Symbol Min Typ Max Unit

ON CHARACTERISTICS

Gate Threshold Voltage

(VDS = 10 Vdc, ID = 25 mAdc) VGS(th) 1.25 2.3 3.5 Vdc

Drain–Source On–Voltage

(VGS = 10 Vdc, ID = 3 Adc) VDS(on) — — 0.422 Vdc

Forward Transconductance

(VDS = 10 Vdc, ID = 3 Adc ) gfs 3.2 — — S

DYNAMIC CHARACTERISTICS

Input Capacitance

(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Ciss — 88 — pF

Output Capacitance

(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Coss — 197 — pF

Reverse Transfer Capacitance

(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Crss 18 24 29 pF

FUNCTIONAL TESTS (In Motorola Test Fixture)

Common–Source Amplifier Power Gain

(VDD = 12.5 Vdc, Pout = 35 W, f = 512 MHz

IDQ = 400 mA) f = 175 MHz

Gps 6.5

—7.5

12 —

—

Drain Efficiency

(VDD = 12.5 Vdc, Pout = 35 W, f = 512 MHz

IDQ = 400 mA) f = 175 MHz

η50

—55

55 —

—

Load Mismatch

(VDD = 15.5 Vdc, 2 dB Overdrive, f = 512 MHz,

Load VSWR = 20:1, All Phase Angles at Frequency of Test)

ψNo Degradation in Output Power

Components List

B1, B2 Short Ferrite Bead, Fair Rite Products

C1, C14 10 µF, 50 V, Electrolytic

C2 1500 pF, Chip Capacitor

C3 140 pF, Chip Capacitor

C4, C11 0–10pF, Trimmer Capacitor

C5 30 pF, Chip Capacitor

C6, C7 43 pF, Chip Capacitor

C8, C9 36 pF, Chip Capacitor

C10 3.6 pF, Chip Capacitor

C12, C15, C16 120 pF, Chip Capacitor

C13 0.1 µF, Chip Capacitor

L1 5 Turns, 18 AWG, 0.116″ ID

L2 8 Turns, 20 AWG, 0.125″ ID

N1, N2 Type N Flange Mount

R1 1 kΩ, 1/4 W, Carbon

R2 1 MΩ, 1/4 W, Carbon

R3 100 Ω, 1/4 W, Carbon

R4 110 Ω, 1/4 W, Carbon

Z1, Z9 Transmission Line*

Z2 Transmission Line*

Z3 Transmission Line*

Z4 Transmission Line*

Z7 Transmission Line*

Z8 Transmission Line*

Board Glass Teflon 0.060″

*See Photomaster for Dimensions

Figure 1. 512 MHz Narrowband Test Circuit Electrical Schematic

C15

RF Input N1

VGG R1

Z3Z1 Z2 RF Output

Z9C16Z8Z7

VDD

C14

C12

C13

C3 L1

C11

C10

DUT

R2 C1 C2

B1 Socket

C6 C9

C7 C8

+ +

MRF5035MOTOROLA RF DEVICE DATA

TYPICAL CHARACTERISTICS

Crss

Ciss

Coss

VGS = 0 V

f = 1 MHz

Typical Device Shown

f = 400 MHz

VDD = 12.5 V

Pin = 7 W

3 W

5 W

7 W

Pin = 10 W

3 W

5 W

7 W

Pin = 10 W

VDD = 12.5 V

IDQ = 400 mA

520 MHz

470 MHzf = 400 MHz

out, OUTPUT POWER (WATTS)

Figure 2. Output Power versus Input Power

Pin, INPUT POWER (WATTS)

Figure 3. Output Power versus Supply Voltage

08VDD, SUPPLY VOLTAGE (VOLTS)

122 6 10 14

out, OUTPUT POWER (WATTS)

Figure 4. Output Power versus Supply Voltage

VDD, SUPPLY VOLTAGE (VOLTS)

Figure 5. Output Power versus Gate Voltage

VGS, GATE–SOURCE VOLTAGE (VOLTS)

1 4

2 3

6 16

out, OUTPUT POWER (WATTS)

Figure 6. Drain Current versus Gate Voltage

VGS, GATE–SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance versus Voltage

05VDS, DRAIN–SOURCE VOLTAGE (VOLTS)

350

250

151 3 4 20

400

0 250

C, CAPACITANCE (pF)

300

200

100

150

8 12

9 11 13 157

08 10

12 14

6 16

9 11 13 157 65

ID, DRAIN CURRENT (AMPS)

IDQ = 400 mA

f = 400 MHz

IDQ = 400 mA

f = 520 MHz

520 MHz

VDS = 10 V

MRF5035

4MOTOROLA RF DEVICE DATA

TYPICAL CHARACTERISTICS

0.25 A

VDD = 12.5 V

IDQ = 5 A

ID, DRAIN CURRENT (AMPS)

Figure 8. Gate–Source Voltage

versus Case Temperature

(MHz) Zin

(Ω)ZOL*

(Ω)

400

420

440

460

1.0 + j0.89

0.83 + j0.81

0.90 + j0.83

0.82 + j0.83

0.87 + j2.1

0.79 + j2.2

0.73 + j2.3

0.71 + j2.4

VDD = 12.5 V, IDQ = 400 mA, Pin = 7.8 W,

Tune for Maximum Output Power

480 0.87 + j0.90 0.71 + j2.5

500 0.97 + j1.0 0.74 + j2.6

520 1.1 + j1.2 0.80 + j2.7

Zin = Conjugate of source impedance.

ZOL* = Conjugate of the load impedance at given

input power, voltage and frequency that

produces maximum output power.

175

Figure 9. DC Safe Operating Area

1.04

TC, CASE TEMPERATURE (

0.96

0.94 25

0.98

1.01

Figure 10. Series Equivalent Input and Output Impedance

VDS, DRAIN–SOURCE VOLTAGE (VOLTS)

100 50 100

1– 25 100

VGS, GATE-SOURCE VOLTAGE (NORMALIZED)

1.03

1.00

0.95

0.97

1.02

0.99

75 125 150

3.5 A

2 A

1 A TC = 25

Zin

f = 400 MHz

ZOL*

f = 400 MHz

Zo = 5

Ω

520

460

520

460

MRF5035MOTOROLA RF DEVICE DATA

Table 1. Common Source Scattering Parameters (VDS = 12.5 V)

ID = 100 mA

f S11 S21 S12 S22

MHz |S11|∠ φ|S21|∠ φ|S12|∠ φ|S22|∠ φ

100

150

200

300

400

450

500

600

0.74

0.77

0.81

0.85

0.90

0.93

0.94

0.95

0.96

–153

–164

–168

–170

–171

–174

–178

–179

179

176

6.9

3.4

1.6

0.69

0.38

0.24

0.20

0.17

0.12

0.039

0.036

0.032

0.028

0.019

0.013

0.010

0.008

– 5

–16

– 25

– 31

– 36

– 30

– 22

– 8

0.87

0.89

0.90

0.92

0.93

0.96

0.97

0.98

–169

–174

–176

–178

–179

179

177

175

174

172

ID = 400 mA

f S11 S21 S12 S22

MHz |S11|∠ φ|S21|∠ φ|S12|∠ φ|S22|∠ φ

100

150

200

300

400

450

500

600

0.88

0.89

0.91

0.92

0.93

0.94

0.95

–163

–172

–176

–178

–179

180

178

177

176

174

7.8

3.9

1.9

1.3

0.91

0.57

0.39

0.33

0.29

0.22

0.018

0.017

0.016

0.014

0.012

0.014

–1

– 2

–1

0.93

0.94

0.95

0.96

0.97

–175

–178

–180

179

178

177

175

174

173

171

ID = 1 A

f S11 S21 S12 S22

MHz |S11|∠ φ|S21|∠ φ|S12|∠ φ|S22|∠ φ

100

150

200

300

400

450

500

600

0.92

0.91

0.92

0.93

0.94

0.95

–165

–173

–177

–179

180

178

176

175

174

173

7.8

3.9

1.9

1.3

0.95

0.61

0.43

0.38

0.33

0.26

0.013

0.012

0.013

0.014

0.016

0.94

0.95

0.96

0.97

–177

–179

179

178

176

174

173

171

ID = 5 A

f S11 S21 S12 S22

MHz |S11|∠ φ|S21|∠ φ|S12|∠ φ|S22|∠ φ

100

150

200

300

400

450

500

600

0.94

0.95

0.96

–164

–172

–177

–179

179

177

176

175

174

172

7.2

3.6

1.8

1.2

0.89

0.57

0.42

0.36

0.32

0.26

0.010

0.011

0.013

0.014

0.017

0.95

0.96

0.97

–178

–180

179

178

177

176

174

173

172

171

MRF5035

6MOTOROLA RF DEVICE DATA

DESIGN CONSIDERATIONS

The MRF5035 is a common–source, RF power, N–Chan-

nel enhancement mode, Metal–Oxide Semiconductor Field–

Effect Transistor (MOSFET). Motorola RF MOSFETs feature

a vertical structure with a planar design. Motorola Application

Note AN211A, “FETs in Theory and Practice,” is suggested

reading for those not familiar with the construction and char-

acteristics of FETs.

This device was designed primarily for 12.5 volt VHF and

UHF Land Mobile FM power amplifier applications. The ma-

jor advantages of RF power MOSFETs include high gain,

simple bias systems, relative immunity from thermal run-

away, and the ability to withstand severely mismatched loads

without suffering damage.

MOSFET CAPACITANCES

The physical structure of a MOSFET results in capacitors

between all three terminals. The metal oxide gate structure

determines the capacitors from gate–to–drain (Cgd), and

gate–to–source (Cgs). The PN junction formed during fab-

rication of the RF MOSFET results in a junction capacitance

from drain–to–source (Cds). These capacitances are charac-

terized as input (Ciss), output (Coss) and reverse transfer

(Crss) capacitances on data sheets. The relationships be-

tween the inter–terminal capacitances and those given on

data sheets are shown below. The C iss can be specified in

two ways:

1. Drain shorted to source and positive voltage at the gate.

2. Positive voltage of the drain in respect to source and zero

volts at the gate.

In the latter case, the numbers are lower . However, neither

method represents the actual operating conditions in RF ap-

plications.

Drain

Cds

Source

Gate

Cgd

Cgs

Ciss = Cgd + Cgs

Coss = Cgd + Cds

Crss = Cgd

DRAIN CHARACTERISTICS

One critical figure of merit for a FET is its static resistance

in the full–on condition. This on–resistance, Rds(on), occurs in

the linear region of the output characteristic and is specified

at a specific gate–source voltage and drain current. The

drain–source voltage under these conditions is termed

Vds(on). For MOSFETs, Vds(on) has a positive temperature

coefficient at high temperatures because it contributes to the

power dissipation within the device.

GATE CHARACTERISTICS

The gate of the RF MOSFET is a polysilicon material, and

is electrically isolated from the source by a layer of oxide.

The input resistance is very high, on the order of 109 Ω, re-

sulting in a leakage current of a few nanoamperes.

Gate control is achieved by applying a positive voltage to

the gate greater than the gate–to–source threshold voltage,

VGS(th).

Gate Voltage Rating – Never exceed the gate voltage rat-

ing. Exceeding the rated VGS can result in permanent dam-

age to the oxide layer in the gate region.

Gate Termination – The gates of these devices are es-

sentially capacitors. Circuits that leave the gate open–cir-

cuited or floating must be avoided. These conditions can

result in turn–on of the devices due to voltage build–up on

the input capacitor due to leakage currents or pickup.

Gate Protection – These devices do not have an internal

monolithic zener diode from gate–to–source. If gate protec-

tion is required, an external zener diode is recommended

with appropriate RF decoupling networks.

Using a resistor to keep the gate–to–source impedance

low also helps dampen transients and serves another impor-

tant function. Voltage transients on the drain can be coupled

to the gate through the parasitic gate–drain capacitance. If

the gate–to–source impedance and the rate of voltage

change on the drain are both high, then the signal coupled to

the gate may be large enough to exceed the gate–threshold

voltage and turn the device on.

DC BIAS

Since the MRF5035 is an enhancement mode FET, drain

current flows only when the gate is at a higher potential than

the source. See Figure 6 for a typical plot of drain current

versus gate voltage. RF power FETs operate optimally with a

quiescent drain current (IDQ), whose value is application de-

pendent. The MRF5035 was characterized at IDQ = 400 mA,

which is the suggested value of bias current for typical ap-

plications. For special applications such as linear amplifica-

tion, IDQ may have to be selected to optimize the critical

parameters.

The gate is a dc open circuit and draws essentially no cur-

rent. Therefore, the gate bias circuit may generally be just a

simple resistive divider network. Some special applications

may require a more elaborate bias system.

MRF5035MOTOROLA RF DEVICE DATA

GAIN CONTROL

Power output of the MRF5035 may be controlled to some

degree with a low power dc control signal applied to the gate,

thus facilitating applications such as manual gain control,

ALC/AGC and modulation systems. Figure 5 is an example

of output power variation with gate–source bias voltage with

Pin held constant. This characteristic is very dependent on

frequency and load line.

AMPLIFIER DESIGN

Impedance matching networks similar to those used with

bipolar transistors are suitable for the MRF5035. For exam-

ples see Motorola Application Note AN721, “Impedance

Matching Networks Applied to RF Power Transistors.” Both

small–signal S–parameters and large–signal impedances

are provided. While the S–parameters will not produce an

exact design solution for high power operation, they do yield

a good first approximation. This is an additional advantage of

RF power MOSFETs.

Since RF power MOSFETs are triode devices, they are not

unilateral. This coupled with the high gain of the MRF5035

yield a device quite capable of self oscillation. Stability may

be achieved by techniques such as drain loading, input shunt

resistive loading, or output to input feedback. Different

stabilizing techniques may be required depending on the

desired gain and bandwidth of the application. The RF test

fixture implements a resistor in shunt with the gate to im-

prove stability. Two port stability analysis with the MRF5035

S–parameters provides a useful tool for selection of loading

or feedback circuitry to assure stable operation. See

Motorola Application Note AN215A, “RF Small–Signal

Design Using Two–Port Parameters,” for a discussion of two

port network theory and stability.

MRF5035

8MOTOROLA RF DEVICE DATA

PACKAGE DIMENSIONS

CASE 316–01

ISSUE D

STYLE 3:

PIN 1. SOURCE

2. DRAIN

3. SOURCE

4. GATE

NOTES:

1. FLANGE IS ISOLATED IN ALL STYLES.

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A24.38 25.14 0.960 0.990

B12.45 12.95 0.490 0.510

C5.97 7.62 0.235 0.300

D5.33 5.58 0.210 0.220

E2.16 3.04 0.085 0.120

F5.08 5.33 0.200 0.210

H18.29 18.54 0.720 0.730

J0.10 0.15 0.004 0.006

K10.29 11.17 0.405 0.440

L3.81 4.06 0.150 0.160

N3.81 4.31 0.150 0.170

Q2.92 3.30 0.115 0.130

R3.05 3.30 0.120 0.130

U11.94 12.57 0.470 0.495

EJB

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MRF5035/D

*MRF5035/D*

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