P-DIP-8-6
Data Sheet 1 1999-12-10
Off-line SMPS Controller with
600 V Sense CoolMOS on Board TDA16831-4
Preliminary Data CoolSET
P-DSO-14-11
Overview
Features
• PWM controller + sense CoolMOS
attached in one compac t package
• 600 V avalanche rugge d Coo lMO S
•Typical
RDSon = 0.5 ... 3.5 Ω at Tj = 25 °C
• Only 4 active Pins
• Standard DIP-8 Package for
Output Power ≤40 W
• Only few external components required
• Low start up current
• Current mode control
• Input Undervoltage Lockout
• Max. Duty Cycle limitation
• Thermal Shutdow n
• Modulated Gate Drive for low EMI
Type Ordering Code Package
TDA 16831 Q67000-A9420 P-DIP-8-6
TDA 16832 Q67000-A9422 P-DIP-8-6
TDA 16833 Q67000-A9389 P-DIP-8-6
TDA 16834 samples P-DIP-8-6
TDA 16831G Q67000-A9421 P-DSO-14-11
TDA 16832G Q67000-A9423 P-DSO-14-11
TDA 16833G Q67000-A9419 P-DSO-14-11
TDA 16831-4
Data Sheet 2 1999-12-10
1) TA = 70 °C
Device Output Power Range/
Required Heatsink1) Output Power Range/
Required Heatsink1)
Vin = 85-270 VAC Vin = 190-265 VAC
TDA 16831 10 W / no heatsink 10 W / no heatsink
TDA 16832 20 W / 6 cm220 W / no heatsink
TDA 16833 30 W / 3 cm240 W / no heatsink
TDA 16834 40 W / 3 cm240 W / no heatsink
TDA 16831G 10 W / no heatsink 10 W / no heatsink
TDA 16832G 20 W / 8 cm220 W / no heatsink
TDA 16833G 20 W / no heatsink 40 W / 3 cm2
TDA 16831-4
Data Sheet 3 1999-12-10
Pin Configurations
Figure 1 TDA 16831/2/3/4
P-DIP-8-6 for Applications with Pout ≤ 40 W: TDA 16831/2/3/4
Pin Symbol Function
1 N.C. Not Connected
2 FB PWM Feedback Input
3 N.C. Not Connected
4 D 600 V Drain Coo lMO S
5 D 600 V Drain Coo lMO S
6 N.C. Not Connected
7VCC PWM Supply Voltage
8 GND PWM GND and Source of CoolMOS
AEP02782
CC
V
N.C.
D
FB
18
72
N.C.63
D54
N.C. GND
TDA 16831-4
Data Sheet 4 1999-12-10
Figure 2 TDA 16831G/2G/3G
GND
N.C.
D
D
N.C.
8D
12
11
D
N.C.
1
2
3
4
5
N.C.
6
7
14
13
GND
FB
9
10
AEP02783
V
CC
D
D
P-DSO-14-11 for Applications with Pout ≤ 20 W: TDA 16831G/2G/3G
Pin Symbol Function
1 GND PWM GND and CoolMOS Source
2 FB PWM Feedback Input
3 N.C. Not Connected
4 N.C. Not Connected
5, 6, 7 D 600 V Drain CoolMOS
8, 9, 10 D 600 V Drain CoolMOS
11 N.C. Not Connected
12 N.C. Not Connected
13 VCC PWM Supply Voltage
14 GND PWM GND and Source of CoolMOS
TDA 16831-4
Data Sheet 5 1999-12-10
Figure 3 Block Diagram
pwmcomp
bandgap
kippl
J
K
kippl
tff
pwmop
v04sst
biaspwm
sst
R
SQ
Q
logpwm
gtdrv
csshutdown
tempshutdown
5
3
osc
Rsense
biaspwm
uvlo bias
Vcc
Drain
GND
FB
pwmpls
slogpwm
v04sst
pwmrmp
rlogpwm
alogpwm
slogpwm
RFB
Vref
pwmss
TDA 16831-4
Data Sheet 6 1999-12-10
Circuit Description
The TDA 1683 1-4 is a current m ode pulse
width modulator with integrated sense
CoolMOS transistor. It fulfills the
requirements of minimum external control
circuitry for a flyback application.
Current mode control means that the
current through the MOS transistor is
compared with a reference signal derived
from the output voltage of the flyback
application. The result of that comparison
determines the on time of the MOS
transistor.
To minimize external circuitry the sense
resistor which gives information about
MOS current is integrated. The oscillator
resistor and capacitor which determine the
switching frequency are integrated, too.
Special efforts have been made to
compensate temperature dependency and
to minimize tolerances of this resistor.
The circuit in detail: (see Figure 3)
Start Up Circuit (uvlo)
Uvlo is monitoring the external supply
voltage VCC. When VCC is exceeding the on
threshold VCCH = 12 V, the bandgap, the
bias circuit and the soft start circuit are
switched on. When VCC is falling below the
off-threshold VCCL = 9 V the circuit is
switched off. During start up the current
consumption is about 30 µA.
Bandgap (bg)
The bandgap generates an internal very
accurate reference voltage of 5.5 V to
supply the internal circuits.
Current Source (bias)
The bias circuit provides the internal
circuits with constant current.
Oscillator (osc)
The oscillator is generating a frequency
twice the switching frequency
fswitch = 100 kHz. Resistor, capacitor and
current source which determine the
frequency are integrated. The charging
and discharging current of the
implemented oscillator capacitor is
internally trimmed, in order to achieve a
very accurate switching frequency.
Temperature coefficient of switching
frequency is very low ( see page 19).
Divider Flip Flop (tff)
Tff is a flip flop which d ivides the oscil lator
frequency by one half to create the
switching frequency. The maximum duty
cycle is set to Dmax = 0.5.
Current Sense Amplifier (pwmop)
The positive inpu t of the pwmop is applied
to the internal sense resistor. With the
internal sense resistor (Rsense) the sensed
current coming from the CoolMOS is
converted into a sense voltage. The sense
voltage is amplified with a gain of 32 dB.
The amplified sense voltage is connected
to the negative input of the pwm
comparator. Each time when the CoolMOS
transistor is switched on, a current spike is
superposed to the true current information.
To eliminate this current spike the sense
voltage is smoothed via an internal resistor
capacitor network with a time constant of
Td1 = 10 0 ns. This is the first le ading edge
blanking and only a small spike is left. To
reduce this small spike the current sense
amplifier is creating a virtual ramp at the
output. This is done by a second resistor
capacitor network with Td2 = 100 ns and an
op-offset of 0.8 V which is seen at the
output of the amp lifier. When gate drive is
TDA 16831-4
Data Sheet 7 1999-12-10
switched off the output capacitor is
discharged via pulse signal pwmpls. The
oscillator signal slogpwm sets the RS-flip-
flop. The gate drive circuit is switched on,
when capacitor voltage exceeds the
internal thres hold of 0.4 V. This lead s to a
linear ramp, which is created by the output
of the amplifier. Therefore duty cycle of
0 % is possible. The amplifier is
compensated through an internal compen-
sation network .
The transfer function of the amplifier can
be described as
the step response is described with
Comparator (pwmcomp)
The comparator pwmcomp compares the
amplified current signal pwmrmp of the
CoolMOS with the reference signal pwmin.
Pwmin is created by an external
optocoupler or external transistor and
gives the information of the feedback
circuitry. When the pwmrmp exceeds the
reference signal pwmin the comparator
switches the CoolMOS off.
Logic (logpwm)
The logic logpwm comprises a RS-flip-flop
and a NAND-gate. The NAND-gate
insures that CoolMOS transistor is only
switched on when sosta is on and pwmin
has exceeded minimum threshold and
pwmin is below pwmrmp and
currentshut down is off and tempsh utdown
is off and tff sets the starting impulse.
CoolMOS transistor is switched off when
pwmrmp exceeds pwmin or duty cycle
exceeds 0.5 or pwmcs exceeds Imax or
silicium temperature exceeds Tmax or uvlo
is going below threshold. The RS flip flop
ensures that with every frequency period
only one switch on can occur (double pulse
suppression).
Gate Drive (gtdrv)
Gtdrv is the driver circuit fo r the CoolMOS
and is optimized to minimize EMI
influences and to provide high circuit
efficiency. This is done by smoothing the
switch on slope when reaching the
CoolMOS threshold. Leading switch on
spike is minimized then. When CoolMOS
is witched off, the falling slope of the gate
driver is slowed down when reaching 2 V.
So an overshoot below ground can't occur.
Also gate drive circuit is designed to
eliminate cross conduction of the output
stage.
Current Shut Down (cssd )
Current shut down circuit switches the
CoolMO S immediate ly off when the se nse
current is exceed ing an int ernal th reshold
of 100 mV at Rsense.
Vo
Vi
----- Ki
p1Tp×+()×
------------------------------------ p;jω==
VoViKi
×=ton T–Te
-ton
T
----------
×+
è
ç÷
æö
×
Ki40
ton
------=
T850 ns=
TDA 16831-4
Data Sheet 8 1999-12-10
Tempshutdown (tsd)
Tempshut down switches the Coo lMOS off
when junction temperature of the PWM
controller is exceeding an internal
threshold.
TDA 16831-4
Data Sheet 9 1999-12-10
Figure 4 Signal Diagram
AED02766
kippl,
f
= 200 kHz
(oscillator)
= 100 kHz
(tff)
pwmpls,
f
slogpwm
(tff)
(pwmop)
pwmrmp
alogpwm
(pwmcomp)
(pwmcomp)
rlogpwm
gtrdrv
Q
(logpwm)
FB
V
op-offset = 0.8 V
Gate Start
at 0.4 V
TDA16831-4
Data Sheet 10 1999-12-10
Electrical Characteristics
1) Be aware that VCC capacitor is discharged before IC is plugged into the application board.
2) Power dissipation should be observed.
Absolute Maximum Ratings
Parameter Symbol Limit Values Unit Remarks
min. max.
Supply Voltage
Supply + Zener Current
VCC
ICCZ
–0.3
0
VZ
20
V
mA
Zener Voltage 1)
page 11
Beware of Pmax 2)
Drain Source Voltage
Avalanche Current VDS
IAC
600
Icsthmax
Vt = 100 ns
Voltage at FB VFB –0.3 5.5 V
Junction Temperature Tj–40 150 °C
Storage Temp eratu re Tstg –50 150 °C
Thermal Resistance System-Air RthSA
RthSA
90
125 K/W
K/W P-DIP-8-6
P-DSO-14-11
Operating Range
Parameter Symbol Limit Values Unit Remarks
min. max.
Supply Voltage VCC VCCH VZV
Junction Temperature Tj–25 120 °C
TDA 16831-4
Data Sheet 11 1999-12-10
Supply Section
-25 °C < Tj < 120 °C, VCC = 15 V
Parameter Symbol Limit Values Unit Test Conditions
min.
typ. max.
Quiescent Current
Supply Current Active
Supply Current Active
Supply Current Active
ICCL
ICCHA
ICCHA
ICCHA
25
4.5
6
7
80
6
7.5
8.5
µA
mA
mA
mA
TDA 16831/2/G
TDA 16833/G
TDA 16834
VCC Turn-On Threshold
VCC Turn-Off Threshold
VCC Turn-On/Off Hysteresis
VCC Zener Clamp
VCCH
VCCL
VCCHY
VZ
8.5
16
12
9
3
17.5
12.5
19
V
V
V
V
Controller Thermal Shutdown
Thermal Hysteresis TjSD
TjHy
120 135
2150 °C
°C
TDA 16831/2/3/G/4
Oscillator Section
-25 °C < Tj < 120 °C, VCC = 15 V
Parameter Symbol Limit Values Unit Test Conditions
min.
typ. max.
Accuracy f 90 100 110 kHz
Temperature Coefficient TK f
1000
ppm/°C
TDA16831-4
Data Sheet 12 1999-12-10
1) Guaranteed by design
2) For discontinuous mode the VFB is desc ribe d by:
T1 = 850 ns; T2 = 200 ns
PWM Section
Parameter Symbol Limit Values Unit Test Conditions
min.
typ. max.
Duty Cycle D 0 0.5
Trans Impedance ∆VFB / ∆IDrain 2)
OP Gain Bandwidth 1)
OP Phase Margin 1)
ZPWM
ZPWM
ZPWM
Bw
Phim
4
2
1.3
2
70
V/A
V/A
V/A
MHz
degree
TDA16831/G
TDA16832/G
TDA16833/G/4
VFB Operating Range min. Level
VFB Operating Range max. Level
Feedback Resistance
Tempera ture Co effic ien t RFB
Internal Reference Voltage
Tempera ture Co effic ien t Vrefint
VFBmin
VFBmax
RFB
RFBTK
Vrefint
Vreftk
0.45
3.5
3.0
5.3
3.7
600
5.5
0.2
0.85
4.8
4.9
5.7
V
V
KΩ
ppm/°C
V
mV/°C
for D = 0
Ics = 0.95 Icsth
VFB ZPWM IPK
ton
--------
×ton T1T1e
-ton
T1
----------
×+–
è
ç÷
ç÷
æö
×0.61e
-ton
T2
----------
–
è
ç÷
ç÷
æö
×+=
TDA 16831-4
Data Sheet 13 1999-12-10
i
Output Section
Parameter Symbol Limit Values Unit Test Conditions
min.
typ. max.
Drain Source Breakdown Voltage
Drain Source On-Resistance
Zero Gate Voltage Drain Current
Output Ca pac itan ce
Avalanche Current
V(BR)DSS
RDson
RDson
RDSon
RDson
RDSon
RDson
IDSS
COSS
IAR
600
3.5
1
0.5
0.5
25
I
csthmax
9
2.7
1.6
50
V
Ω
Ω
Ω
Ω
Ω
Ω
µA
pF
A
TA = 25 °C
TA = 25 °C:
TDA 16831/2/G
TDA 16833/G
TDA 16834
-25<TA<120 °C:
TDA 16831/2/G
TDA 16833/G
TDA 16834
VGS = 0
TDA 16833
tDR = 100 ns
Isource Current Limi t Threshold
Time Constant Icsth
Icsth
Icsth
Icsth
Icsth
tcsth
0.6
1.2
2.2
2.2
0.9
1.8
2.9
2.9
300
1.4
2.7
4.8
4.8
A
A
A
A
ns
TDA 16831/G
TDA 16832/G
TDA 16833/G
TDA 16834
Rise Time
Fall Time trise
tfall
70
50 ns
ns
TDA 16831-4
Data Sheet 14 1999-12-10
Application Circuit
Figure 5 TDA 16831G/2G/3G: 4 Active Pins, Version without Soft Start
85...270VAC
Vcc Drain
FB
CoolMOS
PWM
Controller
GND
TDA18831-4
AC
TDA 16831-4
Data Sheet 15 1999-12-10
Quiescent Current versus
Temperature
Turn On/Off Supply Voltage versus
Temperature
Supply Current Active versus
Temperature
Turn On/Off Hysteresis
AED02767
T
CCL
I
-25
00 25 50 75 ˚C 125
5
10
15
20
25
30
A
µ
AED02769
T
CC
V
-25
80 25 50 75 ˚C 125
8.5
9
9.5
10
10.5
11
11.5
12
12.5
V
V
CCH
CCL
V
AED02768
T
CCH
I
-25
30 25 50 75 ˚C 125
3.5
4
4.5
5
5.5
6
mA TDA 16833
TDA 16831/2
AED02770
T
CCHY
V
-25
2.6 025 50 75 ˚C125
2.65
2.7
2.75
2.8
2.85
2.9
V
TDA 16831-4
Data Sheet 16 1999-12-10
VCC Zener Clamp
Maximum Duty Cycle ver sus
Temperature TDA 16831/2/3/G/4
Switching Frequency versus
Temperature
Operational Amplifie r Phase and
Amplitude versus Frequency
AED02771
T
Z
V
-25
16 0 25 50 75 ˚C 125
16.5
17
17.5
18
18.5
19
V
AED02773
T
-25
45 0 25 50 75 ˚C 125
45.5
46
46.5
47
47.5
48
48.5
49
50
%
Duty-cycle
AED02772
T
f
-25
90 0 25 50 75 ˚C 125
92
94
96
98
100
102
104
106
110
kHz
AED02774
f
A
-20
-10
0
10
20
30
40
dB
kHz -200
-180
-160
-140
-120
-100
-80
-60
-40
Grad
0
ϕ
1001
10 2
10 4
10
/Grad
A
/dB
ϕ
TDA 16831-4
Data Sheet 17 1999-12-10
Feedback Voltage Operating Range
versus Temperature
RDSon versus Temperature
Feedback Voltage versus
Feedback Current
TDA 16833 Output Capacitance COSS
versus VDS
AED02775
T
-25
00255075 ˚C 125
0.5
1
1.5
2
2.5
3
3.5
4
5
V
V
FB
For D = 0
CS
I
CSTH
I
= 0.95For
AED02777
T
DSON
R
-25
00 25 50 75 ˚C 125
Ω
1
2
3
4
5
6
7
8
TDA 16831
TDA 16833
AED02776
FB
0
0
1
2
3
4
5
6
V
FB
I
0.5 1 1.5mA
Temp = 25
Temp = 130
V
AED02778
40
050 60 70 80 V 100
10
20
30
40
50
60
70
80
100
pF
C
OSS
V
DS
TDA 16831-4
Data Sheet 18 1999-12-10
Isource Current Limit Threshold Icsth
versus Temperature Normalized Overcurrent Shutdow n
versus Drain Current Slope
AED02779
T
CSTH
I
-25
00 25 50 75 ˚C 125
0.5
1
1.5
2
2.5
3
3.5
ATDA 16833
TDA 16832
TDA 16831
AED02780
t
I
0
0246 10
1
2
3
4
5
6
CSTH
I
d
I
d
A /
µ
s
TDA 16831
TDA 16832
TDA 16833
Drain
TDA 16831-4
Data Sheet 19 1999-12-10
Package Outlines
P-DIP-8-6
(Plastic Dual In-line Package)
GPD05583
TDA16831-4
Data Sheet 20 1999-12-10
P-DSO-14-11
(Plastic Dual Small Outline)
GPS09222
Sorts of Pack ing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.Dimensions in mm
SMD = Surface Mounted Device
TDA 16831-4
Data Sheet 21 1999-12-10
TDA 16831-4
Revision History: Current Version: 1999-11-08
Previous Version:
Page
(in previous
Version)
Page
(in current
Version)
Subjects (major changes since last revision)
Published by Infineon Technologies AG i. Gr.,
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D-81541 München
©
Infineon Technologies AG1999
All Rights Reserved.
Attention please!
T
he information herein is given to describe certain components and shall not be considered as warranted charac teristics.
T
erm s of deliver y and r ight s t o tec hnical change reser ved.
W e hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and
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