Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
CLC1020
General Purpose, Rail to Rail Output Amplier
Rail to Rail Ampliers
ESURGENT
S E M I C O N D U C T O R
© 2018 Resurgent Semiconductor, LLC 1 / 15 Rev 1B.R
FEATURES
n 127μA supply current
n 2.1MHz gain bandwidth
n Input voltage range with 5V supply:
-0.4V to 4.3V
n Output voltage range with 5V supply:
0.01V to 4.99V
n 2.7V/μs slew rate
n 0.7pA bias current
n 0.1mV input offset voltage
n No crossover distortion
n Fully specied at 2.7V and 5V supplies
n Pb-free TSOT-5
APPLICATIONS
n Portable/battery-powered applications
n Mobile communications, cell phones,
pagers
n ADC buffer
n Active lters
n Portable test instruments
n Medical Equipment
n Portable medical instrumentation
General Description
The COMLINEAR CLC1020 is a single channel, high-performance, voltage
feedback amplier. The CLC1020 provides 2.1MHz gain bandwidth product
and 2.7V/μs slew rate making it well suited for high-performance battery
powered-systems. This COMLINEAR high-performance amplier also offers
low input offset voltage and low bias current.
The COMLINEAR CLC1020 consumes only 127μA supply current and is
designed to operate from a supply range of 2.7V to 5.5V (±1.35 to ±2.75).
The input voltage range extends 400mV below the negative rail and 700mV
below the positive rail. The CLC1020 amplier operates over the extended
temperature range of -40°C to +125°C.
The CLC1020 is packaged in the space saving TSOT-5 package. The TSOT-5
package is pin compatible with the SOT23-5 package.
Typical Performance Examples
Ordering Information
Part Number Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method
CLC1020IST5X TSOT-5 Yes Yes -40°C to +85°C Reel
Moisture sensitivity level for all parts is MSL-1.
μ
Ω
V
in
= 1Vpp
Vout vs. Vcm Slew Rate vs. Supply Voltage
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 2 / 15 Rev 1B.R
CLC1020 Pin Conguration CLC1020 Pin Assignments
Pin No. Pin Name Description
1+IN Output
2-VSNegative supply
3-IN Positive input
4 OUT Negative input
5 +VSPositive supply
2
3
5
4
-IN
+V
S
OUT
1
-V
S
+IN
-
+
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 3 / 15 Rev 1B.R
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper de-
vice function. The information contained in the Electrical Characteristics tables and Typical Performance plots reect the
operating conditions noted on the tables and plots.
Parameter Min Max Unit
Supply Voltage 7V
Input Voltage Range -VS-0.4V +VS V
Continuous Output Current Output is protected against momentary short circuit
Reliability Information
Parameter Min Typ Max Unit
Junction Temperature 150 °C
Storage Temperature Range -65 150 °C
Lead Temperature (Soldering, 10s) 260 °C
Package Thermal Resistance
5-Lead TSOT 215 °C/W
Notes:
Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
ESD Protection
Product TSOT-5
Human Body Model (HBM) 2kV
Charged Device Model (CDM) 2kV
Recommended Operating Conditions
Parameter Min Typ Max Unit
Operating Temperature Range -40 +85 °C
Supply Voltage Range 2.7 5.5 V
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 4 / 15 Rev 1B.R
Electrical Characteristics at +2.7V
TA = 25°C, Vs = +2.7V, Rf = 10kΩ, RL=10kΩ to VS/2, G = 2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Frequency Domain Response
GBWP Gain Bandwidth Product VOUT=0.2Vpp, CL = 200 pF, RL = 10kΩ, G=11 2 MHz
UGBW Unity Gain Bandwidth VOUT = 0.2Vpp , RL = 10kΩ, G=1 1.6 MHz
BWSS -3dB Bandwidth VOUT = 0.2Vpp, RL = 10kΩ, G=2 836 kHz
BWLS Large Signal Bandwidth VOUT = 2Vpp, RL = 10kΩ, G=2 540 kHz
GmGain Margin G=1 22 dB
ΦmPhase Margin G=1 82 °
Time Domain Response
tR , tSRise and Fall Time VOUT = 2V step, RL = 10kΩ 840 ns
tSSettling Time to 0.1% VOUT =2Vpp, RL = 10kΩ 1.6 µs
OS Overshoot VOUT=2Vpp, RL = 10kΩ 5.5 %
SR Slew Rate VOUT=2Vpp, RL = 10kΩ 2.3 V/µs
Distortion/Noise Response
HD2 2nd Harmonic Distortion 2Vpp, 10kHz, RL = 10kΩ -61 dBc
HD3 3rd Harmonic Distortion 2Vpp, 10kHz, RL = 10kΩ -70 dBc
THD Total Harmonic Distortion 2Vpp, 10kHz, G=1, RL = 10kΩ 0.094 %
enInput Voltage Noise f=100Hz 54 nV/√Hz
f=1kHz 30 nV/√Hz
f=10kHz 17 nV/√Hz
DC Performance
VIO Input Offset Voltage 0.53 mV
dVIO Average Drift 2.1 µV/°C
IbInput Bias Current 0.5 pA
Ios Input Offset Current 0.1 pA
PSRR Power Supply Rejection Ratio DC 73 dB
ISSupply Current 111 µA
Input Characteristics
RIN Input Resistance Non-inverting Input 29 GΩ
CIN Input Capacitance Non-inverting 2.4 pF
CMIR Common Mode Input Range For VCM≤50dB -0.4 to
2.0 V
CMRR Common Mode Rejection Ratio DC , Vcm=0V to 1.7V 70.5 dB
Output Characteristics
VOUT Output Voltage Swing RL = 2kΩ 0.02 to
2.63
V
RL = 10kΩ 0.01 to
2.68
V
ISC Short-Circuit Output Current Sourcing, VOUT = 0V, G=1 18 mA
Sinking, VOUT = 2.7V, G=1 58 mA
Notes:
1. 100% tested at 25°C
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 5 / 15 Rev 1B.R
Electrical Characteristics at +5V
TA = 25°C, Vs = +5V, Rf = 10kΩ, RL=10kΩ to VS/2, G = 2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Frequency Domain Response
GBWP Gain Bandwidth Product VOUT=0.2Vpp, CL = 200pF, RL = 10kΩ, G=11 2.1 MHz
UGBW Unity Gain Bandwidth VOUT = 0.2Vpp , RL = 10kΩ, G=1 1.8 MHz
BWSS -3dB Bandwidth VOUT = 0.2Vpp, RL = 10kΩ, G=2 907 kHz
BWLS Large Signal Bandwidth VOUT = 2Vpp, RL = 10kΩ, G=2 576 Hz
GmGain Margin G=1 18 dB
ΦmPhase Margin G=1 90 °
Time Domain Response
tR , tSRise and Fall Time VOUT =2V step, RL = 10kΩ 670 ns
tSSettling Time to 0.1% VOUT =2Vpp, RL = 10kΩ 1.6 µs
OS Overshoot VOUT=2Vpp, RL = 10kΩ 5.9 %
SR Slew Rate VOUT=4Vpp, RL = 10kΩ 2.7 V/µs
Distortion/Noise Response
HD2 2nd Harmonic Distortion VOUT=2Vpp, 10kHz, RL = 10kΩ -67 dBc
HD3 3rd Harmonic Distortion VOUT=2Vpp, 10kHz, RL = 10kΩ -68 dBc
THD Total Harmonic Distortion VOUT=2Vpp, 10kHz, RL = 10kΩ 0.057 %
enInput Voltage Noise f=100Hz 57 nV/√Hz
f=1kHz 30 nV/√Hz
f=100kHz 18 nV/√Hz
DC Performance
VIO Input Offset Voltage(1) 0.1 6 mV
dVIO Average Drift 1.1 µV/°C
IbInput Bias Current (1) 0.7 250 pA
Ios Input Offset Current (1) 0.1 pA
PSRR Power Supply Rejection Ratio (1) DC 60 73 dB
AOL Open-Loop Gain (1) VOUT = VS / 2 70 122 dB
ISSupply Current (1) per channel 127 170 µA
Input Characteristics
RIN Input Resistance Non-inverting Input 40 GΩ
CIN Input Capacitance Non-inverting Input 2.2 pF
CMIR Common Mode Input Range For VCM≤50dB -0.3 -0.4 to
4.3 4.2 V
CMRR Common Mode Rejection Ratio (1) DC , Vcm= 0V to 4V 60 67 dB
Output Characteristics
VOUT Output Voltage Swing RL = 2kΩ 4.93 4.96 to
0.02
0.04 V
RL = 10kΩ (1) 4.97 4.99 to
0.01
0.02 V
ISC Short-Circuit Output Current Sourcing, VOUT = 0V, G=1 30 69 mA
Sinking, VOUT = 5V, G=1 80 150 mA
Notes:
1. 100% tested at 25°C
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 6 / 15 Rev 1B.R
Typical Performance Characteristics - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Freq. Resp. vs. CL RL=1kΩ +5V Freq. Resp. vs. CL RL=1kΩ +2.7V
Non-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse Response
Inverting Freq. Resp. +2.7V
Inverting Freq. Resp. +5V
Non-Inverting Freq. Resp. +2.7VNon-Inverting Freq. Resp. +5V
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 7 / 15 Rev 1B.R
Typical Performance Characteristics - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Large Signal Freq. Resp. +5V Large Signal Freq. Resp. +2.7V
Non-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse Response
Freq. Resp. vs. RL +2.7V
Freq. Resp. vs. RL +5V
Freq. Resp. vs. CL RL=1MΩ +2.7VFreq. Resp. vs. CL RL=1MΩ +5V
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 8 / 15 Rev 1B.R
Typical Performance Characteristics - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
μ
Ω
V
in
= 1Vpp
-3db BW vs Output Amplitude +5V -3db BW vs Output Amplitude +2.7V
Non-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse Response
Slew Rate vs. Supply Voltage
Open Loop Gain & Phase vs. Temp +5V
Open Loop Gain & Phase vs. Freq. +2.7VOpen Loop Gain & Phase vs. Freq. +5V
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 9 / 15 Rev 1B.R
Typical Performance Characteristics - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Ω
Ω
Ω)
Ω
Ω
μs/div)
Output Impedance vs. Freq. Large Signal Pulse Response
Non-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse Response
THD vs. Freq.
Input Voltage Noise vs. Freq.
PSRR vs. Freq.CMRR vs. Freq.
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 10 / 15 Rev 1B.R
Typical Performance Characteristics - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Ω
Output Swing vs. Supply Voltage Input Current vs. Temperature
Non-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse ResponseNon-Inverting Small Signal Pulse Response
VOUT vs. VCM +5V
VIO vs. Supply Voltage
VIO vs. CMR 2.7VVIO vs. CMR +5V
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 11 / 15 Rev 1B.R
Application Information
General Description
The CLC1020 is a single supply, general purpose, voltage-
feedback amplier fabricated on a CMOS process. The
CLC1020 offers 2.1MHz gain bandwidth product, 2.7V/μs
slew rate, and only 127μA supply current. It features a rail to
rail output stage and is unity gain stable.
The common mode input range extends to 400mV below
ground and to 700mV below Vs. Exceeding these values
will not cause phase reversal. However, if the input voltage
exceeds the rails by more than 0.5V, the input ESD devices
will begin to conduct. The output will stay at the rail during
this overdrive condition.
The output stage is short circuit protected and offers “soft”
saturation protection that improves recovery time. Figures
1, 2, and 3 illustrate typical circuit congurations for non-
inverting, inverting, and unity gain topologies for dual supply
applications. They show the recommended bypass capacitor
values and overall closed loop gain equations. Figure 4
shows the typical non-inverting gain circuit for single supply
applications
+
-
Rf
0.1μF
6.8μF
Output
G = 1 + (Rf/Rg)
Input
+V
s
-Vs
Rg
0.1μF
6.8μF
RL
Figure 1. Typical Non-Inverting Gain Circuit
+
-
Rf
0.1μF
6.8μF
Output
G = - (Rf/Rg)
For optimum input offset
voltage set R1 = Rf || Rg
Input
+Vs
-Vs
0.1μF
6.8μF
RL
Rg
R1
Figure 2. Typical Inverting Gain Circuit
+
-
0.1uF
6.8uF
Output
G = 1
Input
+Vs
-Vs
0.1uF
6.8uF
RL
Figure 3. Unity Gain Circuit
+
-Rf
0.1μF
6.8μF
Out
In
+Vs
+
Rg
Figure 4. Single Supply Non-Inverting Gain Circuit
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 2kΩ load condition. However, applications
with low impedance, DC coupled loads should be analyzed
to ensure that maximum allowed junction temperature
is not exceeded. Guidelines listed below can be used to
verify that the particular application will not cause the
device to operate beyond its intended operating range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
temperature, the package thermal resistance value
ThetaJA (ӨJA) is used along with the total die power
dissipation.
TJunction = TAmbient + (ӨJA × PD)
Where TAmbient is the temperature of the working environment.
In order to determine PD, the power dissipated in the load
needs to be subtracted from the total power delivered by
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 12 / 15 Rev 1B.R
the supplies.
PD = Psupply - Pload
Supply power is calculated by the standard power
equation.
Psupply = Vsupply × IRMS supply
Vsupply = VS+ - VS-
Power delivered to a purely resistive load is:
Pload = ((VLOAD)RMS2)/Rloadeff
The effective load resistor (Rloadeff) will need to include
the effect of the feedback network. For instance,
Rloadeff in Figure 3 would be calculated as:
RL || (Rf + Rg)
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, PD can be found from
PD = PQuiescent + PDynamic - PLoad
Quiescent power can be derived from the specied IS
values along with known supply voltage, VSUPPLY. Load
power can be calculated as above with the desired signal
amplitudes using:
(VLOAD)RMS = VPEAK / √2
( ILOAD)RMS = ( VLOAD)RMS / Rloadeff
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS
Assuming the load is referenced in the middle of the power
rails or Vsupply/2.
The CLC1020 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions.
Driving Capacitive Loads
Increased phase delay at the output due to capacitive
loading can cause ringing, peaking in the frequency
response, and possible unstable behavior. Use a series
resistance, RS, between the amplier and the load to help
improve stability and settling performance. Refer to Figure
5.
+
-
Rf
Input
Output
Rg
Rs
CLRL
Figure 5. Addition of RS for Driving Capacitive Loads
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of
additional overshoot and ringing.
Overdrive Recovery
An overdrive condition is dened as the point when either
one of the inputs or the output exceed their specied
voltage range. Overdrive recovery is the time needed for
the amplier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range
is exceeded. The CLC1020 and will typically recover in less
than 5us from an overdrive condition. Figure 6 shows the
CLC1020 in an overdriven condition.
-3
-2
-1
0
1
2
3
020 40 60 80 100
Amplitude (V)
Time (μs)
V
S
= +/-2.5V
R
L
= 10kΩ
A
V
+2_+25°C
Input Signal
Output Signal
Figure 6. Overdrive Recovery
Layout Considerations
General layout and supply bypassing play major roles in
high frequency performance. Resurgent Semiconductor
has evaluation boards to use as a guide for high frequency
layout and as an aid in device testing and characterization.
Follow the steps below as a basis for high frequency
layout:
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 13 / 15 Rev 1B.R
▪ Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
▪ Place the 6.8µF capacitor within 0.75 inches of the power
pin
▪ Place the 0.1µF capacitor within 0.1 inches of the power pin
▪ Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
▪ Minimize all trace lengths to reduce series inductances
Evaluation Board Information
The following evaluation boards are available to aid in
the testing and layout of these devices:
Evaluation Board # Products
CEB004 CLC1020 in TSOT
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in
Figures 7-11. These evaluation boards are built for dual
supply operation. Follow these steps to use the board
in a single-supply application:
1. Short -Vs to ground.
2. Use C3 (6.8µF) and C4 (0.1µF), if the -VS pin of the
amplier is not directly connected to the ground plane.
Figure 7. CEB004 Schematic
Figure 8. CEB004 Top View
Figure 9. CEB004 Bottom View
RL
+
-
Rf
0.1uF
6.8uF
Output
Input
+Vs
Rg
0.1uF
6.8uF
RL
Rin
-Vs
1
3
2
5
4
Rout
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
© 2018 Resurgent Semiconductor, LLC 14 / 15 Rev 1B.R
Mechanical Dimensions
TSOT-5 Package
NOTES:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. PACKAGE LENGTH DOES NOT INCLUDE INTERLEAD FALSH OR PROTRUSION
3. PACKAGE WIDTH DOES NOTINCLUDE INTERLEAD FALSH OR PROTRUSION.
4. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10
MILLIMETERS MAX.
5. DRAWING CONFROMS TO JEDEC MO-193, VARIATION AA.
6. DRAWING IS NOT TO SCALE.
2.60
3.00
2.80
1.50
1.70
5 4
1 3
0.84
0.90
0.00
0.10
1.00MAX
0.30
0.50 0.95BSC
SEE DETAIL ”A
”
0.03
0.20
DETAIL ”A
”
0.215
0.265
0.45
0.30
0.50
GAUGE PLANE
0.25 BSC
R0.150(REF)
0° ~ 8°
Data Sheet
CLC1020 General Purpose, Rail to Rail Output Amplier 1B.R
For Further Assistance:
www.resurgentsemi.net
NOTICE
Resurgent Semiconductor reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. Resurgent
Semiconductor assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the
circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specic application.
While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies.
Resurgent Semiconductor does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be
expected to cause failure of the life support system or to signicantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Resurgent
Semiconductor receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential
liability of Resurgent Semiconductor is adequately protected under the circumstances.
Reproduction, in part or whole, without the prior written consent of Resurgent Semiconductor is prohibited.
ESURGENT
S E M I C O N D U C T O R
© 2018 Resurgent Semiconductor, LLC 15 / 15 Rev 1B.R
Revision History
Revision Date Description
1B.R July 2018 Updated to Resurgent Semiconductor.
