2015-2016 Microchip Technology Inc. DS20005391B-page 1
Features
High-Voltage CMOS technology for high perfor-
mance
16-channel high voltage analog switch
3.3V input logic level compatible
20 MHz data shift clock frequency
Very low quiescent power dissipation (-10 µA)
Low parasitic capacitance
DC to 50 MHz small signal frequency response
-60dB typical OFF-isolation at 5.0 MHz
CMOS logic circuitry for low power
Excellent noise immunity
Cascadable serial data register with latches
Flexible operating supply voltages
Integrated bleed resistors on the outputs
(HV2701 only)
Applications
Medical ultrasound imaging
NDT metal flaw detection
Piezoelectric transducer drivers
Optical MEMS modules
Description
HV2601/HV2701 are low-charge injection, 16-channel,
high-voltage analog switch integrated circuits (ICs).
These devices are designed for use in applications
requiring high-voltage switching controlled by low-volt-
age control signals, such as medical ultrasound imag-
ing and other piezoelectric transducer drivers. HV2701
has integrated bleed resistors which eliminate voltage
build-up on capacitive loads such as piezoelectric
transducers.
These ICs shift input data into a 16-bit shift register that
can then be retained in a 16-bit latch. To reduce any
possible clock feed-through noise, the latch enable bar
should be left high until all bits are clocked in. Data is
clocked in during the rising edge of the clock. Using
High-Voltage CMOS technology, this device combines
high-voltage, bilateral DMOS switches and low power
CMOS logic to provide efficient control of high voltage
analog signals.
The device is suitable for various combinations of high
voltage supplies, e.g., VPP/VNN: +40V/-160V, +100V/-
100V, and +160V/-40V.
Package Types
42-Ball Bumped Die
See Tabl e 2 -1 and Ta b l e 2 - 2 for pin information
48-Lead LQFP
1
2
3
8
9
10
12
13
4
5
6
7
11
18 17 16 15 14
25
26
21
22
23
24
19
20
41
42
33
34
39
40
31
32
37
38
29
30
35
36
27
28
1
48
(Top View) (Top View)
HV2601 / HV2701
Low-Charge Injection, 16-Channel,
High-Voltage Analog Switch
HV2601 / HV2701
DS20005391B-page 2 2015-2016 Microchip Technology Inc.
Block Diagram
D
LE
CLR
Latches
Level
Shifters
Output
Switches
SW0
SW1
SW2
SW14
SW15
16-Bit
Shift
Register
RGND
VPP
VNN
CLR
LE
VDD GND
D
LE
CLR
D
LE
CLR
D
LE
CLR
D
LE
CLR
DOUT
CLK
DIN
Bleed
Resistors
HV2701 only
Note: Bleed resistors and RGND apply to HV2701 only.
2015-2016 Microchip Technology Inc. DS20005391B-page 3
HV2601 / HV2701
1.0 ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
VDD logic supply ........................................................................................................................................-0.5V to +7.0V
VPP - VNN differential supply.................................................................................................................................... 220V
VPP positive supply ......................................................................................................................... -0.5V to VNN + 200V
VNN negative supply.................................................................................................................................+0.5V to -200V
Logic input voltage ........................................................................................................................... -0.5V to VDD + 0.3V
Analog signal range ....................................................................................................................................... VNN to VPP
Peak analog signal current/channel......................................................................................................................... 3.0A
Storage temperature ............................................................................................................................. -65°C to +150°C
Power dissipation 42-Ball Bumped Die ................................................................................................................... 1.5W
Power dissipation 48-Lead LQFP ........................................................................................................................... 1.0W
Note 1: Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.
2: VSIG must be VNN and VPP or floating during power up/down transition.
3: Rise and fall times of power supplies VDD, VPP
, and VNN should not be less than 1.0msec.
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
RECOMMENDED OPERATING CONDITIONS (Notes 13)
Symbol Parameter Value
VDD Logic power supply voltage 3.0V to 5.5V
VPP Positive high voltage supply +40V to VNN +200V
VNN Negative high voltage supply -40V to -160V
VIH High level input voltage 0.9VDD to VDD
VIL Low level input voltage 0V to 0.1 VDD
VSIG Analog signal voltage peak-to-peak VNN +10V to VPP -10V
TAOperating free air temperature 0°C to 70°C
HV2601 / HV2701
DS20005391B-page 4 2015-2016 Microchip Technology Inc.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Over recommended operating conditions unless otherwise noted.
Parameter
Symbol
0°C 25°C 70°C
Units
Conditions
Min Max Min Typ Max Min Max
Small signal switch
ON-resistance RONS
- 30 - 26 38 - 48
ISIG= 5.0 mA VPP= +40V
VNN= -160V
- 25 - 22 27 - 32 ISIG= 200 mA
- 25 - 22 27 - 30 ISIG= 5.0 mA VPP= +100V
VNN= -100V
- 18 - 18 24 - 27 ISIG= 200 mA
- 23 - 20 25 - 30 ISIG= 5.0 mA VPP= +160V
VNN= -40V
- 22 - 16 25 - 27 ISIG= 200 mA
Small signal switch
ON-resistance
matching
RONS -20-5.020-20%
ISIG= 5.0mA, VPP= +100V,
VNN= -100V
Large signal switch
ON-resistance RONL ---15---VSIG= VPP-10V, ISIG= 1.0A
Value of output
bleed resistor
(HV2701 only)
RINT - - 20 35 50 - - kOutput Switch to RGND
IRINT= 0.5 mA
Switch OFF leak-
age per switch ISOL -5.0-1.010 - 15µA
VSIG= VPP-10V and
VNN+10V (Note 1)
DC offset switch
OFF VOS
- 300 - 100 300 - 300 mV HV2601:100 k load
HV2701: no load
(Note 1)
DC offset switch
ON - 500 - 100 500 - 500 mV
Quiescent VPP
supply current IPPQ - - - 10 50 - - µA All switches OFF
Quiescent VNN
supply current INNQ - - - -10 -50 - - µA All switches OFF
Quiescent VPP
supply current IPPQ - - - 10 50 - - µA All switches ON, ISW= 5.0 mA
Quiescent VNN
supply current INNQ - - - -10 -50 - - µA All switches ON, ISW= 5.0 mA
Switch output peak
current ISW - 3.0 - 3.0 2.0 - 2.0 A VSIG duty cycle < 0.1%
Output switching
frequency fSW ----50--kHzDuty cycle = 50%
Average VPP supply
current IPP
- 6.5 - - 7.0 - 8.0
mA
VPP= +40V
VNN= -160V All output
switches are
turning ON
and OFF at
50 kHz with
no load.
VPP= +100V
VNN= -100V
- 4.0 - - 5.5 - 5.5
VPP= +160V
VNN= -40V
- 4.0 - - 5.0 - 5.5
Average VNN supply
current INN
- 6.5 - - 7.0 - 8.0
mA
VPP= +40V
VNN= -160V All output
switches are
turning ON
and OFF at
50 kHz with
no load.
VPP= +100V
VNN= -100V
- 4.0 - - 5.0 - 5.5
VPP= +160V
VNN= -40V
- 4.0 - - 5.0 - 5.5
Average VDD supply
current IDD - 4.0 - - 4.0 - 4.0 mA fCLK= 5.0 MHz, VDD= 5.0V
2015-2016 Microchip Technology Inc. DS20005391B-page 5
HV2601 / HV2701
Note 1: See Figure 3-1.
Quiescent VDD
supply current IDDQ - 10 - - 10 - 10 µA All logic inputs are static
Data out source
current ISOR 0.45 - 0.45 0.70 - 0.40 - mA VOUT= VDD- 0.7V
Data out sink current ISINK 0.45 - 0.45 0.70 - 0.40 - mA VOUT= 0.7V
Logic input
capacitance CIN -10- -10-10pF
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Over recommended operating conditions unless otherwise noted.
Parameter
Symbol
0°C 25°C 70°C
Units
Conditions
Min Max Min Typ Max Min Max
HV2601 / HV2701
DS20005391B-page 6 2015-2016 Microchip Technology Inc.
Note 1: See Figure 3-1.
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VDD=5.0V, tR = tF5.0 ns, 50% duty cycle, CLOAD = 20 pF, unless otherwise noted.
Parameter
Symbol
0°C 25°C 70°C
Units
Conditions
Min Max Min Typ Max Min Max
Set up time before
LE rises tSD 25 - 25 - - 25 - ns
Time width of LE tWLE
56 - - 56 - 56 - ns VDD= 3.0V
12 - - 12 - 12 - VDD= 5.0V
Clock delay time to
data out tDO
50 100 50 78 100 50 100 ns VDD= 3.0V
15 40 15 30 40 15 40 VDD= 5.0V
Time width of CLR tWCLR 55 - 55 - - 55 - ns
Set up time data to
clock tSU
21 - - 21 - 21 - ns VDD= 3.0V
7.0 - - 7.0 - 7.0 - VDD= 5.0V
Hold time data
from clock tH2.0 - 2.0 - - 2.0 - ns VDD= 3.0 or 5.0V
Clock frequency fCLK
- 8.0 - - 8.0 - 8.0 MHz VDD= 3.0V
-20- -20-20 V
DD= 5.0V
Clock rise and fall
times tR,tF-50- -50-50ns
Turn ON time TON - 5.0 - - 5.0 - 5.0 µs VSIG= VPP-10V, RLOAD=
10k (Note 1)
Turn OFF time TOFF - 5.0 - - 5.0 - 5.0 µs VSIG= VPP-10V, RLOAD=
10k (Note 1)
Maximum VSIG
slew rate dv/dt
-20- -20-20
v/ns
VPP= +40V, VNN= -160V
-20- -20-20 V
PP= +100V, VNN= -100V
-20- -20-20 V
PP= +160V, VNN= -40V
OFF isolation KO
-30 - -30 -33 - -30 - dB
f = 5.0MHz, 1.0k//15pF load
(Note 1)
-58 - -58 - - -58 - f = 5.0MHz, 50 load (Note 1)
Switch crosstalk KCR -60 - -60 -70 - -60 - dB f = 5.0MHz, 50 load (Note 1)
Output switch iso-
lation diode current IID - 300 - - 300 - 300 mA 300ns pulse width,
2.0% duty cycle (Note 1)
OFF capacitance
SW to GND CSG(OFF) 5.0 17 5.0 12 17 5.0 17 pF 0V, f = 1.0MHz
ON capacitance
SW to GND CSG(ON) 25 50 25 38 50 25 50 pF 0V, f = 1.0MHz
Output voltage
spike
+VSPK ----150--
mV
VPP= +40V, VNN= -160V,
RLOAD= 50 (Note 1)
-VSPK
+VSPK ----150-- VPP= +100V, VNN= -100V,
RLOAD= 50 (Note 1)
-VSPK
+VSPK ----150-- VPP= +160V, VNN= -40V,
RLOAD= 50 (Note 1)
-VSPK
Charge injection QC
---820---
pC
VPP= +40V, VNN= -160V,
VSIG= 0V (Note 1)
---600--- VPP= +100V, VNN= -100V,
VSIG= 0V (Note 1)
---350--- VPP= +160V, VNN= -40V,
VSIG= 0V (Note 1)
2015-2016 Microchip Technology Inc. DS20005391B-page 7
HV2601 / HV2701
2.0 PIN DESCRIPTION
The locations of the pads/balls are listed in Package Types.
TABLE 2-1: PIN DESCRIPTION: 42-BALL BUMPED DIE PACKAGE
Pin # HV2601 HV2701 Description
1 NC RGND No connect/Ground for bleed resistor
2V
PP VPP Positive supply voltage
3V
NN VNN Negative supply voltage
4D
OUT DOUT Data out logic output
5 CLR CLR Latch clear logic input
6 CLK CLK Clock logic input for shift register
7 GND GND Ground
8 SW15A SW15A Analog switch 15 terminal A
9 SW15B SW15B Analog switch 15 terminal B
10 LE LE Latch-enable logic input, low active
11 VDD VDD Logic supply voltage
12 SW0A SW0A Analog switch 0 terminal A
13 SW0B SW0B Analog switch 0 terminal B
14 SW14A SW14A Analog switch 14 terminal A
15 SW14B SW14B Analog switch 14 terminal B
16 DIN DIN Data in logic input
17 SW1A SW1A Analog switch 1 terminal A
18 SW1B SW1B Analog switch 1 terminal B
19 SW13A SW13A Analog switch 13 terminal A
20 SW13B SW13B Analog switch 13 terminal B
21 SW2A SW2A Analog switch 2 terminal A
22 SW2B SW2B Analog switch 2 terminal B
23 SW12A SW12A Analog switch 12 terminal A
24 SW12B SW12B Analog switch 12 terminal B
25 SW3A SW3A Analog switch 3 terminal A
26 SW3B SW3B Analog switch 3 terminal B
27 SW11A SW11A Analog switch 11 terminal A
28 SW11B SW11B Analog switch 11 terminal B
29 SW9B SW9B Analog switch 9 terminal B
30 SW8B SW8B Analog switch 8 terminal B
31 SW7A SW7A Analog switch 7 terminal A
32 SW6A SW6A Analog switch 6 terminal A
33 SW4A SW4A Analog switch 4 terminal A
34 SW4B SW4B Analog switch 4 terminal B
35 SW10B SW10B Analog switch 10 terminal B
36 SW10A SW10A Analog switch 10 terminal A
37 SW9A SW9A Analog switch 9 terminal A
38 SW8A SW8A Analog switch 8 terminal A
39 SW7B SW7B Analog switch 7 terminal B
40 SW6B SW6B Analog switch 6 terminal B
41 SW5B SW5B Analog switch 5 terminal B
42 SW5A SW5A Analog switch 5 terminal A
HV2601 / HV2701
DS20005391B-page 8 2015-2016 Microchip Technology Inc.
TABLE 2-2: PIN DESCRIPTION: 48-LEAD LQFP
Pin # HV2601 HV2701 Description
1 NC NC No connect
2 NC NC No connect
3 SW4B SW4B Analog switch 4 terminal B
4 SW4A SW4A Analog switch 4 terminal A
5 SW3B SW3B Analog switch 3 terminal B
6 SW3A SW3A Analog switch 3 terminal A
7 SW2B SW2B Analog switch 2 terminal B
8 SW2A SW2A Analog switch 2 terminal A
9 SW1B SW1B Analog switch 1 terminal B
10 SW1A SW1A Analog switch 1 terminal A
11 SW0B SW0B Analog switch 0 terminal B
12 SW0A SW0A Analog switch 0 terminal A
13 VNN VNN Negative supply voltage
14 NC NC No connect
15 VPP VPP Positive supply voltage
16 NC NC No connect
17 GND GND Ground
18 VDD VDD Logic supply voltage
19 DIN DIN Data in logic input
20 CLK CLK Clock logic input for shift register
21 LE LE Latch-enable logic input, low active
22 CLR CLR Latch clear logic input
23 DOUT DOUT Data out logic output
24 NC RGND No connect/Ground for bleed resistor
25 SW15B SW15B Analog switch 15 terminal B
26 SW15A SW15A Analog switch 15 terminal A
27 SW14B SW14B Analog switch 14 terminal B
28 SW14A SW14A Analog switch 14 terminal A
29 SW13B SW13B Analog switch 13 terminal B
30 SW13A SW13A Analog switch 13 terminal A
31 SW12B SW12B Analog switch 12 terminal B
32 SW12A SW12A Analog switch 12 terminal A
33 SW11B SW11B Analog switch 11 terminal B
34 SW11A SW11A Analog switch 11 terminal A
35 NC NC No connect
36 NC NC No connect
37 SW10B SW10B Analog switch 10 terminal B
38 SW10A SW10A Analog switch 10 terminal A
39 SW9B SW9B Analog switch 9 terminal B
40 SW9A SW9A Analog switch 9 terminal A
41 SW8B SW8B Analog switch 8 terminal B
42 SW8A SW8A Analog switch 8 terminal A
43 SW7B SW7B Analog switch 7 terminal B
2015-2016 Microchip Technology Inc. DS20005391B-page 9
HV2601 / HV2701
44 SW7A SW7A Analog switch 7 terminal A
45 SW6B SW6B Analog switch 6 terminal B
46 SW6A SW6A Analog switch 6 terminal A
47 SW5B SW5B Analog switch 5 terminal B
48 SW5A SW5A Analog switch 5 terminal A
TABLE 2-2: PIN DESCRIPTION: 48-LEAD LQFP
Pin # HV2601 HV2701 Description
HV2601 / HV2701
DS20005391B-page 10 2015-2016 Microchip Technology Inc.
3.0 DETAILED DESCRIPTION
3.1 Application Information
FIGURE 3-1: TEST CIRCUITS
RGND
RGND
RGND
RGND
RGND
RGND
RGND
DC Offset Switch
ON/OFF
V
PP
5V
V
NN
VPP
VNN
VDD
GND
V
OUT
T
ON
/T
OFF
Test Circuit
5V
GND
V
PP
-10V
10kΩ
V
OUT
Output Switch
Isolation Diode Current
I
ID
5V
GND
V
NN
V
SIG
Switch Crosstalk
V
IN
= 10V
P-P
@5MHz
NC
5V
GND
50Ω
Output Voltage Spike
5V
GND
V
OUT
1kΩ
R
LOAD
50Ω
+V
SPK
–V
SPK
OFF Isolation
K
O
= 20Log V
OUT
V
IN
V
IN
= 10V
P-P
@5MHz
5V
GND
V
OUT
50Ω
R
LOAD
R
LOAD
V
PP
V
NN
VPP
VNN
VDD
V
PP
V
NN
VPP
VNN
VDD
V
PP
V
NN
VPP
VNN
VDD
V
PP
V
NN
VPP
VNN
VDD
V
PP
V
NN
VPP
VNN
VDD
K
CR
= 20Log V
OUT
V
IN
VPP -10V
Switch Off Leakage
per Switch
RGND
Open
Q = 1000pF x ΔV
OUT
Charge Injection
5V
GND
V
PP
V
NN
VPP
VNN
VDD
V
PP
5V
V
NN
VPP
VNN
VDD
Open
ISOL
GND
V
OUT
ΔV
OUT
1000pF
V
SIG
R
LOAD
(HV2601
only)
2015-2016 Microchip Technology Inc. DS20005391B-page 11
HV2601 / HV2701
Note 1: The 16 switches operate independently.
2: Serial data is clocked in on the L to H transition of the CLK.
3: All 16 switches go to a state retaining their latched condition at the rising edge of LE. When LE is low the
shift registers data flow through the latch.
4: DOUT is high when data in the shift register 15 is high.
5: Shift registers clocking has no effect on the switch states if LE is high.
6: The CLR clear input overrides all other inputs.
FIGURE 3-2: LOGIC TIMING WAVEFORMS
TABLE 3-1: LOGIC FUNCTION TABLE
D0 D1 ... D7 D8 ... D15 LE CLR SW0 SW1 ... SW7 SW8 ... SW15
L-
...
--
...
-LLOFF-
...
--
...
-
H- -- -LLON- -- -
-L -- -LL-OFF -- -
-H -- -LL-ON -- -
-----LL-----
-----LL-----
-- L- -LL-- OFF- -
-- H- -LL-- ON- -
-- -L -LL- - -OFF -
-- -H -LL-- -ON -
-----LL-----
-----LL-----
-----LL-----
-----LL-----
-- -- LLL-- -- OFF
-- -- HLL-- -- ON
X X X X X X X H L HOLD PREVIOUS STATE
X X X X X X X X H ALL SWITCHES OFF
DATA IN
DIN
LE
CLOCK
CLK
DATA OUT
DOUT
OFF
VOUT
(typ)
ON
CLR
50% 50%
50% 50%
t
WLE
t
SD
t
SU
t
h
50%
50%
t
OFF
50%
t
DO
DO
t
ON
t
WCL
D
N+1
D
N
D
N-1
50%50%
90%
10%
HV2601 / HV2701
DS20005391B-page 12 2015-2016 Microchip Technology Inc.
4.0 PACKAGING INFORMATION
4.1 Package Marking Information
Legend: XX...X Product Code or Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
3
e
3
e
42-ball Bumped Die Example
XXXXX
XXXXXXX
YYWWNNN
e1
BD
HV2601
1550343
e1
48-lead LQFP Example
NNN
YYWW
XXXXXXX
XXX
e3
343
1550
2601FG
HV
e3
2015-2016 Microchip Technology Inc. DS20005391B-page 13
HV2601 / HV2701
Note: For more information about ball coordinates, contact Microchip sales.
42-Ball Bumped Die Package Outline (BD)
5.29x5.30mm body, 1.0mm height (max), 0.52 / 0.60mm pitch
Symbol A A1 A2 b D D1 E E1 E2 e e1
Dimension
(mm)
MIN 0.90.21 0. 0.29 5.19 4.20
BSC
5.20 4.04
BSC
0.68
BSC
0.60
BSC
0.52
BSC
NOM 0.95 0.24 0.7 0.32 5.29 5.30
MAX 1.00.27 0.70.35 5.39 5.40
Top View
View B
Side View
A2
A1
Seating
Plane
View A View B
Bottom View
D
View A
b
E
A
Note 1
(Ball 1
Index Area
D/4 x E/4)
0,0
E1
e1
E2
e D1
e
e1
e1
e
C/L
C/L
1
42
1
42
Notes:
1. %DOOLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG%DOOLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURUD
printed indicator.
1RWHV)RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJV6HHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQDWZZZPLFURFKLSFRPSDFNDJLQJ
HV2601 / HV2701
DS20005391B-page 14 2015-2016 Microchip Technology Inc.
48-Lead LQFP Package Outline (FG)
7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch
Symbol A A1 A2 b D D1 E E1 e L L1 L2 ș
Dimension
(mm)
MIN 1.40* 0.05 1.35 0.17 8.80* 6.80* 8.80* 6.80*
0.50
BSC
0.45
1.00
REF
0.25
BSC
0O
NOM - - 1.40 0.22 9.00 7.00 9.00 7.00 0.60 3.5O
MAX 1.60 0.15 1.45 0.27 9.20* 7.20* 9.20* 7.20* 0.75 7O
JEDEC Registration MS-026, Variation BBC, Issue D, Jan. 2001.
7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ
Drawings are not to scale.
1
Seating
Plane
Gauge
Plane
θ
L
L1
L2
View B
View B
Seating
Plane
Top View
Side View
Note 1
(Index Area
D1/4 x E1/4)
48
A2A
A1
b
D
D1
E
E1
e
Note:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU
a printed indicator.
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2015-2016 Microchip Technology Inc. DS20005391B-page 15
HV2601 / HV2701
APPENDIX A: REVISION HISTORY
Revision A (December 2015)
Converted Supertex Doc #s DSFP-HV2601 and
DSFP-HV2701 to Microchip DS20005391B.
Combined HV2601/HV2701 into one document.
•Revised Section 4.0 “Packaging Information”
Removed package GA from the data sheet.
Made minor text changes throughout.
Revision B (March 2016)
Moved “Block Diagram” to page 2 and made a
minor change for clarity.
Removed Confidential status from document.
HV2601 / HV2701
DS20005391B-page 16 2015-2016 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Note: HV2601BD and HV2701BD are RoHS-compliant products
2015-2016 Microchip Technology Inc. DS20005391B-page 17
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate,
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O
are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
ETHERSYNCH, Hyper Speed Control, HyperLight Load,
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015-2016, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0342-5
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
DS20005391B-page 18 2015-2016 Microchip Technology Inc.
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07/14/15