1
LTC1569-7
TYPICAL APPLICATION
U
DESCRIPTIO
U
APPLICATIO S
U
FEATURES
One External R Sets Cutoff Frequency
Root Raised Cosine Response
Up to 300kHz Cutoff on a Single 5V Supply
Up to 150kHz Cutoff on a Single 3V Supply
10th Order, Linear Phase Filter in an SO-8
DC Accurate, V
OS(MAX)
= 5mV
Low Power Modes
Differential or Single-Ended Inputs
80dB CMRR (DC)
80dB Signal-to-Noise Ratio, V
S
= 5V
Operates from 3V to ±5V Supplies
The LTC
®
1569-7 is a 10th order lowpass filter featuring
linear phase and a root raised cosine amplitude response.
The high selectivity of the LTC1569-7 combined with its
linear phase in the passband makes it suitable for filtering
both in data communications and data acquisition sytems.
Data Communication Filters for 3V Operation
Linear Phase and Phase Matched Filters for I/Q
Signal Processing
Pin Programmable Cutoff Frequency Lowpass Filters
Furthermore, its root raised cosine response offers the
optimum pulse shaping for PAM data communications
.
The filter attenuation is 57dB at 1.5 • f
CUTOFF
, 60dB at 2 •
f
CUTOFF
, and in excess of 80dB at 6 • f
CUTOFF
. DC-accuracy-
sensitive applications benefit from the 5mV maximum DC
offset.
The LTC1569-7 is the first sampled data filter which does
not require an external clock yet its cutoff frequency can be
set with a single external resistor with a typical accuracy
of 3.5% or better
. The external resistor programs an
internal oscillator whose frequency is divided by either 1,
4 or 16 prior to being applied to the filter network. Pin 5
determines the divider setting. Thus, up to three cutoff
frequencies can be obtained for each external resistor
value. Using various resistor values and divider settings,
the cutoff frequency can be programmed over a range of
seven octaves. Alternatively, the cutoff frequency can be
set with an external clock and the clock-to-cutoff fre-
quency ratio is 32:1. The ratio of the internal sampling rate
to the filter cutoff frequency is 64:1.
The LTC1569-7 is fully tested for a cutoff frequency of
256kHz/128kHz with single 5V/3V supply although up to
300kHz cutoff frequencies can be obtained.
The LTC1569-7 features power savings modes and it is
available in an SO-8 surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Frequency Response, fCUTOFF = 128kHz/32kHz/8kHz
Single 3V Supply, 128kHz/32kHz/8kHz Lowpass Filter
Linear Phase, DC Accurate,
Tunable, 10th Order Lowpass Filter
FREQUENCY (kHz)
1
GAIN (dB)
0
–20
–40
–60
–80
100 10 100 1000
1569-7 TA01a
18
27
36
45
1µF
3V
1/4
1/16
1/1
3V
R
EXT
= 10k
100pF
1µF
2k
3.48k
3V
LTC1569-7
EASY TO SET f
CUTOFF
:
f
CUTOFF
= 128kHz (10k/R
EXT
)
1, 4 OR 16
1569-7 TA01
IN
+
IN
GND
V
OUTV
IN
V
OUT
V
+
R
X
DIV/CLK
2
LTC1569-7
PARAMETER CONDITIONS MIN TYP MAX UNITS
Filter Gain V
S
= 5V, f
CLK
= 8.192MHz, f
IN
= 5120Hz = 0.02 • f
CUTOFF
0.10 0.00 0.10 dB
f
CUTOFF
= 256kHz, V
IN
= 2.5V
P-P
,f
IN
= 51.2kHz = 0.2 • f
CUTOFF
0.25 0.15 0.05 dB
R
EXT
= 5k, Pin 5 Shorted to Pin 4 f
IN
= 128kHz = 0.5 • f
CUTOFF
0.50 0.41 0.25 dB
f
IN
= 204.8kHz = 0.8 • f
CUTOFF
1.1 0.65 0.40 dB
f
IN
= 256kHz = f
CUTOFF
, LTC1569C 5.7 3.8 2.3 dB
f
IN
= 256kHz = f
CUTOFF
, LTC1569I 6.2 3.8 2.0 dB
f
IN
= 384kHz = 1.5 • f
CUTOFF
–58 –48 dB
f
IN
= 512kHz = 2 • f
CUTOFF
–62 –54 dB
f
IN
= 768kHz = 3 • f
CUTOFF
–67 –64 dB
V
S
= 2.7V, f
CLK
= 1MHz, f
IN
= 625Hz = 0.02 • f
CUTOFF
0.08 0.00 0.12 dB
f
CUTOFF
= 31.25kHz, V
IN
= 1V
P-P
,f
IN
= 6.25kHz = 0.2 • f
CUTOFF
0.25 0.15 0.05 dB
Pin 6 Shorted to Pin 4, External Clock f
IN
= 15.625kHz = 0.5 • f
CUTOFF
0.50 0.40 0.30 dB
f
IN
= 25kHz = 0.8 • f
CUTOFF
0.75 0.65 0.50 dB
f
IN
= 31.25kHz = f
CUTOFF
3.3 3.15 3.0 dB
f
IN
= 46.875kHz = 1.5 • f
CUTOFF
–57 –52 dB
f
IN
= 62.5kHz = 2 • f
CUTOFF
–60 –54 dB
f
IN
= 93.75kHz = 3 • f
CUTOFF
–66 –58 dB
Filter Phase V
S
= 2.7V, f
CLK
= 4MHz, f
IN
= 2500Hz = 0.02 • f
CUTOFF
–11 Deg
f
CUTOFF
= 125kHz, Pin 6 Shorted to f
IN
= 25kHz = 0.2 • f
CUTOFF
114 –112 –110 Deg
Pin 4, External Clock f
IN
= 62.5kHz = 0.5 • f
CUTOFF
78 80 82 Deg
f
IN
= 100kHz = 0.8 • f
CUTOFF
–85 –83 –81 Deg
f
IN
= 125kHz = f
CUTOFF
155 158 161 Deg
f
IN
= 187.5kHz = 1.5 • f
CUTOFF
95 Deg
Filter Cutoff Accuracy R
EXT
= 10.24k from Pin 6 to Pin 7, 125kHz ±1%
when Self-Clocked V
S
= 3V, Pin 5 Shorted to Pin 4
Filter Output DC Swing V
S
= 3V, Pin 3 = 1.11V 2.1 V
P-P
1.9 V
P-P
V
S
= 5V, Pin 3 = 2V 3.9 V
P-P
3.7 V
P-P
V
S
= ±5V 8.6 V
P-P
LTC1569C 8.4 V
P-P
LTC1569I 8.0 V
P-P
A
U
G
W
A
W
U
W
ARBSOLUTEXI T
IS
ORDER PART
NUMBER
WU
U
PACKAGE/ORDER I FOR ATIO
(Note 1)
Total Supply Voltage................................................ 11V
Power Dissipation.............................................. 500mW
Operating Temperature
LTC1569C ............................................... 0°C to 70°C
LTC1569I............................................ 40°C to 85°C
Storage Temperature ............................ 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V+ = 3V, V = 0V), fCUTOFF = 128kHz, RLOAD = 10k unless otherwise specified.
ELECTRICAL C CHARA TERISTICS
LTC1569CS8-7
LTC1569IS8-7
S8 PART
MARKING
Consult factory for Military grade parts.
T
JMAX
= 125°C, θ
JA
= 80°C/W (Note 6) 15697
1569I7
1
2
3
4
8
7
6
5
TOP VIEW
OUT
V
+
R
X
DIV/CLK
IN
+
IN
GND
V
S8 PACKAGE
8-LEAD PLASTIC SO
3
LTC1569-7
Output DC Offset R
EXT
= 10k, Pin 5 Shorted to Pin 4 V
S
= 3V ±2±5mV
(Note 2) V
S
= 5V ±6±12 mV
V
S
= ±5V ±15 mV
Output DC Offset Drift R
EXT
= 10k, Pin 5 Shorted to Pin 4 V
S
= 3V 25 µV/°C
V
S
= 5V 25 µV/°C
V
S
= ±5V ±25 µV/°C
Clock Pin Logic Thresholds V
S
= 3V Min Logical “1” 2.6 V
when Clocked Externally Max Logical “0” 0.5 V
V
S
= 5V Min Logical “1” 4.0 V
Max Logical “0” 0.5 V
V
S
= ±5V Min Logical “1” 4.0 V
Max Logical “0” 0.5 V
Power Supply Current f
CLK
= 1.028MHz (10k from Pin 6 to Pin 7, V
S
= 3V 6 8 mA
(Note 3) Pin 5 Open, ÷ 4), f
CUTOFF
= 32kHz 9mA
V
S
= 5V 7 9 mA
10 mA
V
S
= 10V 9 13 mA
14 mA
f
CLK
= 4.096MHz (10k from Pin 6 to Pin 7, V
S
= 3V 9.5 mA
Pin 5 Shorted to Pin 4, ÷ 1), f
CUTOFF
= 128kHz 14 mA
f
CLK
= 8.192MHz (5k from Pin 6 to Pin 7, V
S
= 5V 20 mA
Pin 5 Shorted to Pin 4, ÷ 1), f
CUTOFF
= 256kHz 30 mA
V
S
= 10V 27 mA
37 mA
Power Supply Voltage where Pin 5 Shorted to Pin 4, Note 3 3.7 4.2 4.6 V
Low Power Mode is Enabled
Clock Feedthrough R
EXT
= 10k, Pin 5 Open 0.4 mV
RMS
Wideband Noise Noise BW = DC to 2 • f
CUTOFF
125 µV
RMS
THD f
IN
= 10kHz, 1.5V
P-P
74 dB
Clock-to-Cutoff 32
Frequency Ratio
Max Clock Frequency V
S
= 3V 5 MHz
(Note 4) V
S
= 5V 9.6 MHz
V
S
= ±5V 13 MHz
Min Clock Frequency 3V to ±5V, T
A
< 85°C3kHz
(Note 5)
Input Frequency Range Aliased Components <–65dB 0.9 • f
CLK
Hz
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V+ = 3V, V = 0V), fCLK = 4.096MHz, fCUTOFF = 128kHz, RLOAD = 10k unless otherwise specified.
ELECTRICAL C CHARA TERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: DC offset is measured with respect to Pin 3.
Note 3: There are several operating modes which reduce the supply
current. For V
S
< 4V, relative to divide-by-1 mode, the current is typically
reduced by 50% relative to V
S
= 5V. If the internal oscillator is used as the
clock source and the divide-by-4 or divide-by-16 mode is enabled, the
supply current is typically reduced by 60%,relative to divide-by-1 mode,
independent of the value of V
S
.
Note 4: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5: The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6: Thermal resistance varies depending upon the amount of PC board
metal attached to the device. θ
JA
is specified for a 2500mm
2
test board
covered with 2oz copper on both sides.
4
LTC1569-7
TYPICAL PERFOR A CE CHARACTERISTICS
UW
THD vs Input Voltage
THD vs Input Frequency
INPUT VOLTAGE (V
P-P
)
012345
THD (dB)
1569-7 G02
–50
–60
–70
–80
–90
f
IN
= 10kHz
f
CUTOFF
= 128kHz
IN
+
TO OUT
R
EXT
= 10k
PIN 5 AT V
V
S
= 5V
PIN 3 = 2V
V
S
= 3V
PIN 3 = 1.11V
INPUT FREQUENCY (kHz)
020
10 30 50 70 9040 60 80 100
THD (dB)
1569-7 G01
–68
–70
–72
–74
–76
–78
V
IN
= 1.5V
P-P
f
CUTOFF
= 128kHz
IN
+
TO OUT
R
EXT
= 10k
PIN 5 AT V
V
S
= 5V
PIN 3 = 2V
FREQUENCY (kHz)
5
LOG MAG (10dB/DIV)
10
–90 10 100 1000
1569-7 G03
VS = 3V
fC = 128kHz
REXT = 10k
PIN 5 AT V
FREQUENCY (kHz)
1
GAIN (dB)
DELAY (µs)
1
0
–1
–2
–3
–4
20
19
18
17
16
15
14
13
12
11
10
10 100
1569-7 G04
V
S
= 3V
f
C
= 128kHz
R
EXT
= 10k
PIN 5 AT V
Gain vs Frequency Passband Gain and Group Delay
vs Frequency
fCUTOFF (kHz)
1
ISUPPLY (mA)
10 100 1000
1569-7 G05
12
11
10
9
8
7
6
5
4
DIV-BY-16
DIV-BY-4
DIV-BY-1
EXT CLK
f
CUTOFF
(kHz)
1
I
SUPPLY
(mA)
10 100 1000
1569-7 G06
23
21
19
17
15
13
11
9
7
5
DIV-BY-16 DIV-BY-4
DIV-BY-1
EXT CLK
5V Supply Current
3V Supply Current
f
CUTOFF
(kHz)
1
I
SUPPLY
(mA)
10 100 1000
1569-7 G07
35
32
29
26
23
20
17
14
11
8
5
DIV-BY-16 DIV-BY-4
DIV-BY-1
EXT CLK
±
5V Supply Current
5
LTC1569-7
PIN FUNCTIONS
UUU
IN
+
/IN
(Pins 1, 2): Signals can be applied to either or
both input pins. The DC gain from IN
+
(Pin 1) to OUT
(Pin␣ 8) is 1.0, and the DC gain from Pin 2 to Pin 8 is –1. The
input range, input resistance and output range are de-
scribed in the Applications Information section. Input
voltages which exceed the power supply voltages should
be avoided. Transients will not cause latchup if the current
into/out of the input pins is limited to 20mA.
GND (Pin 3): The GND pin is the reference voltage for the
filter and should be externally biased to 2V (1.11V) to
maximize the dynamic range of the filter in applications
using a single 5V (3V) supply. For single supply operation,
the GND pin should be bypassed with a quality 1µF
ceramic capacitor to V
(Pin 4). The impedance of the
circuit biasing the GND pin should be less than 2k as the
GND pin generates a small amount of AC and DC current.
For dual supply operation, connect Pin␣ 3 to a high quality
DC ground. A ground plane should be used. A poor ground
will increase DC offset, clock feedthrough, noise and
distortion.
V
/V
+
(Pins 4, 7): For 3V, 5V and ±5V applications a
quality 1µF ceramic bypass capacitor is required from V
+
(Pin 7) to V
(Pin 4) to provide the transient energy for the
internal clock drivers. The bypass should be as close as
possible to the IC. In dual supply applications (Pin 3 is
grounded), an additional 0.1µF bypass from V
+
(Pin 7) to
GND (Pin 3) and V
(Pin 4) to GND (Pin 3) is recom-
mended.
The maximum voltage difference between GND (Pin 3) and
V
+
(Pin 7) should not exceed 5.5V.
DIV/CLK (Pin 5): DIV/CLK serves two functions. When the
internal oscillator is enabled, DIV/CLK can be used to
engage an internal divider. The internal divider is set to 1:1
when DIV/CLK is shorted to V
(Pin 4). The internal divider
is set to 4:1 when DIV/CLK is allowed to float (a 100pF
bypass to V
is recommended). The internal divider is set
to 16:1 when DIV/CLK is shorted to V
+
(Pin 7). In the
divide-by-4 and divide-by-16 modes the power supply
current is reduced by typically 60%.
When the internal oscillator is disabled (R
X
shorted
to V
) DIV/CLK becomes an input pin for applying an
external clock signal. For proper filter operation, the clock
waveform should be a squarewave with a duty cycle as
close as possible to 50% and CMOS voltages levels (see
Electrical Characteristics section for voltage levels). DIV/
CLK pin voltages which exceed the power supply voltages
should be avoided. Transients will not cause latchup if the
fault current into/out of the DIV/CLK pin is limited to 40mA.
R
X
(Pin 6): Connecting an external resistor between the R
X
pin and V
+
(Pin 7) enables the internal oscillator. The value
of the resistor determines the frequency of oscillation. The
maximum recommended resistor value is 40k and the
minimum is 3.8k/8k (single 5V/3V supply). The internal
oscillator is disabled by shorting the R
X
pin to V
(Pin 4).
(Please refer to the Applications Information section.)
OUT (Pin 8): Filter Output. This pin can drive 10k and/or
40pF loads. For larger capacitive loads, an external 100
series resistor is recommended. The output pin can ex-
ceed the power supply voltages by up to ±2V without
latchup.
BLOCK DIAGRA
W
10TH ORDER
LINEAR PHASE
FILTER NETWORK
POWER
CONTROL
DIVIDER/
BUFFER
R
EXT
PRECISION
OSCILLATOR
5
6
7
8
4
3
2
1 OUT
V
+
R
X
DIV/CLK
IN
+
IN
GND
V
1569-7 BD
6
LTC1569-7
reduced. This results in a 60% power savings with a single
5V supply.
Table1. fCUTOFF vs REXT, VS = 3V, TA = 25°C, Divide-by-1 Mode
R
EXT
Typical f
CUTOFF
Typical Variation of f
CUTOFF
3844320kHz ±3.0%
5010256kHz ±2.5%
10k 128kHz ±1%
20.18k 64kHz ±2.0%
40.2k 32kHz ±3.5%
The power reduction in the divide-by-4 and divide-by-16
modes, however, effects the fundamental oscillator fre-
quency. Hence, the effective divide ratio will be slightly
different from 4:1 or 16:1 depending on V
S
, T
A
and R
EXT
.
Typically this error is less than 1% (Figures 4 and 6).
Self-Clocking Operation
The LTC1569-7 features a unique internal oscillator which
sets the filter cutoff frequency using a single external
resistor
. The design is optimized for V
S
= 3V, f
CUTOFF
=
128kHz, where the filter cutoff frequency error is typically
<1% when a 0.1% external 10k resistor is used. With
different resistor values and internal divider settings, the
cutoff frequency can be accurately varied from 2kHz to
150kHz/300kHz (single 3V/5V supply). As shown in
Figure 1, the divider is controlled by the DIV/CLK (Pin 5).
Table 1 summarizes the cutoff frequency vs external
resistor values for the divide-by-1 mode.
In the divide-by-4 and divide-by-16 modes, the cutoff
frequencies in Table 1 will be lowered by 4 and 16
respectively. When the LTC1569-7 is in the divide-by-4
and divide-by-16 modes the power is automatically
APPLICATIONS INFORMATION
WUUU
Figure 4. Typical Divide Ratio in the
Divide-by-4 Mode, TA = 25°C
Figure 3. Filter Cutoff vs Temperature,
Divide-by-1 Mode, REXT = 10k
Figure 2. Filter Cutoff vs VSUPPLY,
Divide-by-1 Mode, TA = 25°C
Figure 1
VSUPPLY (V)
2
NORMALIZED FILTER CUTOFF
1569-7 F02
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96 46810
REXT = 5k
REXT = 10k
REXT = 20k
REXT = 40k
TEMPERATURE (°C)
–50
NORMALIZED FILTER CUTOFF
1569-7 F03
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990 –25 0 25 50 75 100
VS = 3V
VS = 5V
VS = 10V
VSUPPLY (V)
2
DIVIDE RATIO
1569-7 F04
4.08
4.04
4.00
3.96 46810
REXT = 5k
REXT = 10k
REXT = 20k
REXT = 40k
LTC1569-7
18
27
36
45
DIVIDE-BY-4
DIVIDE-BY-1
DIVIDE-BY-16 V
+
V
R
EXT
100pF
f
CUTOFF
= 128kHz (10k/R
EXT
)
1, 4 OR 16
1569-7 F01
IN
+
IN
GND
V
OUT
V
+
R
X
DIV/CLK
7
LTC1569-7
APPLICATIONS INFORMATION
WUUU
Figure 5. Filter Cutoff vs Temperature,
Divide-by-4 Mode, REXT = 10k
Figure 7. Filter Cutoff vs Temperature,
Divide-by-16 Mode, REXT = 10k
The cutoff frequency is easily estimated from the equation
in Figure 1. Examples 1 and 2 illustrate how to use the
graphs in Figures 2 through 7 to get a more precise
estimate of the cutoff frequency.
Example 1: LTC1569-7, R
EXT
= 20k, V
S
= 3V, divide-by-16
mode, DIV/CLK (Pin␣ 5) connected to V
+
(Pin 7), T
A
= 25°C.
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
CUTOFF
= 128kHz • (10k/20k)
• (1/16) = 4kHz.
For a more precise f
CUTOFF
estimate, use Table 1 to get
a value of f
CUTOFF
when R
EXT
= 20k and use the graph
in Figure 6 to find the correct divide ratio when V
S
= 3V
and R
EXT
= 20k. Based on Table 1 and Figure 6, f
CUTOFF
= 64kHz • (20.18k/20k) • (1/16.02) = 4.03kHz.
From Table 1, the part-to-part variation of f
CUTOFF
will
be ±2%. From the graph in Figure 7, the 0°C to 70°C
drift of f
CUTOFF
will be –0.2% to 0.2%.
Example 2: LTC1569-7, R
EXT
= 5k, V
S
= 5V, divide-by-1
mode, DIV/CLK (Pin␣ 5) connected to V
(Pin 4), T
A
= 25°C.
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
CUTOFF
= 128kHz • (10k/5k)
• (1/1) = 256kHz.
For a more precise f
CUTOFF
estimate, use Table 1 to get
f
CUTOFF
frequency for R
EXT
= 5k and use Figure 2 to
correct for the supply voltage when V
S
= 5V. From
Table␣ 1 and Figure 2, f
CUTOFF
= 256k • (5.01k/5k) •
0.970 = 249kHz.
Figure 6. Typical Divide Ratio in the
Divide-by-16 Mode, TA = 25°C
TEMPERATURE (°C)
–50
NORMALIZED FILTER CUTOFF
1569-7 F05
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990 –25 0 25 50 75 100
VS = 3V
VS = 5V
VS = 10V
VSUPPLY (V)
2
DIVIDE RATIO
1569-7 F06
16.32
16.16
16.00
15.84 46810
REXT = 5k
REXT = 10k
REXT = 20k
REXT = 40k
TEMPERATURE (°C)
–50
NORMALIZED FILTER CUTOFF
1569-7 F07
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990 –25 0 25 50 75 100
VS = 3V
VS = 5V
VS = 10V
8
LTC1569-7
input signal at IN
+
should be centered around the DC
voltage at IN
. The input can also be AC coupled, as shown
in the Typical Applications section.
For inverting single-ended filtering, connect IN
+
to GND or
to quiet DC reference voltage. Apply the signal to IN
. The
DC gain from IN
to OUT is –1, assuming IN
is referenced
to IN
+
and OUT is reference to GND.
Refer to the Typical Performance Characteristics section
to estimate the THD for a given input level.
Dynamic Input Impedance
The unique input sampling structure of the LTC1569-7 has
a dynamic input impedance which depends on the con-
figuration, i.e., differential or single-ended, and the clock
frequency. The equivalent circuit in Figure 8 illustrates the
input impedance when the cutoff frequency is 128kHz. For
other cutoff frequencies replace the 125k value with
125k • (128kHz/f
CUTOFF
).
When driven with a single-ended signal into IN
with IN
+
tied to GND, the input impedance is very high (~10M).
When driven with a single-ended signal into IN
+
with IN
tied to GND, the input impedance is a 125k resistor to GND.
When driven with a complementary signal whose com-
mon mode voltage is GND, the IN
+
input appears to have
125k to GND and the IN
input appears to have –125k to
GND. To make the effective IN
impedance 125k when
driven differentially, place a 62.5k resistor from IN
to
GND. For other cutoff frequencies use 62.5k • (128kHz/
f
CUTOFF
), as shown in the Typical Applications section. The
typical variation in dynamic input impedance for a given
clock frequency is ±10%.
Wideband Noise
The wideband noise of the filter is the RMS value of the
device’s output noise spectral density. The wideband
noise data is used to determine the operating signal-to-
noise at a given distortion level. The wideband noise is
nearly independent of the value of the clock frequency and
excludes the clock feedthrough. Most of the wideband
noise is concentrated in the filter passband and cannot be
removed with post filtering (Table 2). Table 3 lists the
typical wideband noise for each supply.
APPLICATIONS INFORMATION
WUUU
The oscillator is sensitive to transients on the positive
supply. The IC should be soldered to the PC board and the
PCB layout should include a 1µF ceramic capacitor be-
tween V
+
(Pin 7) and V
(Pin 4) , as close as possible to
the IC to minimize inductance. Avoid parasitic capacitance
on R
X
and avoid routing noisy signals near R
X
(Pin 6). Use
a ground plane connected to V
(Pin 4) for single supply
applications. Connect a ground plane to GND (Pin 3) for
dual supply applications and connect V
(Pin 4) to a
copper trace with low thermal resistance.
Input and Output Range
The input signal range includes the full power supply
range. The output voltage range is typically (V
+ 50mV)
to (V
+
– 0.8V) when V
S
= 3V. To maximize the undistorted
peak-to-peak signal swing of the filter, the GND (Pin 3)
voltage should be set to 2V (1.11V) in single 5V (3V)
supply applications.
The LTC1569-7 can be driven with a single-ended or
differential signal. When driven differentially, the voltage
between IN
+
and IN
(Pin 1 and Pin 2) is filtered with a DC
gain of 1. The single-ended output voltage OUT (Pin 8) is
referenced to the voltage of the GND (Pin 3). The common
mode voltage of IN
+
and IN
can be any voltage that keeps
the input signals within the power supply range.
For noninverting single-ended applications, connect IN
to GND or to a quiet DC reference voltage and apply the
input signal to IN
+
. If the input is DC coupled then the DC
gain from IN
+
to OUT will be 1. This is true given IN
+
and
OUT are referenced to the same voltage, i.e., GND, V
or
some other DC reference. To achieve the distortion levels
shown in the Typical Performance Characteristics the
Figure 8
8
3
1
2
OUT
IN
IN
+
GND 1569-7 F08
125k
+
+
125k
i = IN
+
– GND
125k
9
LTC1569-7
Table 2. Wideband Noise vs Supply Voltage, Single 3V Supply
Bandwidth Total Integrated Noise
DC to f
CUTOFF
105µV
RMS
DC to 2 • f
CUTOFF
125µV
RMS
DC to f
CLK
155µV
RMS
Table 3. Wideband Noise vs Supply Voltage, fCUTOFF = 128kHz
Total Integrated Noise
Power Supply DC to 2 • f
CUTOFF
3V 125µV
RMS
5V 135µV
RMS
±5V 145µV
RMS
Clock Feedthrough
Clock feedthrough is defined as the RMS value of the clock
frequency and its harmonics that are present at the filter’s
OUT pin (Pin 8). The clock feedthrough is measured with
IN
+
and IN
(Pins 1 and 2) grounded and depends on the
PC board layout and the power supply decoupling. Table␣ 4
shows the clock feedthrough (the RMS sum of the first 11
harmonics) when the LTC1569-7 is self-clocked with
R
EXT
= 10k, DIV/CLK (Pin 5) open (divide-by-4 mode). The
clock feedthrough can be reduced with a simple RC post
filter.
Table 4. Clock Feedthrough
Power Supply Feedthrough
3V 0.4mV
RMS
5V 0.6mV
RMS
±5V 0.9mV
RMS
DC Accuracy
DC accuracy is defined as the error in the output voltage
after DC offset and DC gain errors are removed. This is
similar to the definition of the integral nonlinearity in A/D
converters. For example, after measuring values of V
OUT(DC)
vs V
IN(DC)
for a typical LTC1569-7, a linear regression
shows that V
OUT(DC)
= V
IN(DC)
• 0.99854 + 0.00134V is the
straight line that best fits the data. The DC accuracy
describes how much the actual data deviates from this
straight line (i.e., DCERROR = V
OUT(DC)
– (V
IN(DC)
• 0.99854
+ 0.00134V). In a 12-bit system with a full-scale value of
2V, the LSB is 488µV. Therefore, if the DCERROR of the
filter is less than 488µV over a 2V range, the filter has
APPLICATIONS INFORMATION
WUUU
12-bit DC accuracy. Figure 9 illustrates the typical DC
accuracy of the LTC1569-7 on a single 5V supply.
Figure 9
VIN DC (V)
1.5 1.0 0.5 0 0.5 1.0 1.5
1569-7 F09
488
244
000
244
488
VS = 5V
REXT = 10k
TA = 25°C
DC ERROR (µV)
DC Offset
The output DC offset of the LTC1569-7 is trimmed to less
than ±5mV. The trimming is performed with V
S
= 1.9V,
–1.1V with the filter cutoff frequency set to 8kHz (R
EXT
=
10k, DIV/CLK shorted to V
+
). To obtain optimum DC offset
performance, appropriate PC layout techniques should be
used. The filter IC should be soldered to the PC board. The
power supplies should be well decoupled including a 1µF
ceramic capacitor from V
+
(Pin 7) to V
(Pin 4). A ground
plane should be used. Noisy signals should be isolated
from the filter input pins.
When the power supply is 3V, the output DC offset
typically change less than ±2mV when the clock frequency
varies from 64kHz to 8192kHz. When the clock frequency
is fixed, the output DC offset will typically change by ±4mV
(±13mV) when the power supply varies from 3V to 5V
(±5V) in the divide-by-1 mode. In the divide-by-4 or
divide-by-16 modes, the output DC offset will typically
change –9mV (27mV) when the power supply varies
from 3V to 5V (±5V). The offset is measured with respect
to GND (Pin 3).
Aliasing
Aliasing is an inherent phenomenon of sampled data
filters. In lowpass filters significant aliasing only occurs
when the frequency of the input signal approaches the
sampling frequency or multiples of the sampling fre-
quency. The LTC1569-7 samples the input signal twice
10
LTC1569-7
Single 3V Operation, AC Coupled Input,
128kHz Cutoff Frequency
18
27
36
45
V
OUT
V
IN
1µF
3V
R
EXT
= 10k
1µF
0.1µF
2k
3.48k
3V
1569-7 TA02
LTC1569-7
IN
+
IN
GND
V
OUT
V
+
R
X
DIV/CLK
f
CUTOFF
=
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
+
128kHz
n = 1
()
10k
R
EXT
()
18
27
36
45
V
OUT
V
IN
1µF
3V
R
EXT
= 10k
100pF
1µF
2k
3.48k
3V
1569-7 TA04
LTC1569-7
IN
+
IN
GND
V
OUT
V
+
R
X
DIV/CLK
f
CUTOFF
=
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
+
128kHz
n = 4
()
10k
R
EXT
()
Single 3V Supply Operation, DC Coupled,
32kHz Cutoff Frequency Single 5V Operation, 300kHz Cutoff Frequency,
DC Coupled Differential Inputs with Balanced Input Impedance
18
27
36
45
V
OUT
V
IN+
V
IN
1µF
5V
R
EXT
= 4.1k
1µF
27k
5V
1569-7 TA03
IN
GND
OUT
LT
®
1460-2.5
(SOT-23)
LTC1569-7
f
CUTOFF
~
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
+
128kHz
n = 1
()
10k
4.1k
()
IN
+
IN
GND
V
OUT
V
+
R
X
DIV/CLK
TYPICAL APPLICATIO S
U
Single 3V, AC Coupled Input,
128kHz Cutoff Frequency
FREQUENCY (Hz)
0 300k
80k 100k 160k 180k 240k 260k120k 140k 200k 220k 280k
GAIN (dB)
GROUP DELAY
1569-7 TA02a
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
16µs
14µs
12µs
140k0 20k 80k 100k40k 60k 120k
every clock period. Therefore, the sampling frequency is
twice the clock frequency and 64 times the filter cutoff
frequency. Input signals with frequencies near 2 • f
CLK
± f
CUTOFF
will be aliased to the passband of the filter and
appear at the output unattenuated.
Power Supply Current
The power supply current depends on the operating mode.
When the LTC1569-7 is in the divide-by-1 mode, or when
clocked externally, the supply current is reduced by 50%
for supply voltages below 4V. For the divide-by-4 and
divide-by-16 modes, the supply current is reduced by
60% relative to the current when clocked externally,
independent of the power supply voltage. Power supply
current versus cutoff frequency for various operating
modes is shown in the “Typical Performance Characteris-
tics” section.
APPLICATIONS INFORMATION
WUUU
11
LTC1569-7
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
18
27
36
45
f
CUTOFF
= f
CLK
/32
f
CLK
10MHz
V
OUT
V
IN
0.1µF
5V
5V
0V
0.1µF
–5V
1569-7 TA05
LTC1569-7
IN
+
IN
GND
V
OUT
V
+
R
X
DIV/CLK
1µF
Dual 5V Supply Operation,
DC Coupled Filter with External Clock Source
18
27
36
45
V
OUT
V
IN
1µF
5V
R
EXT
= 10k
1µF
1.65k
2.49k
5V
1569-7 TA06
LTC1569-7
IN
+
IN
GND
V
OUT
V
+
R
X
DIV/CLK
f
CUTOFF
=
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
+
128kHz
n = 1
()
10k
R
EXT
()
Single 5V Supply Operation, DC Coupled Input,
128kHz Cutoff Frequency
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
TYPICAL APPLICATION
U
1234
0.150 – 0.157**
(3.810 – 3.988)
8765
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
0.016 – 0.050
0.406 – 1.270
0.010 – 0.020
(0.254 – 0.508)× 45°
0°– 8° TYP
0.008 – 0.010
(0.203 – 0.254)
SO8 0996
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
12
LTC1569-7
PART NUMBER DESCRIPTION COMMENTS
LTC1064-3 Linear Phase, Bessel 8th Order Filter f
CLK
/f
CUTOFF
= 75/1 or 150/1, Very Low Noise
LTC1064-7 Linear Phase, 8th Order Lowpass Filter f
CLK
/f
CUTOFF
= 50/1 or 100/1, f
CUTOFF(MAX)
= 100kHz
LTC1068-x Universal, 8th Order Filter f
CLK
/f
CUTOFF
= 25/1, 50/1, 100/1 or 200/1, f
CUTOFF(MAX)
= 200kHz
LTC1069-7 Linear Phase, 8th Order Lowpass Filter f
CLK
/f
CUTOFF
= 25/1, f
CUTOFF(MAX)
= 200kHz, SO-8
LTC1164-7 Low Power, Linear Phase Lowpass Filter f
CLK
/f
CUTOFF
= 50/1 or 100/1, I
S
= 2.5mA, V
S
= 5V
LTC1264-7 Linear Phase, 8th Order Lowpass Filter f
CLK
/f
CUTOFF
= 25/1 or 50/1, f
CUTOFF(MAX)
= 200kHz
LTC1562/LTC1562-2 Universal, 8th Order Active RC Filter f
CUTOFF(MAX)
= 150kHz (LTC1562)
f
CUTOFF(MAX)
= 300kHz (LTC1562-2)
LINEAR TECHNOLOGY CORPORATION 1998
sn15697 15697fs LT/TP 0300 4K • PRINTED IN THE USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear-tech.com
RELATED PARTS
TYPICAL APPLICATIO S
U
18
27
36
45
V
OUT
1µF
+3V
R
EXT
= 8.56k
1µF
2k
3.48k
+3V
20k
300kbps
DATA
20k
4.99k
+3V
1569-7 TA09
LTC1569-7
IN
+
IN
GND
V
OUT
V
+
R
X
DIV/CLK
18
27
36
45
V
OUT
1µF
+3V
R
EXT
= 8.56k
1µF
2k
3.48k
+3V
20k
20k
4.99k
+3V
1569-7 TA10
LTC1569-7
IN
+
IN
GND
V
OUT
V
+
R
X
D
1
D
0
DIV/CLK
10k
200ksps
DATA
Pulse Shaping Circuit for Single 3V Operation, 300kbps
2 level data, 150kHz Cutoff Filter Pulse Shaping Circuit for Single 3V Operation, 400kbps
(200ksps) 4 Level Data, 128kHz Cutoff Filter
1569-7 TA07
0.25V/DIV
1µs/DIV
1569-7 TA08
0.3V/DIV
1µs/DIV
2-Level, 300kbps Eye Diagram 4-Level, 400kbps (200ksps)
Eye Diagram