FDMS86580-F085 N-Channel PowerTrench® MOSFET
©2016 Semiconductor Components Industries, LLC.
August-2017,Rev. 2
Publication Order Number:
FDMS86580-F085/D
FDMS86580-F085
N-Channel PowerTrench® MOSFET
60 V, 50 A, 9.6 mΩ
Features
Typical RDS(on) = 7.9 mΩ at VGS = 10V, ID = 50 A
Typical Qg(tot) = 20 nC at VGS = 10V, ID = 50 A
UIS Capability
RoHS Compliant
Qualified to AEC Q101
Applications
Automotive Engine Control
PowerTrain Management
Solenoid and Motor Drivers
Electronic Steering
Integrated Starter/Alternator
Distributed Power Architectures and VRM
Primary Switch for 12V Systems
Power 56 D
DDD
G
SSS
Pin 1
Bottom
Top
Pin 1
MOSFET Maximum Ratings TJ = 25°C unless otherwise noted.
Symbol Parameter Ratings Units
VDSS Drain-to-Source Voltage 60 V
VGS Gate-to-Source Voltage ±20 V
ID
Drain Current - Continuous (VGS=10) (Note 1) TC = 25°C 50 A
Pulsed Drain Current TC = 25°C See Figure 4
EAS Single Pulse Avalanche Energy (Note 2) 19 mJ
PD
Power Dissipation 75 W
Derate Above 25oC0.5W/
oC
TJ, TSTG Operating and Storage Temperature -55 to + 175 oC
RθJC Thermal Resistance, Junction to Case 2.0 oC/W
RθJA Maximum Thermal Resistance, Junction to Ambient (Note 3) 50 oC/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDMS86580 FDMS86580-F085 Power 56 13” 12mm 3000units
Notes:
1: Current is limited by bondwire configuration.
2: Starting TJ = 25°C, L = 20μH, IAS = 44A, VDD = 60V during inductor charging and VDD = 0V during time in avalanche.
3: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA is determined by the board design. The maximum rating
presented here is based on mounting on a 1 in2 pad of 2oz copper.
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Electrical Characteristics TJ = 25°C unless otherwise noted.
Off Characteristics
On Characteristics
Dynamic Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Units
BVDSS Drain-to-Source Breakdown Voltage ID = 250μA, VGS = 0V 60 - - V
IDSS Drain-to-Source Leakage Current VDS = 6 0 V , T J = 25oC --1μA
VGS = 0V TJ = 175oC (Note 4) - - 1 mA
IGSS Gate-to-Source Leakage Current VGS = ±20V - - ±100 nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250μA 2.0 3.5 4.2 V
RDS(on) Drain to Source On Resistance ID = 50A,
VGS= 10V
TJ = 25oC -7.99.6mΩ
TJ = 175oC (Note 4) - 15.6 19.5 mΩ
Ciss Input Capacitance VDS = 30V, VGS = 0V,
f = 1MHz
- 1430 - pF
Coss Output Capacitance - 440 - pF
Crss Reverse Transfer Capacitance - 25 - pF
RgGate Resistance VGS = 0.5V, f = 1MHz - 1.8 - Ω
Qg(ToT) Total Gate Charge VGS = 0 to 10V VDD = 30V
ID = 50A
-2030nC
Qg(th) Threshold Gate Charge VGS = 0 to 2V - 3 - nC
Qgs Gate-to-Source Gate Charge -9-nC
Qgd Gate-to-Drain “Miller“ Charge - 4 - nC
Switching Characteristics
Drain-Source Diode Characteristics
Note:
4: The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production.
ton Turn-On Time
VDD = 30V, ID = 50A,
VGS = 10V, RGEN = 6Ω
- - 30 ns
td(on) Turn-On Delay - 13 - ns
trRise Time - 7 - ns
td(off) Turn-Off Delay - 15 - ns
tfFall Time - 5 - ns
toff Turn-Off Time - - 30 ns
VSD Source-to-Drain Diode Voltage ISD = 50A, VGS = 0V - 0.97 1.3 V
ISD = 25A, VGS = 0V - 0.88 1.2 V
trr Reverse-Recovery Time VDD = 48V, IF = 50A,
dISD/dt = 100A/μs
-4466ns
Qrr Reverse-Recovery Charge - 28 42 nC
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Typical Characteristics
Figure 1. Normalized Power Dissipation vs. Case
Temperature
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
Figure 3.
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TC
PDM
t1
t2
Normalized Maximum Transient Thermal Impedance
Figure 4. Peak Current Capability
T
C
= 25
o
C
I = I
25
175 - T
C
150
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
FDMS86580-F085 N-Channel PowerTrench® MOSFET
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Figure 5. Forward Bias Safe Operating Area
0.001 0.01 0.1 1 10 100
1
10
100
500
STARTING TJ = 150oC
STARTING TJ = 25oC
IAS, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R = 0
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
NOTE: Refer to ON Semiconductor Application Notes AN7514
and AN7515
Figure 6. Unclamped Inductive Switching
Capability
Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics
Figure 9. Saturation Characteristics Figure 10. Saturation Characteristics
Typical Characteristics
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Figure 11. RDSON vs. Gate Voltage Figure 12. Normalized RDSON vs. Junction
Temperature
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
Typical Characteristics
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