Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 6 1Publication Order Number:
MC10172/D
MC10172
Dual Binary to 1-4 Decoder
(High)
The MC10172 is a binary-coded 2 line to dual 4 line decoder with
selected outputs high. With either E0 or E1 low, the corresponding
selected 4 outputs are low. The common enable E, when high, forces
all outputs low.
•PD = 325 mW typ/pkg (No Load)
•tpd = 4.0 ns typ
•tr, tf = 2.0 ns typ (20%–80%)
DIP PIN ASSIGNMENT
VCC1
E1
Q13
Q12
Q11
Q10
B
VEE
VCC2
E
E0
Q00
Q01
Q02
Q03
A
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
E0 14
A 9
B 7
E 15
E1 2
10 Q0 3
11 Q0 2
12 Q0 1
13 Q0 0
3 Q1 3
4 Q1 2
5 Q1 1
6 Q1 0
TRUTH TABLE
E E1 E0 A B Q10 Q11 Q12 Q13 Q00 Q01 Q02 Q03
L H H L L H L L L H L L L
L H H L H L H L L L H L L
L H H H L L L H L L L H L
L H H H H L L L H L L L H
L L H L L L L L L H L L L
L H L L L H L L L L L L L
H X X X X L L L L L L L L
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Device Package Shipping
ORDERING INFORMATION
MC10172L CDIP–16 25 Units / Rail
MC10172P PDIP–16 25 Units / Rail
MC10172FN PLCC–20 46 Units / Rail
MARKING
DIAGRAMS
1
16
A = Assembly Location
WL = W afer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10172L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10172
AWLYYWW
1
1
16
MC10172P
AWLYYWW
MC10172
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2
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Under
–30°C +25°C +85°C
Characteristic Symbol
Under
Test Min Max Min Typ Max Min Max Unit
Power Supply Drain Current IE8 85 65 77 85 mAdc
Input Current IinH 14 350 220 220 µAdc
IinL 14 0.5 0.5 0.3 µAdc
Output Voltage Logic 1 VOH 6
13 –1.060
–1.060 –0.890
–0.890 –0.960
–0.960 –0.810
–0.810 –0.890
–0.890 –0.700
–0.700 Vdc
Output Voltage Logic 0 VOL 13 –1.890 –1.675 –1.850 –1.650 –1.825 –1.615 Vdc
Threshold Voltage Logic 1 VOHA 6
13 –1.080
–1.080 –0.980
–0.980 –0.910
–0.910 Vdc
Threshold Voltage Logic 0 VOLA 6
13 –1.655
–1.655 –1.630
–1.630 –1.595
–1.595 Vdc
Switching T imes (50Ω Load) ns
Propagation Delay t7+6–
t7–6+
t7+13–
t7–13+
6
6
13
13
1.5
1.5
1.5
1.5
6.2
6.2
6.2
6.2
1.5
1.5
1.5
1.5
4.0
4.0
4.0
4.0
6.0
6.0
6.0
6.0
1.5
1.5
1.5
1.5
6.4
6.4
6.4
6.4
Rise Time (20 to 80%) t6+
t13+ 6
13 1.0
1.0 3.3
3.3 1.1
1.1 2.0
2.0 3.3
3.3 1.1
1.1 3.4
3.4
Fall T ime (20 to 80%) t6–
t13– 6
13 1.0
1.0 3.3
3.3 1.1
1.1 2.0
2.0 3.3
3.3 1.1
1.1 3.4
3.4
MC10172
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3
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE
–30°C–0.890 –1.890 –1.205 –1.500 –5.2
+25°C–0.810 –1.850 –1.105 –1.475 –5.2
+85°C–0.700 –1.825 –1.035 –1.440 –5.2
Pin
Under
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(VCC)
Characteristic Symbol
U
n
d
er
Test VIHmax VILmin VIHAmin VILAmax VEE
(V
CC
)
Gnd
Power Supply Drain Current IE8 8 1, 16
Input Current IinH 14 14 8 1, 16
IinL 14 14 8 1, 16
Output Voltage Logic 1 VOH 6
13 2
14 8
81, 16
1, 16
Output Voltage Logic 0 VOL 13 15 2,7,9,14 8 1, 16
Threshold Voltage Logic 1 VOHA 6
13 2
14 8
81, 16
1, 16
Threshold Voltage Logic 0 VOLA 6
13 2,9,14
2,7,14 7
98
81, 16
1, 16
Switching T imes (50Ω Load) +1.11V +0.31V Pulse In Pulse Out –3.2 V +2.0 V
Propagation Delay t7+6–
t7–6+
t7+13–
t7–13+
6
6
13
13
2
2
14
14
9, 14
9, 14
2, 9
2,9
7
7
7
7
6
6
13
13
8
8
8
8
1, 16
1, 16
1, 16
1, 16
Rise Time (20 to 80%) t6+
t13+ 6
13 2
14 9, 14
2, 9 7
76
13 8
81, 16
1, 16
Fall T ime (20 to 80%) t6–
t13– 6
13 2
14 9, 14
2, 9 7
76
13 8
81, 16
1, 16
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
MC10172
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4
PACKAGE DIMENSIONS
PLCC–20
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED A T DATUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
–M–
–N–
–L–
Y BRK
W
V
D
D
S
L–M
M
0.007 (0.180) N S
T
S
L–M
M
0.007 (0.180) N S
T
S
L–M
S
0.010 (0.250) N S
T
XG1
B
U
Z
VIEW D–D
20 1
S
L–M
M
0.007 (0.180) N S
T
S
L–M
M
0.007 (0.180) N S
T
S
L–M
S
0.010 (0.250) N S
T
C
G
VIEW S
E
J
R
Z
A
0.004 (0.100)
–T– SEATING
PLANE
S
L–M
M
0.007 (0.180) N S
T
S
L–M
M
0.007 (0.180) N S
T
H
VIEW S
K
K1
F
G1 DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.385 0.395 9.78 10.03
B0.385 0.395 9.78 10.03
C0.165 0.180 4.20 4.57
E0.090 0.110 2.29 2.79
F0.013 0.019 0.33 0.48
G0.050 BSC 1.27 BSC
H0.026 0.032 0.66 0.81
J0.020 ––– 0.51 –––
K0.025 ––– 0.64 –––
R0.350 0.356 8.89 9.04
U0.350 0.356 8.89 9.04
V0.042 0.048 1.07 1.21
W0.042 0.048 1.07 1.21
X0.042 0.056 1.07 1.42
Y––– 0.020 ––– 0.50
Z2 10 2 10
G1 0.310 0.330 7.88 8.38
K1 0.040 ––– 1.02 –––
____
MC10172
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5
PACKAGE DIMENSIONS
CDIP–16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–A–
–B–
–T–
FE
G
NK
C
SEATING
PLANE
16 PL
D
S
A
M
0.25 (0.010) T
16 PLJS
B
M
0.25 (0.010) T
M
L
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.750 0.785 19.05 19.93
B0.240 0.295 6.10 7.49
C––– 0.200 ––– 5.08
D0.015 0.020 0.39 0.50
E0.050 BSC 1.27 BSC
F0.055 0.065 1.40 1.65
G0.100 BSC 2.54 BSC
H0.008 0.015 0.21 0.38
K0.125 0.170 3.18 4.31
L0.300 BSC 7.62 BSC
M0 15 0 15
N0.020 0.040 0.51 1.01
____
16 9
18
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
B
FC
S
HGD
J
L
M
16 PL
SEATING
18
916
K
PLANE
–T–
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.740 0.770 18.80 19.55
B0.250 0.270 6.35 6.85
C0.145 0.175 3.69 4.44
D0.015 0.021 0.39 0.53
F0.040 0.70 1.02 1.77
G0.100 BSC 2.54 BSC
H0.050 BSC 1.27 BSC
J0.008 0.015 0.21 0.38
K0.110 0.130 2.80 3.30
L0.295 0.305 7.50 7.74
M0 10 0 10
S0.020 0.040 0.51 1.01
____
PDIP–16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
MC10172
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6
Notes
MC10172
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7
Notes
MC10172
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8
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MC10172/D
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