TC74LCXR163245FT
2014-03-01
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TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCXR163245FT
16-Bit Dual Supply Bus Transceiver with Series Resistor
The TC74LCXR163245FT is a dual supply, advanced high-speed
CMOS 16-bit dual supply voltage interface bus transceiver
fabricated with silicon gate CMOS technology.
Designed for use as an interface between a 3.3-V or a 2.5-V bus
and a 5-V bus in mixed 3.3-V or 2.5-V / 5-V supply systems, it
achieves high-speed operation while maintaining the CMOS low
power dissipation.
It is intended for two-way asynchronous communication between
data busses. The direction of data transmission is determined by the
level of the DIR input. The enable input ( OE ) can be used to disable
the device so that the buses are effectively isolated.
The B-port interfaces with the 3.3 V or 2.5 V bus, the A-port with
the 5 V bus.
The 26-Ω series resistor helps reducing output overshoot and undershoot without external resistor.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
Features (Note 1) (Note 2)
• Bidirectional interface between 3.3 V or 2.5 V buses and 5 V buses
• 26-Ω series resistors on outputs
• High-speed operation: tpd = 8.5 ns (max)
(VCCB = 3.3 ± 0.3 V / VCCA = 5 ± 0.5 V, Ta = −40 to 85°C)
• Low-voltage operation: ICC = 80 μA (max) (Ta = −40 to 85°C)
• Symmetrical output impedance: IOUTB = ±12 mA (min)
I
OUTA = ±12 mA (min)
(VCCB = 3.0 V / VCCA = 4.5 V)
• Power-down protection provided on all inputs and outputs
• Allows A port and VCCA to float simultaneously in high state at OE pin
• Latch-up performance: −500 mA
• ESD performance: Machine model > ±200 V (Note 2)
• Package: TSSOP
Note 1: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.
All floating (high impedance) bus pins must have their input fixed by means of pull-up or pull-down resistors.
Note 2: This device is electrostatic sensitivity (human body model > 1 kV).
Please handle with caution.
Weight: 0.25 g (typ.)
Start of commercial production
1999-03
TC74LCXR163245FT
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Pin Assignment (top view) IEC Logic Symbol
(3.3 V) VCCB
OE1
48
1A1
1A2
GND
47
46
45
44
43
42
1DIR 1
2
3
4
5
6
7
GND
1B3
1B4
(3.3 V) VCCB
1B5
1B6
1A3
8
9
10
1A5
1A6
GND
41
40
39
1A4
VCCA (5 V)
GND
1B1
1B2
1A7
38
1A8
2A1
2A2
37
36
35
34
33
32
1B7 11
12
13
14
15
16
17
2B2
GND
2B3
2B4
2B5
GND
18
19
20
VCCA (5 V)
2A5
2B6
31
30
29
2A3
2A4
2A6
1B8
2B1
28 21
GND
2B7
2B8
22
23
24
2A7
2A8
2DIR
27
26
25
GND
OE2
4
OE1
1DIR
OE2
2DIR
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
48
1
25
24
47
46
44
43
41
40
38
35
33
32
30
29
27
26
37
36
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2
3
5
6
8
9
11
14
16
17
19
20
22
23
12
13
1
2
5
G3
3 EN1 (BA)
3 EN2 (AB)
G6
6 EN4 (BA)
6 EN5 (AB)
TC74LCXR163245FT
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Truth Table
Inputs Function
OE1 1DIR Bus
1A1-1A8
Bus
1B1-1B8
Outputs
L L Output Input A = B
L H Input Output B = A
H X Z Z
Inputs Function
OE2 2DIR Bus
2A1-2A8
Bus
2B1-2B8
Outputs
L L Output Input A = B
L H Input Output B = A
H X Z Z
X: Don’t care
Z: High impedance
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Block Diagram
VCCB VCCA
1DIR
OE1
1B1
1B8
1A1
1A8
Logic
level
converter
Same as above block
VCCB VCCA
2DIR
OE2
2B1
2B8
2A1
2A8
Logic
level
converter
Same as above block
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Absolute Maximum Ratings (Note 1)
Characteristics Symbol Rating Unit
VCCB −0.5 to 7.0
Power supply voltage (Note 2)
VCCA −0.5 to 7.0
V
DC input voltage
(DIR, OE ) VIN −0.5 to 7.0 V
−0.5 to 7.0 (Note 3)
VI/OB −0.5 to VCCB + 0.5
(Note 4)
−0.5 to 7.0 (Note 3)
DC bus I/O voltage
VI/OA −0.5 to VCCA + 0.5
(Note 4)
V
Input diode current IIK −50 mA
Output diode current II/OK ±50 (Note 5) mA
IOUTB ±50
DC output current
IOUTA ±50
mA
ICCB ±100
DC VCC/ground current per supply pin
ICCA ±100
mA
Power dissipation PD 400 mW
Storage temperature Tstg −65 to 150 °C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: Don’t supply a voltage to VCCA terminal when VCCB is in the off-state.
Note 3: Output in OFF state
Note 4: High or low state. IOUT absolute maximum rating must be observed.
Note 5: VOUT < GND, VOUT > VCC
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Operating Ranges (Note 1)
Characteristics Symbol Rating Unit
VCCB 2.3 to 3.6
Power supply voltage (Note 2)
VCCA 4.5 to 5.5
V
Input voltage
(DIR, OE ) VIN 0 to 5.5 V
0 to 5.5 (Note 3)
VI/OB 0 to VCCB (Note 4)
0 to 5.5 (Note 3)
DC bus I/O voltage
VI/OA 0 to VCCA (Note 4)
V
±12 (Note 5)
IOUTB
±4 (Note 6)
Output current
IOUTA ±12 (Note 7)
mA
Operating temperature Topr −40 to 85 °C
Input rise and fall time dt/dv 0 to 10 (Note 8) ns/V
Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must
be tied to either VCC or GND. Please connect both bus inputs and the bus outputs with VCC or GND when
the I/O of the bus terminal changes by the function. In this case, please note that the output is not
short-circuited.
Note 2: Don’t use in VCCB > VCCA.
Note 3: Output in OFF state
Note 4: High or low state
Note 5: VCCB = 3.0 to 3.6 V
Note 6: VCCB = 2.3 to 2.7 V
Note 7: VCCA = 4.5 to 5.5 V
Note 8: VINB = 0.8 to 2.0 V, VCCB = 3.0 V
VINA = 0.8 to 2.0 V, VCCA = 5.0 V
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Electrical Characteristics
DC Characteristics
Ta =
−40 to 85°C
Characteristics Symbol Test Condition
VCCB (V) VCCA (V)
Min Max
Unit
2.5 ± 0.2 5.0 ± 0.5 1.7 ⎯
VIHB DIR, OE , Bn
3.3 ± 0.3 5.0 ± 0.5 2.0 ⎯
H-level input voltage
VIHA An 2.3 to 3.6 5.0 ± 0.5 2.0 ⎯
V
2.5 ± 0.2 5.0 ± 0.5 ⎯ 0.7
VILB DIR, OE , Bn
3.3 ± 0.3 5.0 ± 0.5 ⎯ 0.8
L-level input voltage
VILA An 2.3 to 3.6 5.0 ± 0.5 ⎯ 0.8
V
IOHB = −100 μA 2.3 to 3.6 5.0 ± 0.5 VCCB
− 0.2 ⎯
IOHB = −12 mA 3.0 5.0 ± 0.5 2.2 ⎯
VOHB
IOHB = − 4 mA 2.3 5.0 ± 0.5 1.8 ⎯
IOHA = −100 μA 2.3 to 3.6 5.0 ± 0.5 VCCA
− 0.2 ⎯
H-level output voltage
VOHA
VINA
= VIHA or VILA
VINB
= VIHB or VILB
IOHA = −12 mA 2.3 to 3.6 4.5 3.7 ⎯
V
IOLB = 100 μA 2.3 to 3.6 5.0 ± 0.5 ⎯ 0.2
IOLB = 12 mA 3.0 5.0 ± 0.5 ⎯ 0.8
VOLB
IOLB = 4 mA 2.3 5.0 ± 0.5 ⎯ 0.6
IOLA = 100 μA 2.3 to 3.6 5.0 ± 0.5 ⎯ 0.2
L-level output voltage
VOLA
VINA
= VIHA or VILA
VINB
= VIHB or VILB
IOLA = 12 mA 2.3 to 3.6 4.5 ⎯ 0.7
V
IOZB
VIN = VIHB or VILB
VI/OB = VCCB or GND 2.3 to 3.6 5.0 ± 0.5 ⎯ ±5.0
3-state output OFF state current
IOZA
VIN = VIHB or VILB
VI/OA = VCCA or GND 2.3 to 3.6 5.0 ± 0.5 ⎯ ±5.0
μA
Input leakage current IIN VIN (DIR, OE ) = VCCB or GND 3.6 5.5 ⎯ ±5.0 μA
Power-off leakage current IOFF VINA/VINB = 0 to 5.5 V 0 0 ⎯ 10 μA
ICCB1 VI/OA = Open, VCCA = Open
OE
V = VCCB, DIR = GND 3.6 Open
⎯ 50
ICCB2 VINA = VCCA or GND
VINB = VCCB or GND 3.6 5.5
⎯ 50
ICCA VINA = VCCA or GND
VINB = VCCB or GND 3.6 5.5
⎯ 80
ICCTB V
INB = VCCB − 0.6 V per input 3.6 5.0 ± 0.5 ⎯ 500
μA
Quiescent supply current
ICCTA V
INA = 3.4 V per input 2.3 to 3.6 5.5 ⎯ 2.0 mA
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AC Characteristics (input: tr = tf = 2.5 ns, RL = 500 Ω)
VCCB = 3.3 ± 0.3 V
Ta =
−40 to 85°C
Characteristics Symbol Test Condition CL (pF) VCCA (V)
Min Max
Unit
Propagation delay time
(Bn → An)
tpLH
tpHL
50 5.0 ± 0.5 1.0 7.5
3-state output enable time
(OE → An)
tpZL
tpZH
50 5.0 ± 0.5 1.0 9.5
3-state output disable time
(OE → An)
tpLZ
tpHZ
Input: Bn
Output: An
(DIR = “L”)
50 5.0 ± 0.5 1.0 9.5
ns
Propagation delay time
(An → Bn)
tpLH
tpHL
50 5.0 ± 0.5 1.0 8.5
3-state output enable time
(OE → Bn)
tpZL
tpZH
50 5.0 ± 0.5 1.0 9.5
3-state output disable time
(OE → Bn)
tpLZ
tpHZ
Input: An
Output: Bn
(DIR = “H”)
50 5.0 ± 0.5 1.0 9.5
ns
Output to output skew tosLH
tosHL (Note) 50 5.0 ± 0.5 ⎯ 1.0 ns
Note: Parameter guaranteed by design.
(tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|)
VCCB = 2.5 ± 0.2 V
Ta =
−40 to 85°C
Characteristics Symbol Test Condition CL (pF) VCCA (V)
Min Max
Unit
Propagation delay time
(Bn → An)
tpLH
tpHL
50 5.0 ± 0.5 1.0 9.0
3-state output enable time
(OE → An)
tpZL
tpZH
50 5.0 ± 0.5 1.0 13.0
3-state output disable time
(OE → An)
tpLZ
tpHZ
Input: Bn
Output: An
(DIR = “L”)
50 5.0 ± 0.5 1.0 14.0
ns
Propagation delay time
(An → Bn)
tpLH
tpHL
30 5.0 ± 0.5 1.0 9.5
3-state output enable time
(OE → Bn)
tpZL
tpZH
30 5.0 ± 0.5 1.0 12.5
3-state output disable time
(OE → Bn)
tpLZ
tpHZ
Input: An
Output: Bn
(DIR = “H”)
30 5.0 ± 0.5 1.0 10.0
ns
Output to output skew tosLH
tosHL (Note) 30 or 50 5.0 ± 0.5 ⎯ 1.0 ns
Note: Parameter guaranteed by design.
(tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|)
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Capacitive Characteristics (Ta = 25°C)
VCCB = 2.5, 3.3 V
Characteristics Symbol
Test
Circuit Test Condition VCCA (V) Typ. Unit
Input capacitance CIN ⎯ DIR, OE 5.0
7 pF
Output capacitance CI/O ⎯ An, Bn 5.0 8 pF
A ⇒ B (DIR = “H”) 5.0 20
CPDA ⎯
B ⇒ A (DIR = “L”) 5.0 66
pF
A ⇒ B (DIR = “H”) 5.0 34
Power dissipation capacitance
(Note)
CPDB ⎯
B ⇒ A (DIR = “L”) 5.0 4
pF
Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr) = CPD･VCC･fIN + ICC / 16 (per bit)
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Package Dimensions
Weight: 0.25 g (typ.)
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
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TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
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• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH
MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
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