Precision, Very Low Noise, Low Input Bias Current Operational Amplifiers AD8671/AD8672/AD8674 PIN CONFIGURATIONS The AD8671/AD8672/AD8674 are very high precision amplifiers featuring very low noise, very low offset voltage and drift, low input bias current, 10 MHz bandwidth, and low power consumption. Outputs are stable with capacitive loads of over 1000 pF. Supply current is less than 3 mA per amplifier at 30 V. NC 1 V+ -IN 2 V+ TOP VIEW 6 OUT (Not to Scale) V- 4 5 NC NC = NO CONNECT Figure 1. 8-Lead SOIC (R Suffix) OUT A 1 AD8672 8 V+ 7 OUT B TOP VIEW 6 -IN B (Not to Scale) 5 +IN B V- 4 +IN A 3 Figure 2. 8-Lead MSOP (RM Suffix) OUT A 1 -IN A 2 Figure 3. 8-Lead SOIC (R Suffix) OUT A 1 +IN A 3 OUT B TOP VIEW 6 -IN B (Not to Scale) 5 +IN B V- 4 OUT A 1 -IN A 2 12 +IN D +IN A 3 TOP VIEW 11 V- +IN B 5 (Not to Scale) 10 +IN C 9 -IN C 8 OUT C Figure 5. 14-Lead SOIC (R Suffix) 14 OUT D 13 -IN D AD8674 12 +IN D TOP VIEW 11 V- -IN B 5 (Not to Scale) 10 +IN C V+ 4 -IN B 6 V+ 7 +IN A 3 13 -IN D OUT B 7 8 AD8672 Figure 4. 8-Lead MSOP (RM Suffix) 14 OUT D AD8674 NC 7 +IN 3 03718-B-001 NC = NO CONNECT 8 AD8671 03718-B-002 TOP VIEW 6 OUT (Not to Scale) V- 4 5 NC -IN A 2 GENERAL DESCRIPTION NC 7 03718-B-003 PLL filters Filters for GPS Instrumentation Sensors and controls Professional quality audio 8 +IN 3 -IN A 2 APPLICATIONS AD8671 V+ 4 +IN B 6 9 -IN C OUT B 7 8 OUT C Figure 6. 14-Lead TSSOP (RU Suffix) The AD8671's combination of ultralow noise, high precision, speed, and stability is unmatched, while the MSOP version requires only half the board space of comparable amplifiers. Applications for these amplifiers include high quality PLL filters, precision filters, medical and analytical instrumentation, precision power supply controls, ATE, data acquisition, and precision controls as well as professional quality audio. The AD8671/AD8672/AD8674 are specified over the extended industrial (-40C to +125C) temperature range. The AD8671/AD8672 are available in the 8-lead SOIC and 8-lead MSOP packages. The AD8674 is available in 14-lead SOIC and 14-lead TSSOP packages. Surface-mount devices in MSOP packages are available in tape and reel only. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. 03718-B-004 NC 1 -IN 2 03718-B-005 Very low noise: 2.8 nV/Hz, 77 nV p-p Wide bandwidth: 10 MHz Low input bias current: 12 nA max Low offset voltage: 75 V max High open-loop gain: 120 dB min Low supply current: 3 mA per amplifier Dual-supply operation: 5 V to 15 V Unity gain stable No phase reversal 03718-B-006 FEATURES One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved. AD8671/AD8672/AD8674 TABLE OF CONTENTS Specifications..................................................................................... 3 Total Noise vs. Source Resistance............................................. 11 Electrical Characteristics, 5.0 V................................................ 3 THD + Noise............................................................................... 12 Electrical Characteristics, 15 V................................................. 4 Driving Capacitive Loads.......................................................... 12 Absolute Maximum Ratings............................................................ 5 GPS Receiver............................................................................... 13 Typical Performance Characteristics ............................................. 6 Band-Pass Filter.......................................................................... 13 Applications..................................................................................... 11 PLL Synthesizers and Loop Filters ........................................... 13 Unity Gain Follower Applications............................................ 11 Outline Dimensions ....................................................................... 14 Output Phase Reversal............................................................... 11 Ordering Guide............................................................................... 16 REVISION HISTORY 4/04--Data Sheet Changed from Rev. A to Rev. B Changes to Figure 32.................................................................. 11 Changes to Figures 36, 37, and 38............................................. 12 1/04--Data Sheet Changed from Rev. 0 to Rev. A Added AD8672 and AD8674 parts ..............................Universal Changes to Specifications ............................................................ 3 Deleted Figure 3............................................................................ 6 Changes to Figures 7, 8, and 9..................................................... 6 Changes to Figure 37.................................................................. 12 Added new Figure 32 ................................................................. 10 Rev. B | Page 2 of 16 AD8671/AD8672/AD8674 SPECIFICATIONS ELECTRICAL CHARACTERISTICS, 5.0 V Table 1. VS = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift AD8671 AD8672/AD8674 Input Bias Current Symbol Conditions VOS VOS/T -40C < TA < +125C -40C < TA < +125C IB +25C < TA < +125C -40C < TA < +125C Input Offset Current IOS +25C < TA < +125C -40C < TA < +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance, Common Mode Input Capacitance, Differential Mode Input Resistance, Common Mode Input Resistance, Differential Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio AD8671/AD8672 AD8674 Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Current Noise Density Channel Separation AD8672/AD8674 Min CMRR AVO CINCM CINDM RIN RINDM VCM = -2.5 V to +2.5 V RL = 2 k, VO = -3 V to +3 V VOH VOL VOH VOL IOUT RL = 2 k, -40C to +125C RL = 2 k, -40C to +125C RL = 600 RL = 600 PSRR VS = 4 V to 18 V -12 -20 -40 -12 -20 -40 -2.5 100 1000 +3.8 +3.7 110 106 Typ Max Unit 20 30 75 125 V V 0.3 0.3 +3 +5 +8 +6 +6 +8 0.5 0.8 +12 +20 +40 +12 +20 +40 +2.5 V/C V/C nA nA nA nA nA nA V dB V/mV pF pF G M 120 6000 6.25 7.5 3.5 15 +4.0 -3.9 +3.9 -3.8 10 130 115 3 ISY VO = 0 V -40C 1 V) are applied at the positive terminal of amplifiers (such as the OP27, LT1007, OPA227, and AD8671) with back-to-back diodes at the input stage, the use of a resistor in the feedback loop is recommended to avoid having the amplifier load the signal generator. The feedback resistor, RF, should be at least 500 . However, if large values must be used for RF, a small capacitor, CF, should be inserted in parallel with RF to compensate for the pole introduced by the input capacitance and RF. VOLTAGE (1V/DIV) VIN 03718-B-033 VOUT Figure 32 shows the uncompensated output response with a 10 k resistor in the feedback and the compensated response with CF = 15 pF. Figure 33. Output Phase Reversal TOTAL NOISE VS. SOURCE RESISTANCE OUTPUT UNCOMPENSATED OUTPUT COMPENSATED The low input voltage noise of the AD8671 makes it a great choice for applications with low source resistance. However, because the AD8671 has low input current noise, it can also be used in circuits with substantial source resistance. REF1 +OVER 23.23% VOLTAGE (1V/DIV) TIME (10s/DIV) CH2 +OVER 7.885% Figure 34 shows the voltage noise, current noise, thermal noise, and total rms noise of the AD8671 as a function of the source resistance. 03718-B-032 TIME (100ns/DIV) For RS < 475 , the input voltage noise, en, dominates. For 475 < RS < 412 k, thermal noise dominates. For RS > 412 k, the input current noise dominates. Figure 32. Transient Output Response 1000 OUTPUT PHASE REVERSAL C 100 in 10 en_t (4kRST)1/2 en B A 1 10 100 1k 10k 100k SOURCE RESISTANCE () Figure 34. Noise vs. Source Resistance Rev. B | Page 11 of 16 1M 03718-B-034 TOTAL NOISE (nV/ Hz) Phase reversal is a change of polarity in the amplifier transfer function that occurs when the input voltage exceeds the supply voltage. The AD8671/AD8672/AD8674 do not exhibit phase reversal even when the input voltage is 1 V beyond the supplies. AD8671/AD8672/AD8674 THD + NOISE VSY = 15V RL = 2k CL = 1nF VIN = 100mV AV = +1 VOLTAGE (500mV/DIV) The AD8671/AD8672/AD8674 exhibit low total harmonic distortion over the entire audio frequency range. This makes them suitable for applications with high closed-loop gains, including audio applications. Figure 35 shows approximately 0.0006% of THD + N in a positive unity gain, the worst-case configuration for distortion. 0.1000 CH2 +OVER 39.80% CH2 -OVER 39.80% 03718-B-036 VS = 5V VIN = 2.5V RL = 600 0.0500 0.0200 TIME (10s/DIV) Figure 36. Capacitive Load Drive 0.0050 RF 0.0020 LT1007 0.0010 0.0005 500 RG AD8671 500 VCC CF 220pF 0.0002 RS 50 100 200 500 1k 2k 5k 10k 20k Hz 03718-B-035 0.0001 20 10 CL 1nF RL 2k VIN VEE Figure 35. Total Harmonic Noise and Distortion 03718-B-037 PERCENTAGE 0.0100 Figure 37. Recommended Capacitive Load Circuit DRIVING CAPACITIVE LOADS The AD8671/AD8672/AD8674 can drive large capacitive loads without causing instability. However, when configured in unity gain, driving very large loads can cause unwanted ringing or instability. VOLTAGE (100mV/DIV) CH2 -OVER 6.061% TIME (10s/DIV) Figure 38. Compensated Load Drive The output response of the circuit is shown in Figure 38. Rev. B | Page 12 of 16 CH2 +OVER 5.051% 03718-B-038 Figure 36 shows the output of the AD8671 with a capacitive load of 1 nF. If heavier loads are to be used in low closed-loop gain or unity gain configurations, it is recommended to use external compensation as shown in the circuit in Figure 37. This technique reduces the overshoot and prevents the op amp from oscillation. The trade-off of this circuit is a reduction in output swing. However, a great added benefit stems from the fact that the input signal and the op amp's noise are filtered, and thus the overall output noise is kept to a minimum. VSY = 15V RL = 2k CL = 1nF CF = 220pF VIN = 100mV AV = +2 AD8671/AD8672/AD8674 ADC LOW NOISE OP AMP MIXER VGA AD8671 AD831 AD8671 DEMODULATOR LOW-PASS FILTER AD630 AD8610 AD10200 AD8369 03718-B-039 BAND-PASS FILTER CODE GENERATOR Figure 39. Simplified Block Diagram of a GPS Receiver GPS RECEIVER The band-pass response is shown in Figure 41. GPS receivers require low noise to minimize RF effects. The precision of the AD8671 makes it an excellent choice for such applications. Its very low noise and wide bandwidth make it suitable for band-pass and low-pass filters without the penalty of high power consumption. 200V/DIV VS = 15V Figure 39 shows a simplified block diagram of a GPS receiver. The next section details the design equations. Filters are useful in many applications; for example, band-pass filters are used in GPS systems, as discussed in the previous section. Figure 40 shows a second-order band-pass KRC filter. 100 1k 10k 100k R3 Figure 41. Band-Pass Response PLL SYNTHESIZERS AND LOOP FILTERS C2 C2 1nF Phase-lock loop filters are used in AM/FM modulation. 1nF R2 2.25k RB 18k RA 10k 03718-B-040 VEE Figure 40. Band-Pass KRC Filter The equal component topology yields a center frequency fo = 2 2RC and Q = Loop filters in PLL design require accuracy and care in their implementation. The AD8671/AD8672/AD8674 are ideal candidates for such filter design; the low offset voltage and low input bias current minimize the output error. In addition to the excellent dc specifications, the AD8671/AD8672/AD8674 have a unique performance at high frequencies; the high open-loop gain and wide bandwidth allow the user to design a filter with a high closed-loop gain if desirable. To optimize the filter design, it is recommended to use small value resistors to minimize the thermal noise. A simple example is shown in Figure 42. 2 4-K PHASE DETECTOR where: K =1+ R1 C1 10k VCC 1nF CHARGE PUMP RB RA VCO D VEE IN Figure 42. PLL Filter Simplified Block Diagram Rev. B | Page 13 of 16 03718-B-042 2.25k VIN 10M 1M Hz 2.25k VCC R1 03718-B-041 BAND-PASS FILTER AD8671/AD8672/AD8674 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4.00 (0.1574) 3.80 (0.1497) 1 4 6.20 (0.2440) 5.80 (0.2284) 1.27 (0.0500) BSC 0.50 (0.0196) x 45 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 0.25 (0.0098) 0.10 (0.0040) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 43. 8-Lead Standard Small Outline Package [SOIC] (R-8) Dimensions shown in millimeters and (inches) 3.00 BSC 8 5 4.90 BSC 3.00 BSC 4 PIN 1 0.65 BSC 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 8 0 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187AA Figure 44. 8-Lead Micro Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. B | Page 14 of 16 0.80 0.60 0.40 AD8671/AD8672/AD8674 8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496) 14 8 1 7 6.20 (0.2441) 5.80 (0.2283) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 0.50 (0.0197) x 45 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 45. 14-Lead Standard Small Outline Package [SOIC] (R-14) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 4.40 4.30 6.40 BSC 1 7 PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 0.20 0.09 SEATING COPLANARITY PLANE 0.10 8 0 COMPLIANT TO JEDEC STANDARDS MO-153AB-1 Figure 46. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. B | Page 15 of 16 0.75 0.60 0.45 AD8671/AD8672/AD8674 ORDERING GUIDE Model AD8671AR AD8671AR-REEL AD8671AR-REEL7 AD8671ARM-R2 AD8671ARM-REEL AD8672AR AD8672AR-REEL AD8672AR-REEL7 AD8672ARM-R2 AD8672ARM-REEL AD8674AR AD8674AR-REEL AD8674AR-REEL7 AD8674ARU AR8674ARU-REEL Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead MSOP 8-Lead MSOP 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead TSSOP 14-Lead TSSOP (c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03718-0-4/04(B) Rev. B | Page 16 of 16 Package Option R-8 R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 RM-8 RM-8 R-14 R-14 R-14 RU-14 RU-14 Branding BGA BGA BHA BHA