Precision, Very Low Noise, Low Input
Bias Current
Operational Amplifiers
AD8671/AD8672/AD8674
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
FEATURES
Very low noise: 2.8 nV/√Hz, 77 nV p-p
Wide bandwidth: 10 MHz
Low input bias current: 12 nA max
Low offset voltage: 75 µV max
High open-loop gain: 120 dB min
Low supply current: 3 mA per amplifier
Dual-supply operation: ±5 V to ±15 V
Unity gain stable
No phase reversal
APPLICATIONS
PLL filters
Filters for GPS
Instrumentation
Sensors and controls
Professional quality audio
GENERAL DESCRIPTION
The AD8671/AD8672/AD8674 are very high precision
amplifiers featuring very low noise, very low offset voltage and
drift, low input bias current, 10 MHz bandwidth, and low power
consumption. Outputs are stable with capacitive loads of over
1000 pF. Supply current is less than 3 mA per amplifier at 30 V.
The AD8671’s combination of ultralow noise, high precision,
speed, and stability is unmatched, while the MSOP version
requires only half the board space of comparable amplifiers.
Applications for these amplifiers include high quality PLL
filters, precision filters, medical and analytical instrumentation,
precision power supply controls, ATE, data acquisition, and
precision controls as well as professional quality audio.
The AD8671/AD8672/AD8674 are specified over the extended
industrial (–40°C to +125°C) temperature range.
The AD8671/AD8672 are available in the 8-lead SOIC and
8-lead MSOP packages. The AD8674 is available in 14-lead
SOIC and 14-lead TSSOP packages.
Surface-mount devices in MSOP packages are available in tape
and reel only.
PIN CONFIGURATIONS
NC = NO CONNECT
NC
1
–
IN
2
+
IN
3
V–
4
NC
V+
OUT
NC
8
7
6
5
03718-B-001
AD8671
TOP VIEW
(Not to Scale)
NC = NO CONNECT
NC
1
–
IN
2
+
IN
3
V–
4
NC
V+
OUT
NC
8
7
6
5
03718-B-002
AD8671
TOP VIEW
(Not to Scale)
Figure 1. 8-Lead SOIC (R Suffix)
Figure 2. 8-Lead MSOP (RM Suffix)
OUT A
1
–IN A
2
+IN A
3
V–
4
V+
OUT B
–IN B
+IN B
8
7
6
5
03718-B-003
AD8672
TOP VIEW
(Not to Scale)
OUT A
1
–IN A
2
+IN A
3
V–
4
V+
OUT B
–IN B
+IN B
8
7
6
5
03718-B-004
AD8672
TOP VIEW
(Not to Scale)
Figure 3. 8-Lead SOIC (R Suffix)
Figure 4. 8-Lead MSOP (RM Suffix)
OUT A
1
–IN A
2
+IN A
3
V+
4
+IN B
5
–IN B
6
OUT B
7
OUT D
–IN D
+IN D
V–
14
13
12
11
+IN C
–IN C
OUT C
10
9
8
03718-B-005
AD8674
TOP VIEW
(Not to Scale)
OUT A
1
–IN A
2
+IN A
3
V+
4
–IN B
5
+IN B
6
OUT B
7
OUT D
–IN D
+IN D
V–
14
13
12
11
+IN C
–IN C
OUT C
10
9
8
03718-B-006
AD8674
TOP VIEW
(Not to Scale)
Figure 5. 14-Lead SOIC (R Suffix)
Figure 6. 14-Lead TSSOP (RU Suffix)
AD8671/AD8672/AD8674
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Specifications..................................................................................... 3
Electrical Characteristics, ±5.0 V................................................ 3
Electrical Characteristics, ±15 V................................................. 4
Absolute Maximum Ratings............................................................ 5
Typical Performance Characteristics ............................................. 6
Applications..................................................................................... 11
Unity Gain Follower Applications............................................ 11
Output Phase Reversal............................................................... 11
Total Nois e v s . S ourc e Res i sta nce ............................................. 11
THD + Noise............................................................................... 12
Driving Capacitive Loads.......................................................... 12
GPS Receiver............................................................................... 13
Band-Pass Filter.......................................................................... 13
PLL Synthesizers and Loop Filters........................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide............................................................................... 16
REVISION HISTORY
4/04—Data Sheet Changed from Rev. A to Rev. B
Changes to Figure 32.................................................................. 11
Changes to Figures 36, 37, and 38............................................. 12
1/04—Data Sheet Changed from Rev. 0 to Rev. A
Added AD8672 and AD8674 parts ..............................Universal
Changes to Specifications............................................................ 3
Deleted Figure 3............................................................................ 6
Changes to Figures 7, 8, and 9..................................................... 6
Changes to Figure 37.................................................................. 12
Added new Figure 32 ................................................................. 10
AD8671/AD8672/AD8674
Rev. B | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS, ±5.0 V
Table 1. VS = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 20 75 µV
–40°C < TA < +125°C 30 125 µV
Offset Voltage Drift ∆VOS/∆T –40°C < TA < +125°C
AD8671 0.3 0.5 µV/°C
AD8672/AD8674 0.3 0.8 µV/°C
Input Bias Current IB –12 +3 +12 nA
+25°C < TA < +125°C –20 +5 +20 nA
–40°C < TA < +125°C –40 +8 +40 nA
Input Offset Current IOS –12 +6 +12 nA
+25°C < TA < +125°C –20 +6 +20 nA
–40°C < TA < +125°C –40 +8 +40 nA
Input Voltage Range –2.5 +2.5 V
Common-Mode Rejection Ratio CMRR VCM = –2.5 V to +2.5 V 100 120 dB
Large Signal Voltage Gain AVO RL = 2 kΩ, VO = –3 V to +3 V 1000 6000 V/mV
Input Capacitance, Common Mode CINCM 6.25 pF
Input Capacitance, Differential Mode CINDM 7.5 pF
Input Resistance, Common Mode RIN 3.5 GΩ
Input Resistance, Differential Mode RINDM 15 MΩ
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 2 kΩ, –40°C to +125°C +3.8 +4.0 V
Output Voltage Low VOL RL = 2 kΩ, –40°C to +125°C –3.9 –3.8 V
Output Voltage High VOH RL = 600 Ω +3.7 +3.9 V
Output Voltage Low VOL RL = 600 Ω –3.8 –3.7 V
Output Current IOUT ±10 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±4 V to ±18 V
AD8671/AD8672 110 130 dB
AD8674 106 115 dB
Supply Current/Amplifier ISY VO = 0 V 3 3.5 mA
–40°C <TA < +125°C 4.2 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 4 V/µs
Settling Time tSTo 0.1% (4 V Step, G = 1) 1.4 µs
To 0.01% (4 V Step, G = 1) 5.1 µs
Gain Bandwidth Product GBP 10 MHz
NOISE PERFORMANCE
Peak-to-Peak Noise en p-p 0.1 Hz to 10 Hz 77 100 nV p-p
Voltage Noise Density enf = 1 kHz 2.8 3.8 nV/√Hz
Current Noise Density inf = 1 kHz 0.3 pA/√Hz
Channel Separation
AD8672/AD8674 Cs f = 1 kHz –130 dB
f = 10 kHz –105 dB
AD8671/AD8672/AD8674
Rev. B | Page 4 of 16
ELECTRICAL CHARACTERISTICS, ±15 V
Table 2. VS = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 20 75 µV
–40°C < TA < +125°C 30 125 µV
Offset Voltage Drift ∆VOS/∆T –40°C < TA < +125°C
AD8671 0.3 0.5 µV/°C
AD8672/AD8674 0.3 0.8 µV/°C
Input Bias Current IB –12 +3 +12 nA
+25°C < TA < +125°C –20 +5 +20 nA
–40°C < TA < +125°C –40 +8 +40 nA
Input Offset Current IOS –12 +6 +12 nA
+25°C < TA < +125°C –20 +6 +20 nA
–40°C < TA < +125°C –40 +8 +40 nA
Input Voltage Range –12 +12 V
Common-Mode Rejection Ratio CMRR VCM = –12 V to +12 V 100 120 dB
Large Signal Voltage Gain AVO RL = 2 kΩ, VO = –10 V to +10 V 1000 6000 V/mV
Input Capacitance, Common Mode CINCM 6.25 pF
Input Capacitance, Differential Mode CINDM 7.5 pF
Input Resistance, Common Mode RIN 3.5 GΩ
Input Resistance, Differential Mode RINDM 15 MΩ
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 2 kΩ, –40°C to +125°C +13.2 +13.8 V
Output Voltage Low VOL RL = 2 kΩ, –40°C to +125°C –13.8 –13.2 V
Output Voltage High VOH RL = 600 Ω +11 +12.3 V
Output Voltage Low VOL RL = 600 Ω –12.4 –11 V
Output Current IOUT ±20 mA
Short Circuit Current ISC ±30 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±4 V to ±18 V
AD8671/AD8672 110 130 dB
AD8674 106 115 dB
Supply Current/Amplifier ISY VO = 0 V 3 3.5 mA
–40°C <TA < +125°C 4.2 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 4 V/µs
Settling Time tSTo 0.1% (10 V Step, G = 1) 2.2 µs
To 0.01% (10 V Step, G = 1) 6.3 µs
Gain Bandwidth Product GBP 10 MHz
NOISE PERFORMANCE
Peak-to-Peak Noise en p-p 0.1 Hz to 10 Hz 77 100 nV p-p
Voltage Noise Density enf = 1 kHz 2.8 3.8 nV/√Hz
Current Noise Density inf = 1 kHz 0.3 pA/√Hz
Channel Separation
AD8672/AD8674 Cs f = 1 kHz –130 dB
f = 10 kHz –105 dB
AD8671/AD8672/AD8674
Rev. B | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3. AD8671/AD8672/AD8674 Stress Ratings1
Parameter Rating
Supply Voltage 36 V
Input Voltage VS– to VS+
Differential Input Voltage ±0.7 V
Output Short-Circuit Duration Indefinite
Storage Temperature Range
All Packages –65°C to +150°C
Operating Temperature Range
All Packages –40°C to +125°C
Junction Temperature Range
All Packages –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
1 Absolute maximum ratings apply at 25°C, unless otherwise noted.
Table 4. Package Characteristics
Package Type θJA2θJC Unit
8-Lead MSOP (RM) 190 44 °C/W
8-Lead SOIC (R) 158 43 °C/W
14-Lead SOIC (R) 120 36 °C/W
14-Lead TSSOP (RU) 180 35 °C/W
2 θJA is specified for the worst-case conditions, i.e., θJA is specified for device
soldered in circuit board for surface-mount packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
AD8671/AD8672/AD8674
Rev. B | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
03718-B-007
FREQUENCY (Hz)
VOLTAGE NOISE DENSITY (nV/ Hz)
4
8
12
16
20
24
28
32
00 102030405060708090100
V
S
= ±15V
Figure 7. Voltage Noise Density vs. Frequency
03718-B-008
FREQUENCY (kHz)
VOLTAGE NOISE DENSITY (nV/ Hz)
0
4.5
9.0
13.5
18.0
22.5
27.0
31.5
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
V
S
= ±15V
Figure 8. Voltage Noise Density vs. Frequency
03718-B-009
FREQUENCY (kHz)
VOLTAGE NOISE DENSITY (nV/ Hz)
0110234567890
2.5
5.0
7.5
10.0
12.5
15.0
17.5
V
S
= ±15V
Figure 9. Voltage Noise Density vs. Frequency
0
5
10
15
20
25
30
35
40
45
–35
V
OS
(µV)
NUMBER OF AMPLIFIERS
–25 –5–15 0 45–30 –20 –10 5 10 15 20 25 30 35 40
03718-B-010
V
S
= ±5V
T
A
= 25°C
Figure 10. Input Offset Voltage Distribution
0
5
10
15
20
25
30
35
–35
VOS (µV)
NUMBER OF AMPL IF I ERS
–25 –5–15 0 50–30 –20 –10 5 10 15 20 25 30 35 40
03718-B-011
45
VS = ±15V
TA = 25°C
Figure 11. Input Offset Voltage Distribution
6
7
8
9
10
11
12
13
14
15
16
V
OS
(µV)
TEMPERATURE (°C)
–40 8525 125
03718-B-012
V
S
= ±15V
V
S
= ±5V
Figure 12. Input Offset Voltage vs. Temperature
AD8671/AD8672/AD8674
Rev. B | Page 7 of 16
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
IB (nA)
TEMPERATURE (°C)
–40 8525 125
+IB
–IB
03718-B-013
VS=±5V
Figure 13. Input Bias Current vs. Temperature
–1.0
–0.5
0
0.5
1.0
1.5
2.0
2.5
I
B
(nA)
TEMPERATURE (°C)
–40 8525 125
+I
B
–I
B
03718-B-014
V
S
= ±15V
Figure 14. Input Bias Current vs. Temperature
2.4
2.6
2.8
3.0
3.2
3.4
I
SY
(mA)
3.6
3.8
4.0
TEMPERATURE (°C)
–40 8525 125
V
S
= ±15V
V
S
=±5V
03718-B-015
Figure 15. Supply Current vs. Temperature
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
–40 8525 125
R
L
= 600
Ω
R
L
= 2k
Ω
03718-B-016
V
S
= ±15V
Figure 16. Output Voltage High vs. Temperature
–14.5
–14.0
–13.5
–13.0
–12.5
–12.0
–11.5
–11.0
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
–40 8525 125
R
L
= 600
Ω
R
L
= 2k
Ω
03718-B-017
V
S
= ±15V
Figure 17. Output Voltage Low vs. Temperature
FREQUENCY (Hz)
OPEN-LOOP GAIN (dB)
–10
0
10
100k
03718-B-018
10M
1M
–40
–30
–20
20
30
40
50 V
SY
= ±15V
R
L
= 10kΩ
C
L
= 20pF
Φ
M
= 59°
GAIN
PHASE
OPEN-LOOP PHASE (dB)
–45
45
–180
–135
–90
90
135
180
225
0
60 270
Figure 18. Open-Loop Gain and Phase Shift vs. Frequency
AD8671/AD8672/AD8674
Rev. B | Page 8 of 16
0
5000
10000
15000
20000
25000
30000
A
VO
(V/mV)
TEMPERATURE (°C)
–40 8525 125
±5V
±15V
03718-B-019
Figure 19. Open-Loop Gain vs. Temperature
FREQUENCY (Hz)
1k 1M
CLOSED-LOOP GAIN (dB)
–10
0
10
20
40
50
100k10k 10M
03718-B-020
30
–20
–30
–40
–50 100M
AV = 100
AV = 10
AV = 1
VSY = ±15V
VIN = 10mV
RL = ∞
CL = 20pF
Figure 20. Closed-Loop Gain vs. Frequency
FREQUENCY (Hz)
1k 10M
IM PE DANCE (Ω)
40
50
60
70
90
100
100k10k 100M
03718-B-021
80
30
20
10
0
A
VO
= 100
100
A
VO
= 10
A
VO
= 1
1M
Figure 21. Output Impedance vs. Frequency
V
SY
= ±15V
V
IN
= 4V
R
L
= 2kΩ
03718-B-022
VOLTAGE (1V/DIV)
TIME (100µs/DIV)
Figure 22. Large Signal Transient Response
VSY = ±15V
VIN = 200mV p-p
RL = 2kΩ
03718-B-023
VOLTAGE (50mV/DIV)
TIME (10µs/DIV)
Figure 23. Small Signal Transient Response
CAPACITANCE (pF)
1k
SMALL SIGNAL OVERSHOOT (%)
+OS
0
10
20
30
40
50
60
100 10k
–OS
03718-B-024
V
S
=±15
Figure 24. Small Signal Overshoot vs. Load Capacitance
AD8671/AD8672/AD8674
Rev. B | Page 9 of 16
V
IN
V
OUT
0V
V
S
= ±15V
V
IN
= 200mV p-p
A
V
= –100
R
L
= 10kΩ
0V
03718-B-025
VOLTAGE (200mV/DIV)
TIME (4µs/DIV)
Figure 25. Positive Overdrive Recovery
V
IN
V
OUT
V
SY
= ±15V
V
IN
= 200mV p-p
A
V
= –100
R
L
= 10kΩ
0V
0V
03718-B-026
VOLTAGE (200mV/DIV)
TIME (4µs/DIV)
Figure 26. Negative Overdrive Recovery
FREQUENCY (Hz)
1k 1M
CMRR (d B)
40
60
80
100
140
160
100k10k 10M
03718-B-027
120
20
0
–20
–40 100M
V
SY
= ±15V
100
10
Figure 27. CMRR vs. Frequency
FREQUENCY (Hz)
1k 1M
PSRR (dB)
40
60
80
100
140
160
100k10k 10M
03718-B-028
120
20
0
–20
–40
V
SY
= ±15V
100
–PSRR
+PSRR
10
Figure 28. PSRR vs. Frequency
127
128
129
130
131
132
PSRR (dB)
133
134
135
TEMPERATURE (°C)
–40 8525 125
03718-B-029
V
S
= ±2.5V TO ±18V
Figure 29. PSRR vs. Temperature
03718-B-030
VS = ±15V
TIME (1µs/DIV)
VOLTAGE NOISE (50nV/DIV)
Figure 30. 0.1 Hz to 10 Hz Input Voltage Noise
AD8671/AD8672/AD8674
Rev. B | Page 10 of 16
FREQUENCY (Hz)
CHANNEL SEPARATION (dB)
100
–120
–40
–20
0
1k 10k 100k 1M
–60
–140
–80
–100
10M 100M
03718-B-031
V
S
= ±15V, ±5V
Figure 31. Channel Separation
AD8671/AD8672/AD8674
Rev. B | Page 11 of 16
APPLICATIONS
UNITY GAIN FOLLOWER APPLICATIONS
When large transient pulses (>1 V) are applied at the positive
terminal of amplifiers (such as the OP27, LT1007, OPA227, and
AD8671) with back-to-back diodes at the input stage, the use of
a resistor in the feedback loop is recommended to avoid having
the amplifier load the signal generator. The feedback resistor, RF,
should be at least 500 Ω. However, if large values must be used
for RF, a small capacitor, CF, should be inserted in parallel with
RF to compensate for the pole introduced by the input
capacitance and RF.
Figure 32 shows the uncompensated output response with a
10 kΩ resistor in the feedback and the compensated response
with CF = 15 pF.
03718-B-032
REF1 +OVER
23.23%
CH2 +O V E R
7.885%
VOLTAGE (1V/DIV)
OUTPUT UNCOMPENSATED
OUTPUT
COMPENSATED
TIME (100ns/DIV)
Figure 32. Transient Output Response
OUTPUT PHASE REVERSAL
Phase reversal is a change of polarity in the amplifier transfer
function that occurs when the input voltage exceeds the supply
voltage. The AD8671/AD8672/AD8674 do not exhibit phase
reversal even when the input voltage is 1 V beyond the supplies.
V
SY
= ±15V
V
IN
V
OUT
03718-B-033
TIME (10µs/DIV)
VOLTAGE (1V/DIV)
Figure 33. Output Phase Reversal
TOTAL NOISE VS. SOURCE RESISTANCE
The low input voltage noise of the AD8671 makes it a great
choice for applications with low source resistance. However,
because the AD8671 has low input current noise, it can also be
used in circuits with substantial source resistance.
Figure 34 shows the voltage noise, current noise, thermal noise,
and total rms noise of the AD8671 as a function of the source
resistance.
For RS < 475 Ω, the input voltage noise, en, dominates.
For 475 Ω < RS < 412 kΩ, thermal noise dominates.
For RS > 412 kΩ, the input current noise dominates.
10 1k
TOTAL NOISE (nV/ Hz)
1
10
100
1000
100 10k
03718-B-034
100k 1M
e
n_t
C
AB
e
n
i
n
(4kR
S
T)
1/2
SOURCE RE S IST ANCE (Ω)
Figure 34. Noise vs. Source Resistance
AD8671/AD8672/AD8674
Rev. B | Page 12 of 16
THD + NOISE
The AD8671/AD8672/AD8674 exhibit low total harmonic
distortion over the entire audio frequency range. This makes
them suitable for applications with high closed-loop gains,
including audio applications. Figure 35 shows approximately
0.0006% of THD + N in a positive unity gain, the worst-case
configuration for distortion.
Hz
100 1k 10k
PERCENTAGE
LT1007
0.0001
0.0002
0.0005
0.0010
0.0020
0.0050
0.0100
0.0200
0.0500
0.1000
5020 500200 5k
2k
AD8671
20k
03718-B-035
V
S
= ±5V
V
IN
= 2.5V
R
L
= 600Ω
Figure 35. Total Harmonic Noise and Distortion
DRIVING CAPACITIVE LOADS
The AD8671/AD8672/AD8674 can drive large capacitive loads
without causing instability. However, when configured in unity
gain, driving very large loads can cause unwanted ringing or
instability.
Figure 36 shows the output of the AD8671 with a capacitive
load of 1 nF. If heavier loads are to be used in low closed-loop
gain or unity gain configurations, it is recommended to use
external compensation as shown in the circuit in Figure 37. This
technique reduces the overshoot and prevents the op amp from
oscillation. The trade-off of this circuit is a reduction in output
swing. However, a great added benefit stems from the fact that
the input signal and the op amp’s noise are filtered, and thus the
overall output noise is kept to a minimum.
The output response of the circuit is shown in Figure 38.
03718-B-036
V
SY
= ±15V
R
L
= 2kΩ
C
L
= 1nF
V
IN
= 100mV
A
V
= +1 CH2 +OVER
39.80%
CH2 –OVER
39.80%
TIME (10µs/DIV)
VOLTAGE (500mV/DIV)
Figure 36. Capacitive Load Drive
500Ω
R
F
V
CC
220pF
C
F
V
IN
V
EE
R
G
500Ω
10Ω
R
S
1nF
C
L
03718-B-037
2kΩ
R
L
Figure 37. Recommended Capacitive Load Circuit
03718-B-038
V
SY
= ±15V
R
L
= 2kΩ
C
L
= 1nF
C
F
= 220p F
V
IN
= 100mV
A
V
= +2 CH2 +OVER
5.051%
CH2 –OVER
6.061%
TIME (10µs/DIV)
VO LTAGE (100mV/DIV)
Figure 38. Compensated Load Drive
AD8671/AD8672/AD8674
Rev. B | Page 13 of 16
AD8671
BAND-PASS FILTER
LOW NOISE OP AMP MIXER DEMODULATOR LOW-PASS FILTER VGA
ADC
AD10200
AD831
AD8671
AD630 AD8610 AD8369
CODE GENERATOR
03718-B-039
Figure 39. Simplified Block Diagram of a GPS Receiver
GPS RECEIVER
GPS receivers require low noise to minimize RF effects. The
precision of the AD8671 makes it an excellent choice for such
applications. Its very low noise and wide bandwidth make it
suitable for band-pass and low-pass filters without the penalty
of high power consumption.
Figure 39 shows a simplified block diagram of a GPS receiver.
The next section details the design equations.
BAND-PASS FILTER
Filters are useful in many applications; for example, band-pass
filters are used in GPS systems, as discussed in the previous
section. Figure 40 shows a second-order band-pass KRC filter.
18kΩ
10kΩ
2.25kΩ
R3
R
B
R
A
V
CC
V
EE
2.25kΩ
R2
2.25kΩ
R1
1nF
C2
V
IN
1nF
C2
03718-B-040
Figure 40. Band-Pass KRC Filter
The equal component topology yields a center frequency
RC
fo π
=2
2
and K
Q−
=4
2
where:
A
B
R
R
K+= 1
The band-pass response is shown in Figure 41.
Hz
100k1k100 10k 1M
03718-B-041
10M
V
S
= ±15V
200µV/DIV
Figure 41. Band-Pass Response
PLL SYNTHESIZERS AND LOOP FILTERS
Phase-lock loop filters are used in AM/FM modulation.
Loop filters in PLL design require accuracy and care in their
implementation. The AD8671/AD8672/AD8674 are ideal
candidates for such filter design; the low offset voltage and low
input bias current minimize the output error. In addition to the
excellent dc specifications, the AD8671/AD8672/AD8674 have
a unique performance at high frequencies; the high open-loop
gain and wide bandwidth allow the user to design a filter with a
high closed-loop gain if desirable. To optimize the filter design,
it is recommended to use small value resistors to minimize the
thermal noise. A simple example is shown in Figure 42.
10kΩ
R1
V
CC
V
EE
1nF
03718-B-042
VCO
C1
CHARGE
PUMP
PHASE
DETECTOR
IN
D
Figure 42. PLL Filter Simplified Block Diagram
AD8671/AD8672/AD8674
Rev. B | Page 14 of 16
OUTLINE DIMENSIONS
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)× 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
41
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARIT
Y
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
Figure 43. 8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters and (inches)
0.80
0.60
0.40
8°
0°
4
85
4.90
BSC
PIN 1 0.65 BSC
3.00
BSC
SEATING
PLANE
0.15
0.00
0.38
0.22
1.10 MAX
3.00
BSC
COPLANARITY
0.10
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 44. 8-Lead Micro Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
AD8671/AD8672/AD8674
Rev. B | Page 15 of 16
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COPLANARITY
0.10
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
8°
0°
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AB
× 45°
Figure 45. 14-Lead Standard Small Outline Package [SOIC]
(R-14)
Dimensions shown in millimeters and (inches)
4.50
4.40
4.30
14 8
71
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65
BSC
SEATING
PLANE
0.15
0.05 0.30
0.19
1.20
MAX
1.05
1.00
0.80 0.20
0.09 8°
0°
0.75
0.60
0.45
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 46. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
AD8671/AD8672/AD8674
Rev. B | Page 16 of 16
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8671AR –40°C to +125°C 8-Lead SOIC R-8
AD8671AR-REEL –40°C to +125°C 8-Lead SOIC R-8
AD8671AR-REEL7 –40°C to +125°C 8-Lead SOIC R-8
AD8671ARM-R2 –40°C to +125°C 8-Lead MSOP RM-8 BGA
AD8671ARM-REEL –40°C to +125°C 8-Lead MSOP RM-8 BGA
AD8672AR –40°C to +125°C 8-Lead SOIC R-8
AD8672AR-REEL –40°C to +125°C 8-Lead SOIC R-8
AD8672AR-REEL7 –40°C to +125°C 8-Lead SOIC R-8
AD8672ARM-R2 –40°C to +125°C 8-Lead MSOP RM-8 BHA
AD8672ARM-REEL –40°C to +125°C 8-Lead MSOP RM-8 BHA
AD8674AR –40°C to +125°C 14-Lead SOIC R-14
AD8674AR-REEL –40°C to +125°C 14-Lead SOIC R-14
AD8674AR-REEL7 –40°C to +125°C 14-Lead SOIC R-14
AD8674ARU –40°C to +125°C 14-Lead TSSOP RU-14
AR8674ARU-REEL –40°C to +125°C 14-Lead TSSOP RU-14
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D03718–0–4/04(B)
