COUT
0.1 µF
LM3480IM3-5.0
3
2 1 5 V, 100 mA OUT6.5 V IN
CIN
0.1 µF
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LM3480
SNVS011H JUNE 1999REVISED SEPTEMBER 2015
LM3480 100-mA, SOT-23, Quasi Low-Dropout Linear Voltage Regulator
1 Features 3 Description
The LM3480 is an integrated linear voltage regulator.
1 Input Voltage Range: up to 30 V It features operation from an input as high as 30 V
3.3-V, 5-V, 12-V, and 15-V Versions Available and an ensured maximum dropout of 1.2 V at the full
Packaged in the Tiny 3-Lead SOT-23 Package 100-mA load. Standard packaging for the LM3480 is
the 3-lead SOT-23 package.
30-V Maximum Input for Operation
1.2-V Ensured Maximum Dropout Over Full Load The 5-V, 12-V, and 15-V members of the LM3480
and Temperature Ranges series are intended as tiny alternatives to industry
standard LM78Lxx series and similar devices. The
100-mA Ensured Minimum Load Current 1.2-V quasi-low dropout of LM3480 series devices
±5% Ensured Output Voltage Tolerance Over Full makes them a nice fit in many applications where the
Load and Temperature Ranges 2-V to 2.5-V dropout of LM78Lxx series devices
40 to +125°C Junction Temperature Range for precludes their (LM78Lxx series devices) use.
Operation The LM3480 series also features a 3.3-V member.
The SOT-23 packaging and quasi-low dropout
2 Applications features of the LM3480 series converge in this device
to provide a very nice, very tiny, 3.3-V, 100-mA bias
Tiny Alternative to LM78Lxx Series and Similar supply that regulates directly off the system 5-V ±5%
Devices power supply.
Tiny 5-V ±5% to 3.3-V, 100-mA Converter
Post Regulator for Switching DC/DC Converter Device Information(1)
Bias Supply for Analog Circuits PART NUMBER PACKAGE BODY SIZE (NOM)
LM3480 SOT-23 (3) 2.92 mm × 1.30 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
space
space
space
Typical Application Circuit
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM3480
SNVS011H JUNE 1999REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
7.3 Feature Description................................................. 10
1 Features.................................................................. 17.4 Device Functional Modes........................................ 10
2 Applications ........................................................... 18 Application and Implementation ........................ 11
3 Description............................................................. 18.1 Application Information............................................ 11
4 Revision History..................................................... 28.2 Typical Application ................................................. 11
5 Pin Configuration and Functions......................... 39 Power Supply Recommendations...................... 13
6 Specifications......................................................... 410 Layout................................................................... 13
6.1 Absolute Maximum Ratings ...................................... 410.1 Layout Guidelines ................................................. 13
6.2 ESD Ratings.............................................................. 410.2 Layout Example .................................................... 13
6.3 Recommended Operating Conditions....................... 411 Device and Documentation Support................. 14
6.4 Thermal Information.................................................. 411.1 Community Resources.......................................... 14
6.5 Electrical Characteristics: LM3480-3.3, LM3480-5... 511.2 Trademarks........................................................... 14
6.6 Electrical Characteristics: LM3480-12, LM3480-15.. 611.3 Electrostatic Discharge Caution............................ 14
6.7 Typical Characteristics.............................................. 711.4 Glossary................................................................ 14
7 Detailed Description............................................ 10 12 Mechanical, Packaging, and Orderable
7.1 Overview................................................................. 10 Information........................................................... 14
7.2 Functional Block Diagram....................................... 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (February 2015) to Revision H Page
Replaced Functional Block Diagram .................................................................................................................................... 10
Changed text of External Capacitors subsection ................................................................................................................ 11
Changed text of Output Capacitor subsection ..................................................................................................................... 11
Changes from Revision F (December 2014) to Revision G Page
Changed pin numbers indicated in Typical Application drawing; fix typos............................................................................. 1
Deleted soldering specs - found in POA ................................................................................................................................ 4
Changed Handling Ratings to ESD Ratings format ............................................................................................................... 4
Changes from Revision E (March 2013) to Revision F Page
Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device
Functional Modes,Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section; add updated Thermal Information............................................................................................................................. 1
Changes from Revision D (March 2013) to Revision E Page
Changed layout of National Data Sheet to TI format ............................................................................................................. 9
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5 Pin Configuration and Functions
DBZ Package
3-Pin SOT-23
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
OUT 1 O Output voltage
IN 2 I Input voltage supply
GND 3 Common ground
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6 Specifications
6.1 Absolute Maximum Ratings(1)(2)
MIN MAX UNIT
Input voltage (IN to GND) –0.3 35 V
Power dissipation(3) Internally
Limited
Junction temperature(3) –40 150 °C
Storage temperature, Tstg 65 150 °C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are
conditions under which operation of the device is ensured. Recommended operating ratings do not imply ensured performance limits.
For ensured performance limits and associated test conditions, see the Electrical Characteristics: LM3480-3.3, LM3480-5.
(2) If Military- or Aerospace-specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using P = (TJ TA) / RθJA where
TJis the junction temperature, TAis the ambient temperature, and RθJA is the junction-to-ambient thermal resistance. The 370-mW
rating results from substituting the Absolute Maximum junction temperature, 150°C for TJ, 50°C for TA, and 269.6°C/W for RθJA. More
power can be safely dissipated at lower ambient temperatures. Less power can be safely dissipated at higher ambient temperatures.
The Absolute Maximum power dissipation can be increased by 3.7 mW for each °C below 50°C ambient. It must be derated by 3.7 mW
for each °C above 50°C ambient. Heat sinking enables the safe dissipation of more power. The LM3480 actively limits its junction
temperature to about 150°C.
6.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
Electrostatic
V(ESD) V
discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Maximum input voltage (IN to GND) 0 30 V
Junction temperature (TJ) –40 125 °C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are
conditions under which operation of the device is ensured. Recommended operating ratings do not imply ensured performance limits.
For ensured performance limits and associated test conditions, see the Electrical Characteristics: LM3480-3.3, LM3480-5.
6.4 Thermal Information LM3480
THERMAL METRIC(1) SOT-23 (DBZ) UNIT
3 PINS
RθJA Junction-to-ambient thermal resistance 269.6
RθJC(top) Junction-to-case (top) thermal resistance 141.1
RθJB Junction-to-board thermal resistance 63.1 °C/W
ψJT Junction-to-top characterization parameter 24.2
ψJB Junction-to-board characterization parameter 62.1
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics: LM3480-3.3, LM3480-5
Typical and other limits apply for TA= TJ= 25°C, unless otherwise specified. Nominal output voltage (VNOM) = 3.3 V or 5
V.(1)(2)(3)
VNOM = 3.3 V VNOM = 5 V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
VIN = VNOM + 1.5 V 3.17 3.3 3.43 4.8 5 5.2
1 mA IOUT 100 mA
VOUT Output voltage V
VIN = VNOM + 1.5 V
1 mA IOUT 100 mA 3.14 3.46 4.75 5.25
40°C TJ125°C
VNOM + 1.5 V VIN 30 V 10 12
IOUT = 1 mA
ΔVOUT Line regulation mV
VNOM + 1.5 V VIN 30 V
IOUT = 1 mA 25 25
40°C TJ125°C
VIN = VNOM + 1.5 V 20 20
10 mA IOUT 100 mA
ΔVOUT Load regulation mV
VIN = VNOM + 1.5 V
10 mA IOUT 100 m 40 40
40°C TJ125°C
VNOM + 1.5 V VIN 30 V 2 2
No Load
IGND Ground pin current mA
VNOM + 1.5 V VIN 30 V
No Load, 4 4
40°C TJ125°C
IOUT = 10 mA 0.7 0.9 0.7 0.9 V
IOUT = 10 mA 1 1
40°C TJ125°C
VIN -Dropoutvoltage
VOUT IOUT = 100 mA 0.9 1.1 0.9 1.1 V
IOUT = 100 mA 1.2 1.2
40°C TJ125°C
VIN = 10 V
enOutput noise voltage 100 150 µVrms
Bandwidth: 10 Hz to 100 kHz
(1) A typical is the center of characterization data taken with TA= TJ= 25°C. Typicals are not ensured.
(2) All limits are ensured. All electrical characteristics having room-temperature limits are tested during production with TA= TJ= 25°C. All
hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical
process control.
(3) All voltages except dropout are with respect to the voltage at the GND pin.
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6.6 Electrical Characteristics: LM3480-12, LM3480-15
Typical and other limits apply for TA= TJ= 25°C, unless otherwise specified. Nominal output voltage (VNOM) = 12 V or 15
V.(1)(2)(3)
VNOM = 12 V VNOM = 15 V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
VIN = VNOM + 1.5 V 11.52 12 12.48 14.4 15 15.6
1 mA IOUT 100 mA
VOUT Output voltage V
VIN = VNOM + 1.5 V
1 mA IOUT 100 mA 11.4 12.6 14.25 15.75
40°C TJ125°C
VNOM + 1.5 V VIN 30 V 14 16
IOUT = 1 mA
ΔVOUT Line regulation mV
VNOM + 1.5 V VIN 30 V
IOUT = 1 mA 40 40
40°C TJ125°C
VIN = VNOM + 1.5 V 36 45
10 mA IOUT 100 mA
ΔVOUT Load regulation mV
VIN = VNOM + 1.5 V
10 mA IOUT 100 mA 60 75
40°C TJ125°C
VNOM + 1.5 V VIN 30 V 2 2
No Load
IGND Ground pin current mA
VNOM + 1.5 V VIN 30 V 4 4
No Load, 40°C TJ125°C
IOUT = 10 mA 0.7 0.9 0.7 0.9 V
IOUT = 10 mA, 1 1
40°C TJ125°C
VIN -Dropout voltage
VOUT IOUT = 100 mA 0.9 1.1 0.9 1.1 V
IOUT = 100 mA , 1.2 1.2
40°C TJ125°C
VIN = 10 V
enOutput noise voltage 360 450 µVrms
Bandwidth: 10 Hz to 100 kHz
(1) A typical is the center of characterization data taken with TA= TJ= 25°C. Typicals are not ensured.
(2) All limits are ensured. All electrical characteristics having room-temperature limits are tested during production with TA= TJ= 25°C. All
hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical
process control.
(3) All voltages except dropout are with respect to the voltage at the GND pin.
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6.7 Typical Characteristics
Unless indicated otherwise, VIN = VNOM + 1.5 V, CIN = 0.1 µF, COUT = 0.1 µF, and TA .= 25°C.
Figure 1. Dropout Voltage vs Load Current Figure 2. Dropout Voltage vs Junction Temperature
Figure 3. Ground Pin Current vs Input Voltage Figure 4. Ground Pin Current vs Input Voltage
Figure 5. Ground Pin Current vs Load Current Figure 6. Ground Pin Current vs Junction Temperature
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Typical Characteristics (continued)
Unless indicated otherwise, VIN = VNOM + 1.5 V, CIN = 0.1 µF, COUT = 0.1 µF, and TA .= 25°C.
Figure 7. Input Current vs Input Voltage Figure 8. Input Current vs Input Voltage
Figure 9. Output Voltage vs Input Voltage Figure 10. Output Voltage vs Input Voltage
Figure 11. Output Voltage vs Input Voltage Figure 12. Output Voltage vs Input Voltage
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Typical Characteristics (continued)
Unless indicated otherwise, VIN = VNOM + 1.5 V, CIN = 0.1 µF, COUT = 0.1 µF, and TA .= 25°C.
Figure 13. Output Short-Circuit Current Figure 14. Output Short-Circuit Current
Figure 15. Power Supply Rejection Ratio Figure 16. Power Supply Rejection Ratio
Figure 17. DC Load Regulation
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+
Current
Limit
IN OUT
GND
LM3480
PNP
Bandgap
Reference
Thermal
Shutdown NPN
LM3480
SNVS011H JUNE 1999REVISED SEPTEMBER 2015
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7 Detailed Description
7.1 Overview
The LM3480 is an integrated linear voltage regulator with inputs that can be as high as 30 V. It ensures a
maximum dropout of 1.2 V at the full load of 100 mA. The LM3480 has different output options including 3.3-V, 5-
V, 12-V, and 15-V outputs, making LM3480 the tiny alternative to industry standard LM78Lxx series and similar
devices.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 3.3-V, 5-V, 12-V, and 15-V Versions Available
The 3.3-V, 5-V, 12-V, and 15-V versions of LM3480 series are intended as tiny alternatives to industry standard
LM78Lxx series and similar devices.
7.3.2 1.2-V Ensured Maximum Dropout
The 1.2-V quasi-low dropout of the LM3480 series devices make them a nice fit in many application where the 2-
V to 2.5-V dropout of LM78Lxx series devices precludes their use.
7.4 Device Functional Modes
7.4.1 Operation with VIN =5V
The 3.3-V member of LM3480 can operate with an input of 5 V ±5%, its tiny SOT-23 package and quasi-low
dropout makes it suitable for providing a very tiny, 3.3-V, 100-mA bias supply from 5-V power supply.
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COUT
0.1 µF
LM3480IM3-5.0
3
2 1 5 V, 100 mA OUT6.5 V IN
CIN
0.1 µF
LM3480
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SNVS011H JUNE 1999REVISED SEPTEMBER 2015
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM3480 is a linear voltage regulator with 1.2-V ensured maximum dropout and 100-mA ensured minimum
load current. This device has 3.3-V, 5-V, 12-V, and 15-V versions. The implementation of LM3480 is discussed in
this section.
8.2 Typical Application
8.2.1 Design Requirements
DESIGN PARAMETER EXAMPLE VALUE
Input voltage 6.5 V
Output voltage 5 V
Output current 100 mA
8.2.2 Detailed Design Procedure
8.2.2.1 External Capacitors
A minimum input and output capacitance value of 0.1 µF is required for stability and adequate transient
performance. There is no specific ESR limitation, although excessively high ESR will compromise transient
performance. There is no specific limitation on a maximum capacitance value on the input or the output.
8.2.2.1.1 Output Capacitor
The minimum output capacitance required to maintain stability is 0.1 µF. Larger values of output capacitance can
be used to improve transient behavior.
8.2.3 Application Curves
Unless indicated otherwise, VIN = 6.5 V, VOUT =5V,COUT = 0.1 µF, and TA= 25°C
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Figure 18. Line Transient Response Figure 19. Line Transient Response
Figure 20. Load Transient Response Figure 21. Load Transient Response
Figure 22. Load Transient Response Figure 23. Load Transient Response
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VOUT
VIN
GND
IN
GND
OUT
2 1
3
LM3480
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SNVS011H JUNE 1999REVISED SEPTEMBER 2015
9 Power Supply Recommendations
The LM3480 is designed to operated from up to a 30-V input voltage supply. This input supply must be well
regulated. If the input supply is noisy, additional input capacitors with low ESR can help to improve the output
noise performance.
10 Layout
10.1 Layout Guidelines
For best overall performance, place all the circuit components on the same side of the circuit board and as near
as practical to the respective LDO pin connections. Place ground return connections to the input and output
capacitors, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side,
copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and
negatively affects system performance. This grounding and layout scheme minimizes the inductive parasitic, and
thereby reduces load-current transients, minimizes noise, and increases circuit stability.
A ground reference plane is also recommended and is either embedded in the PCB itself or located on the
bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output
voltage, shield noise, and behaves similar to a thermal plane to spread heat from the LDO device. In most
applications, this ground plane is necessary to meet thermal requirements.
10.2 Layout Example
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM3480IM3-12 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3-12/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3-15/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3-3.3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3-3.3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3-5.0 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3-5.0/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3X-12/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3X-15/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3X-3.3 SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3X-3.3/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM3480IM3X-5.0/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3480IM3-12 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM3480IM3-12/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM3480IM3-15/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM3480IM3-3.3 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM3480IM3-3.3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM3480IM3-5.0 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM3480IM3-5.0/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM3480IM3X-12/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM3480IM3X-15/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM3480IM3X-3.3 SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM3480IM3X-3.3/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM3480IM3X-5.0/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 2
4203227/C
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PACKAGE OUTLINE
C
TYP
0.20
0.08
0.25
2.64
2.10 1.12 MAX
TYP
0.10
0.01
3X 0.5
0.3
TYP
0.6
0.2
1.9
0.95
TYP-80
A
3.04
2.80
B
1.4
1.2
(0.95)
SOT-23 - 1.12 mm max heightDBZ0003A
SMALL OUTLINE TRANSISTOR
4214838/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
0.2 C A B
1
3
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
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EXAMPLE BOARD LAYOUT
0.07 MAX
ALL AROUND 0.07 MIN
ALL AROUND
3X (1.3)
3X (0.6)
(2.1)
2X (0.95)
(R0.05) TYP
4214838/C 04/2017
SOT-23 - 1.12 mm max heightDBZ0003A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
SCALE:15X
PKG
1
3
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
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EXAMPLE STENCIL DESIGN
(2.1)
2X(0.95)
3X (1.3)
3X (0.6)
(R0.05) TYP
SOT-23 - 1.12 mm max heightDBZ0003A
SMALL OUTLINE TRANSISTOR
4214838/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
SYMM
PKG
1
3
2
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
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