1
100MHz Differential Twisted-Pair Drivers
EL5170, EL5370
The EL5170 and EL5370 are single and triple high bandwidth
amplifiers with a fixed gain of 2. They are primarily targeted for
applications such as driving twisted-pair lines in component video
applications. The inputs signal can be in either single-ended or
differential form but the outputs are always in differential form.
The output common mode level for each channel is set by the
associated VREF pin, which have a -3dB bandwidth of over
70MHz. Generally, these pins are grounded but can be tied to
any voltage reference.
All outputs are short circuit protected to withstand temporary
overload condition.
The EL5170 and EL5370 are specified for operation over the
full -40°C to +85°C temperature range.
Features
• Fully differential inputs and outputs
• Differential input range ±2.3V typ.
• 100MHz 3dB bandwidth at fixed gain of 2
• 1100V/µs slew rate
• Single 5V or dual ±5V supplies
• 50mA maximum output current
• Low power - 7.4mA per channel
• Pb-free available (RoHS compliant)
Applications
•Twisted-pair drivers
• Differential line drivers
• VGA over twisted-pairs
• ADSL/HDSL drivers
• Single ended to differential amplification
• Transmission of analog signals in a noisy environment
Pinouts
EL5170
(8 LD SOIC, MSOP)
TOP VIEW
EL5370
(24 LD QSOP)
TOP VIEW
1
2
3
4
8
7
6
5
-
+
IN+
EN
IN-
REF
OUT+
VS-
VS+
OUT-
1
2
3
4
16
15
14
13
5
6
7
12
11
9
8
10
20
19
18
17
24
23
22
21
-
+
EN
INP1
INN1
REF1
NC
INP2
INN2
REF2
NC
INP3
INN3
REF3
OUT1
OUT1B
NC
VSP
VSN
NC
OUT2
OUT2B
NC
OUT3
OUT3B
NC
-
+
-
+
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2002-2004, 2006, 2007, 2010, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
August 28, 2012
FN7309.9
EL5170, EL5370
2FN7309.9
August 28, 2012
Pin Descriptions
EL5170 EL5370 PIN NAME PIN FUNCTION
1 IN+ Non-inverting input
21 EN
Enable
3IN-Inverting input
4 REF Reference input, sets common-mode output voltage
5 OUT- Inverting output
6 VS+ Positive supply
7VS-Negative supply
8 OUT+ Non-inverting output
2, 6, 10 INP1, INP2, INP3 Non-inverting inputs
3, 7, 11 INN1, INN2, INN3 Inverting inputs
4, 8, 12 REF1, REF2, REF3 Reference input, sets common-mode output voltage
14, 17, 23 OUT3B, OUT2B, OUT1B Inverting outputs
21 VSP Positive supply
20 VSN Negative supply
15,
18, 24
OUT3, OUT2, OUT1 Non-inverting outputs
5, 9, 13, 16, 19, 22 NC No connects; grounded for best crosstalk performance
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
EL5170ISZ 5170ISZ 5170ISZ 8 Ld SOIC (150 mil) M8.15E
EL5170IYZ BAAVA BAAVA 8 Ld MSOP (3.0mm) M8.118A
EL5370IUZ EL5370IUZ EL5370IUZ 24 Ld QSOP (150 mil) MDP0040
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for EL5170, EL5370. For more information on MSL please see tech brief
TB363.
EL5170, EL5370
3FN7309.9
August 28, 2012
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for inf ormation purposes only. Unless otherwise not ed, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Absolute Maximum Ratings (TA = +25°C) Thermal Information
Supply Voltage (VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6V
Supply Voltage Rate-of-rise (dV/dT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
Input Voltage (IN+, IN- to VS+, VS-) . . . . . . . . . . . . . VS- - 0.3V to VS+ + 0.3V
Differential Input Voltage (IN+ to IN-). . . . . . . . . . . . . . . . . . . . . . . . . . ±4.8V
Maximum Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135°C
Recommended Operating Temperature . . . . . . . . . . . . . . . -40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
Electrical Specifications VS+ = +5V, VS- = -5V, TA = +25°C, VIN = 0V, AV = 2, RLD = 200Ω, CLD = 1pF, Unless Otherwise
Specified.
PARAMETER DESCRIPTION CONDITIONS
MIN
(Note 4) TYP
MAX
(Note 4) UNIT
AC PERFORMANCE
BW -3dB Bandwidth 100 MHz
BW ± 0.1dB Bandwidth 12 MHz
SR Slew Rate VOUT = 2VP-P, 20% to 80% 800 1100 V/µs
tSTL Settling Time to 0.1% VOUT = 2VP-P 20 ns
tOVR Output Overdrive Recovery time 40 ns
VREFBW (-3dB) VREF -3dB Bandwidth AV =1, CLD = 2.7pF 70 MHz
VREFSR+ VREF Slew Rate - Rise VOUT = 2VP-P, 20% to 80% 125 V/µs
VREFSR- VREF Slew Rate - Fall VOUT = 2VP-P, 20% to 80% 65 V/µs
VNInput Voltage Noise f = 10kHz 28 nV/√Hz
HD2 Second Harmonic Distortion VOUT = 2VP-P, 1MHz -79 dBc
HD2 Second Harmonic Distortion VOUT = 2VP-P, 10MHz -65 dBc
HD3 Third Harmonic Distortion VOUT = 2VP-P, 1MHz -62 dBc
HD3 Third Harmonic Distortion VOUT = 2VP-P, 10MHz -43 dBc
dG Differential Gain at 3.58MHz RLD = 300Ω, AV = 2 0.14 %
dθDifferential Phase at 3.58MHz RLD = 300Ω, AV = 2 0.38 °
eSChannel Separation - For EL5370 only at f = 1MHz 85 dB
INPUT CHARACTERISTICS
VOS Input Referred Offset Voltage ±6 ±25 mV
IIN Input Bias Current (VIN, VINB) -10 -6 -2 µA
IREF Input Bias Current at REF Pin VREF = +3.2V 0.5 1.25 3 µA
VREF = -3.2V -1 0 +1 µA
Gain Gain Accuracy VIN = ±1V 1.98 2 2.02 V
RIN Differential Input Resistance 300 kΩ
CIN Differential Input Capacitance 1pF
DMIR Differential Mode Input Range ±2.1 ±2.3 V
CMIR+ Common Mode Positive Input Range at VIN+, VIN-3.23.4V
CMIR- Common Mode Negative Input Range at VIN+, VIN- -4.5 -4.2 V
EL5170, EL5370
4FN7309.9
August 28, 2012
VREFIN Reference Input Voltage Range - Positive VIN+ = VIN- = 0V 3.4 3.8 V
Reference Input Voltage Range - Negative -3.3 -3 V
VREFOS Output Offset Relative to VREF -140 60 +140 mV
CMRR Input Common Mode Rejection Ratio VIN = ±2.5V 65 84 dB
OUTPUT CHARACTERISTICS
VOUT Positive Output Voltage Swing RLD = 200Ω3.3 3.6 V
Negative Output Voltage Swing -3.3 -3 V
IOUT(Max) Maximum Output Current RL = 10Ω (EL5170) ±50 ±80 mA
RL = 10Ω (EL5370) ±70 ±85 mA
ROUT Output Impedance 60 mΩ
SUPPLY
VSUPPLY Supply Operating Range VS+ to VS-4.7511V
IS(ON) Power Supply Current - Per Channel 6 7.4 8.4 mA
IS(OFF)+ Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5170) 60 80 100 µA
IS(OFF)- Negative Power Supply Current - Disabled -150 -120 -90 µA
IS(OFF)+ Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5370) 0.5 2 5 µA
IS(OFF)- Negative Power Supply Current - Disabled -150 -120 -90 µA
PSRR Power Supply Rejection Ratio VS from ±4.5V to ±5.5V (EL5170) 70 83 dB
VS from ±4.5V to ±5.5V (EL5370) 65 83 dB
ENABLE
tEN Enable Time 200 ns
tDS Disable Time 1µs
VIH EN Pin Voltage for Power-Up VS+ -1.5 V
VIL EN Pin Voltage for Shutdown VS+ -0.5 V
IIH-EN EN Pin Input Current High - Per Channel At VEN = 5V 40 50 µA
IIL-EN EN Pin Input Current Low - Per Channel At VEN = 0V -6 -3 µA
NOTE:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Electrical Specifications VS+ = +5V, VS- = -5V, TA = +25°C, VIN = 0V, AV = 2, RLD = 200Ω, CLD = 1pF, Unless Otherwise
Specified. (Continued)
PARAMETER DESCRIPTION CONDITIONS
MIN
(Note 4) TYP
MAX
(Note 4) UNIT
EL5170, EL5370
5FN7309.9
August 28, 2012
Typical Performance Curves
FIGURE 1. FREQUENCY RESPONSE FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE vs RLD
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE vs CLD FIGURE 4. FREQUENCY RESPONSE vs VREF
FIGURE 5. POWER SUPPLY REJECTION RATIO vs FREQUENCY FIGURE 6. COMMON MODE REJECTION vs FREQUENCY
100k
FREQUENCY (Hz)
10M 100M 1G
GAIN (dB)
6
5
4
3
2
1
0
7
8
9
10 VS = ±5V, AV = 2, RLD = 200Ω, CLD = 1pF
VOP-P = 2V
VOP-P = 1V
VOP-P = 200mV
1M
1M 100M 1G
FREQUENCY (Hz)
100k
GAIN (dB)
6
5
4
3
2
1
0
7
8
9
10
CLD = 1pF, VODP-P = 200mV
10M
RLD = 500Ω
RLD = 200Ω
RLD = 1kΩ
RLD = 100Ω
100k
FREQUENCY (Hz)
10M 100M 1G
GAIN (dB)
7
6
5
4
3
2
1
8
9
10
11 VS = ±5V, RLD = 200Ω, VODP-P = 200mV
CLD = 20pF
CLD = 75pF
1M
CLD = 40pF
CLD = 0pF
100M
FREQUENCY (Hz)
1M
GAIN (dB)
0
-1
-2
-3
-4
-5
-6
1
2
3
4
10M
VREF = 1VP-P
VREF = 200mVP-P
0
-10
-30
-50
-60
-80
-90 1M 10M 100M
PSRR (dB)
FREQUENCY (Hz)
-70
-40
-20
100k
PSRR-
PSRR+
100k 1M 10M 100M
FREQUENCY (Hz)
COMMON MODE REJECTION (dB)
-10
-30
-50
-60
-80
-90
-70
-40
-20
-
+VOCM
VODM
100Ω
100Ω
VOCM/VINCM
VODM/VINCM
VINCM
EL5170, EL5370
6FN7309.9
August 28, 2012
FIGURE 7. DIFFERENTIAL MODE OUTPUT BALANCE ERROR vs
FREQUENCY
FIGURE 8. INPUT VOLTAGE NOISE vs FREQUENCY
FIGURE 9. CHANNEL ISOLATION vs FREQUENCY FIGURE 10. BANDWIDTH vs SUPPLY VOLTAGE
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 12. HARMONIC DISTORTION vs FREQUENCY
Typical Performance Curves (Continued)
100k 1M 10M 100M
FREQUENCY (Hz)
BALANCE ERROR (dB)
0
-10
-20
-30
-40
-50
-60
VIN
-
+VCM
VODM
100Ω
100Ω
RTR
VOCM/VODM
10
100
1000
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
VOLTAGE NOISE (nV/
√
Hz)
-110
-70
100k 1M 10M 100M
FREQUENCY (Hz)
CHANNEL ISOLATION (dB)
-100
-90
-80
-60
-50
-40
CH1<=> CH2
CH2 <=> CH3
CH2 <=> CH1
CH3 <=> CH2
CH3 <=> CH1
CH1 <=> CH3
80
85
90
95
105
110
4689 12
VS (V)
BW (MHz)
100
57 10
RLD = 200Ω
11
7.58
7.62
7.68
7.76
7.78
468911
VS (V)
IS (mA)
7.72
7.64
57 10
7.74
7.70
7.66
7.60
IS+
IS-
-50
-30
0M 2M 6M 10M 12M 18M 20M
FREQUENCY (Hz)
DISTORTION (dB)
4M 14M
-40
-70
-60
-90
-80
VS = ±5V, RLD = 200Ω, VOP-P = 2V
8M 16M
HD3
HD2
EL5170, EL5370
7FN7309.9
August 28, 2012
FIGURE 13. VCOM TRANSIENT RESPONSE FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 15. SMALL SIGNAL TRANSIENT RESPONSE FIGURE 16. DISABLED RESPONSE
FIGURE 17. ENABLED RESPONSE FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Typical Performance Curves (Continued)
40ns/DIV
0.5V/DIV
20ns/DIV
500mV/DIV
20ns/DIV
100mV/DIV
486mW
θJA = +206°C/W
MSOP8
870mW
θJA = +115°C/W
QSOP24
1.2
1.0
0.8
0.6
0.4
00 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
12585
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.2
625mW
θJA = +160°C/W
SO8
EL5170, EL5370
8FN7309.9
August 28, 2012
Simplified Schematic
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Typical Performance Curves (Continued)
1.136W
θJA = +88°C/W
QSOP24
1.4
1.2
1.0
0.8
0.6
0.2
00 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
12585
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.4
909mW
870mW
θJA = +115°C/W
MSOP8/10
θJA = +110°C/W
SO8
REF
R10
R9
RCD
RCD
OUT+
OUT-
CC
R6
R5
CC
R4
R3
R7R8
R2
R1
VB1
FBNFBPIN-IN+
VB2
VS+
VS-
200Ω
200Ω
400Ω
EL5170, EL5370
9FN7309.9
August 28, 2012
Description of Operation and
Application Information
Product Description
The EL5170 and EL5370 are wide bandwidth, low power and
single/differential ended to differential output amplifiers. They
have a fixed gain of 2. The EL5170 is a single channel
differential amplifier. The EL5370 is a triple channel
differential amplifier. The EL5170 and EL5370 have a -3dB
bandwidth of 100MHz while driving a 200Ω differential load.
The EL5170 and EL5370 are available with a power-down
feature to reduce the power while the amplifiers are disabled.
Input, Output and Supply Voltage Range
The EL5170 and EL5370 have been designed to operate with a
single supply voltage of 5V to 10V or split supplies with its total
voltage from 5V to 10V. The amplifiers have an input common
mode voltage range from -4.5V to 3.4V for ±5V supply. The
differential mode input range (DMIR) between the two inputs
is from -2.3V to +2.3V. The input voltage range at the REF pin is
from -3.3V to 3.8V. If the input common mode or differential
mode signal is outside the above-specified ranges, it will cause
the output signal to become distorted.
The output of the EL5170 and EL5370 can swing from -3.3V to
3.6V at 200Ω differential load at ±5V supply. As the load
resistance becomes lower, the output swing is reduced.
Differential and Common Mode Gain
Settings
As shown in the “Simplified Schematic” on page 8, since the
feedback resistors RF and the gain resistor are integrated with
200Ω and 400Ω, the EL5170 and EL5370 have a fixed gain of
2. The common mode gain is always one.
Driving Capacitive Loads and Cables
The EL5170 and EL5370 can drive 75pF differential capacitor
in parallel with 200Ω differential load with less than 3.5dB of
peaking. If less peaking is desired in applications, a small
series resistor (usually between 5Ω to 50Ω) can be placed in
series with each output to eliminate most peaking. However,
this will reduce the gain slightly.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier’s output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help to
reduce peaking.
Disable/Power-Down
The EL5170 and EL5370 can be disabled and their outputs
placed in a high impedance state. The turn-off time is about
1µs and the turn-on time is about 200ns. When disabled, the
amplifier’s supply current is reduced to 2µA for IS+ and 120µA
for IS- typically, thereby effectively eliminating the power
consumption. The amplifier’s power-down can be controlled by
standard CMOS signal levels at the ENABLE pin. The applied
logic signal is relative to VS+ pin. Letting the EN pin float or
applying a signal that is less than 1.5V below VS+ will enable
the amplifier. The amplifier will be disabled when the signal at
EN pin is above VS+ -0.5V.
Output Drive Capability
The EL5170 and EL5370 have internal short circuit protection.
Its typical short circuit current is ±80mA. If the output is
shorted indefinitely, the power dissipation could easily
increase such that the part will be destroyed. Maximum
reliability is maintained if the output current never exceeds
±60mA. This limit is set by the design of the internal metal
interconnect.
Power Dissipation
With the high output drive capability of the EL5170 and EL5370
it is possible to exceed the +125°C absolute maximum junction
temperature under certain load current conditions. Therefore, it
is important to calculate the maximum junction temperature for
the application to determine if the load conditions or package
types need to be modified for the amplifier to remain in the safe
operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC is
the total quiescent supply current times the total power supply
voltage, plus the power in the IC due to the load, or as
expressed in Equation 2:
Where:
VSTOT = Total supply voltage = VS+ - VS-
ISMAX = Maximum quiescent supply current per channel
ΔVO = Maximum differential output voltage of the
application
RLD = Differential load resistance
ILOAD = Load current
i = Number of channels
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
PDMAX TJMAX TAMAX
–
ΘJA
---------------------------------------------
=(EQ. 1)
PD i VSTOT ISMAX
×V(STOT ΔVO)–ΔVO
RLD
------------
×+
⎝⎠
⎜⎟
⎛⎞
×=(EQ. 2)
EL5170, EL5370
10 FN7309.9
August 28, 2012
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit board
layout is necessary for optimum performance. Lead lengths
should be as sort as possible. The power supply pin must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the VS- pin is connected to the ground
plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF
ceramic capacitor from VS+ to GND will suffice. This same
capacitor combination should be placed at each supply pin to
ground if split supplies are to be used. In this case, the VS- pin
becomes the negative supply rail.
For good AC performance, parasitic capacitance should be kept
to minimum. Use of wire wound resistors should be avoided
because of their additional series inductance. Use of sockets
should also be avoided if possible. Sockets add parasitic
inductance and capacitance that can result in compromised
performance. Minimizing parasitic capacitance at the amplifier’s
inverting input pin is very important. The feedback resistor
should be placed very close to the inverting input pin. Strip line
design techniques are recommended for the signal traces.
Typical Applications
0Ω
VFB
VINB
VREF
EL5172/
EL5372
EL5170/
EL5370 VOUT
50
50
ZO = 100Ω
VIN
50Ω
50Ω
FIGURE 20. TWISTED PAIR DRIVER
IN+
IN-
FIGURE 21. DUAL COAXIAL CABLE DRIVER
IN-
0Ω
VFB
VINB
VREF
VOUT
VIN
EL5172/EL5372
+
VIN
VREF
VIN
50Ω
50Ω
VOUTB
EL5170/EL5370
-
50Ω COAX
50Ω COAX
50Ω
50Ω
VOUTIN+
EL5170/EL5370
IN+
IN-
VIN
10V
FIGURE 22. SINGLE SUPPLY TWISTED PAIR DRIVER
50Ω
50Ω
VREF
10k10k
10k 10k
ZO = 100Ω
TWISTED PAIR
100ΩVOUT
TWISTED PAIR
EL5170, EL5370
11 FN7309.9
August 28, 2012
FIGURE 23. DUAL SIGNAL TRANSMISSION CIRCUIT
EL5170/EL5370
IN+
IN-
EL5172
EL5172/
EL5372
VREF
50Ω
50Ω
50
50
TWISTED PAIR
ZO = 100Ω
A
B
B
A
EL5170, EL5370
12 FN7309.9
August 28, 2012
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
EL5170, EL5370
13 FN7309.9
August 28, 2012
Package Outline Drawing
M8.118A
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
EL5170, EL5370
14
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7309.9
August 28, 2012
For additional products, see www.intersil.com/product_tree
Quarter Size Outline Plastic Packages Family (QSOP)
0.010 CAB
SEATING
PLANE
DETAIL X
EE1
1(N/2)
(N/2)+1
N
PIN #1
I.D. MARK
b
0.004 C
c
A
SEE DETAIL "X"
A2
4°±4°
GAUGE
PLANE
0.010
L
A1
D
B
H
C
e
A
0.007 CAB
L1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
SYMBOL
INCHES
TOLERANCE NOTESQSOP16 QSOP24 QSOP28
A 0.068 0.068 0.068 Max. -
A1 0.006 0.006 0.006 ±0.002 -
A2 0.056 0.056 0.056 ±0.004 -
b 0.010 0.010 0.010 ±0.002 -
c 0.008 0.008 0.008 ±0.001 -
D 0.193 0.341 0.390 ±0.004 1, 3
E 0.236 0.236 0.236 ±0.008 -
E1 0.154 0.154 0.154 ±0.004 2, 3
e 0.025 0.025 0.025 Basic -
L 0.025 0.025 0.025 ±0.009 -
L1 0.041 0.041 0.041 Basic -
N 16 24 28 Reference -
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not in-
cluded.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.