1
P/N:PM1300 REV. 1.3, NOV. 06, 2006
SINGLE VOLTAGE 3V ONLY FLASH MEMORY
FEATURES
GENERAL FEA TURES
• Byte/Wo rd mode switchable:
- 524,288 x8 / 262,144 x16 (MX29LV400C)
- 1,048,576 x8 / 524,288 x16 (MX29LV800C)
- 2,097,152 x8 / 1,048,576 x16 (MX29LV160C)
• Secto r Structure
- 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1
64K-Byte x 7 (MX29LV400C), 64K-Byte x 15 (MX29LV800C), 64K-Byte x 31 (MX29LV160C)
- Pro vides secto r pro tect function to prevent pro gram o r erase o peration in the pro tected secto r
- Pro vides chip unpro tect functio n to allow co de changing
- Pro vides tempo rary secto r unprotect functio n fo r co de changing in previo usly protected secto r
• Single Power Supply Operatio n
- 2.7 to 3.6 volt fo r read, erase , and pro gram o peratio ns
• Latch-up protected to 250mA fro m -1V to Vcc + 1V
• Low Vcc write inhibit : Vcc <= 1.4V
• Co mpatible with JEDEC standard
- Pino ut and so ftware co mpatible to single power supply Flash
•Fully compatible with MX29L V400B/MX29LV800B/MX29L V160B device
PERFORMANCE
• High Performance
- F ast access time: 45R (MX29LV400C and MX29L V800C o nly), 55R/70/90ns
- F ast pro gram time: 7us/wo rd typical utilizing accelerate functio n
- F ast erase time: 0.7s/secto r , 15s/chip (typical, MX29LV160C)
• Low Power Co nsumption
- Low active read current: 10mA (typical) at 5MHz
- Low standby current: 200nA (typical)
• Minimum 100,000 erase/pro gram cycle
• 10 years data retentio n
SOFTW ARE FEA TURES
• Erase Suspend/ Erase Resume
- Suspends secto r erase o peration to read data from or pro gram data to ano ther sector which is no t being erased
• Status Reply
- Data# Polling & Toggle bits pro vide detectio n o f program and erase operation completio n
• Suppo rt Commo n Flash Interface (CFI)
HARDWARE FEA TURES
• Ready/Busy# (R Y/BY#) Output
- Pro vides a hardware metho d of detecting pro gram and erase o peratio n completion
• Hardware Reset (RESET#) Input
- Pro vides a hardware metho d to reset the internal state machine to read mode
PACKAGE
• 44-Pin SOP
• 48-Pin TSOP
• 48-Ball CSP
•All Pb-free devices are RoHS Compliant
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
2
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MX29LV400C PIN CONFIGURATIONS
44 SOP(500 mil)
PIN DESCRIPTION
SYMBOL PIN NAME
A0~A17 Address Input
Q0~Q14 Data Input/Output
Q15/A-1 Q15 (Word mode)/LSB addr(Byte mode)
CE# Chip Enable Input
WE# Write Enable Input
BYTE# Word/Byte Selection input
RESET# Hardware Reset Pin/Secto r Protect
Unlock
OE# Output Enable Input
R Y/BY# Ready/Busy Output
VCC P ower Supply Pin (2.7V~3.6V)
GND Ground Pin
N C Pin No t Connected Internally
48 TSOP (Standard Type) (12mm x 20mm)
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
RESET#
NC
NC
RY/BY#
NC
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
Q11
Q3
Q10
Q2
Q9
Q1
Q8
Q0
OE#
GND
CE#
A0
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX29LV400C T/B
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
RY/BY#
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
GND
OE#
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
RESET#
WE#
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
MX29LV400C T/B
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball WFBGA (Balls Facing Down, 4 x 6 x 0.75 mm)
48-Ball CSP (Ball Pitch = 0.8 mm, Top View , Balls Facing Do wn, 6 x 8 mm)
A13
6
5
4
3
2
1
ABCDEFGH
A9
A7
A3
WE#
RY/
BY#
A12
A8
NC
A17
A4
A14
A10
NC
NC
A6
A2
A15
A11
RE-
SET# NC
NC
A5
A1
A16
Q7
Q5
Q2
Q0
A0
BYTE# Q15/
A-1
Q14
Q12
Q10
Q8
Q13
VCC
Q11
Q9
GND
Q6
Q4
Q3
Q1
GND
CE# OE#
A2
6
5
4
3
2
1
ABCDEFGH
A1
GND
A0
CE#
A4
A3
Q8
OE#
Q0
A6
A7
NC
Q10
Q9
Q1
A17
NC
A5
NC
Q2
NC
Q3
NC WE# NC
NC
NC
Q13
VCC Q12
JKL
A9
A10
A8
Q4
Q5
A11
A13
A12
Q11
Q6
Q15
A14
A15
A16
Q7
GND
Q14
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball XFLGA (Balls Facing Down, 4 x 6 x 0.5 mm)
A2
6
5
4
3
2
1
ABCDEFGH
A1
GND
A0
CE#
A4
A3
Q8
OE#
Q0
A6
A7
NC
Q10
Q9
Q1
A17
NC
A5
BYTE#
Q2
NC
Q3
NC WE# RE-
SET#
NC
NC
Q13
VCC Q12
JKL
A9
A10
A8
Q4
Q5
A11
A13
A12
Q11
Q6
Q15/
A-1
A14
A15
A16
Q7
GND
Q14
5
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MX29LV800C PIN CONFIGURATIONS PIN DESCRIPTION
SYMBOL PIN NAME
A0~A18 Address Input
Q0~Q14 Data Input/Output
Q15/A-1 Q15(Word mode)/LSB addr(Byte mode)
CE# Chip Enable Input
WE# Write Enable Input
BYTE# Wo rd/Byte Selection input
RESET# Hardware Reset Pin
OE# Output Enable Input
R Y/BY# Ready/Busy Output
VCC P ower Supply Pin (2.7V~3.6V)
GND Ground Pin
N C Pin No t Connected Internally
48 TSOP (Standard T ype) (12mm x 20mm)
44 SOP(500 mil)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
GND
OE#
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
RESET#
WE#
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
MX29LV800CT/CB
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
RESET#
NC
NC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
Q11
Q3
Q10
Q2
Q9
Q1
Q8
Q0
OE#
GND
CE#
A0
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX29LV800CT/CB
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball CSP (Ball Pitch = 0.8 mm, Top View, Balls Facing Do wn, 6 x 8 mm)
A13
6
5
4
3
2
1
ABCDEFGH
A9
A7
A3
WE#
RY/
BY#
A12
A8
NC
A17
A4
A14
A10
NC
A18
A6
A2
A15
A11
RE-
SET# NC
NC
A5
A1
A16
Q7
Q5
Q2
Q0
A0
BYTE# Q15/
A-1
Q14
Q12
Q10
Q8
Q13
VCC
Q11
Q9
GND
Q6
Q4
Q3
Q1
GND
CE# OE#
48-Ball WFBGA (Balls Facing Down, 4 x 6 x 0.5 mm)
A2
6
5
4
3
2
1
ABCDEFGH
A1
GND
A0
CE#
A4
A3
Q8
OE#
Q0
A6
A7
A18
Q10
Q9
Q1
A17
NC
A5
NC
Q2
NC
Q3
NC WE# NC
NC
NC
Q13
VCC Q12
JKL
A9
A10
A8
Q4
Q5
A11
A13
A12
Q11
Q6
Q15
A14
A15
A16
Q7
GND
Q14
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball XFLGA (Balls Facing Down, 4 x 6 x 0.5 mm)
A2
6
5
4
3
2
1
ABCDEFGH
A1
GND
A0
CE#
A4
A3
Q8
OE#
Q0
A6
A7
A18
Q10
Q9
Q1
A17
NC
A5
BYTE#
Q2
NC
Q3
NC WE# RE-
SET#
NC
NC
Q13
VCC Q12
JKL
A9
A10
A8
Q4
Q5
A11
A13
A12
Q11
Q6
A14
A15
A16
Q7
GND
Q14 Q15/
A-1
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MX29LV160C PIN CONFIGURATIONS PIN DESCRIPTION
SYMBOL PIN NAME
A0~A19 Address Input
Q0~Q14 Data Input/Output
Q15/A-1 Q15(Word mode)/LSB addr(Byte mo de)
CE# Chip Enable Input
WE# Write Enable Input
BYTE# Word/Byte Selection input
RESET# Hardware Reset Pin/Secto r Protect Unlo ck
OE# Output Enable Input
R Y/BY# Ready/Busy Output
VCC P ower Supply Pin (2.7V~3.6V)
GND Ground Pin
48 TSOP (Standard T ype) (12mm x 20mm)
44 SOP(500 mil)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
RESET#
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
GND
OE#
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
WE#
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
MX29LV160C T/B
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE#
RESET#
NC
NC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
Q11
Q3
Q10
Q2
Q9
Q1
Q8
Q0
OE#
GND
CE#
A0
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX29LV160C T/B
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball CSP (Ball Pitch = 0.8 mm, Top View, Balls Facing Do wn, 6 x 8 mm)
A13
6
5
4
3
2
1
ABCDEFGH
A9
A7
A3
WE#
RY/
BY#
A12
A8
NC
A17
A4
A14
A10
NC
A18
A6
A2
A15
A11
RE-
SET# A19
NC
A5
A1
A16
Q7
Q5
Q2
Q0
A0
BYTE# Q15/
A-1
Q14
Q12
Q10
Q8
Q13
VCC
Q11
Q9
GND
Q6
Q4
Q3
Q1
GND
CE# OE#
48-Ball XFLGA (Balls Facing Down, 4 x 6 x 0.5 mm)
A2
6
5
4
3
2
1
ABCDEFGH
A1
GND
A0
CE#
A4
A3
Q8
OE#
Q0
A6
A7
A18
Q10
Q9
Q1
A17
A19
A5
BYTE#
Q2
NC
Q3
NC WE# RE-
SET#
NC
NC
Q13
VCC Q12
JKL
A9
A10
A8
Q4
Q5
A11
A13
A12
Q11
Q6
A14
A15
A16
Q7
GND
Q14 Q15/
A-1
10
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
BLOCK DIAGRAM
CONTROL
INPUT
LOGIC
PROGRAM/ERASE
HIGH V OLTAGE
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTER
FLASH
ARRAY
X-DECODER
ADDRESS
LATCH
AND
BUFFER Y-PASS GATE
Y-DECODER
ARRAY
SOURCE
HV COMMAND
DATA
DECODER
COMMAND
DATA LATCH
I/O BUFFER
PGM
DATA
HV
PROGRAM
DATA LATCH
SENSE
AMPLIFIER
Q0-Q15/A-1
A0-AM
AM: MSB address
CE#
OE#
WE#
RESET#
BYTE#
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Table 1. BLOCK STRUCTURE
Sector Sector Size Address range Sector Address
Byte Mode W ord Mode Byte Mode (x8) W ord Mode (x16) A17 A16 A15 A14 A13 A 12
SA0 64Kbytes 32Kwords 00000-0FFFF 00000-07FFF 0 0 0 X X X
SA1 64Kbytes 32Kwords 10000-1FFFF 08000-0FFFF 0 0 1 X X X
SA2 64Kbytes 32Kwords 20000-2FFFF 10000-17FFF 0 1 0 X X X
SA3 64Kbytes 32Kwords 30000-3FFFF 18000-1FFFF 0 1 1 X X X
SA4 64Kbytes 32Kwords 40000-4FFFF 20000-27FFF 1 0 0 X X X
SA5 64Kbytes 32Kwords 50000-5FFFF 28000-2FFFF 1 0 1 X X X
SA6 64Kbytes 32Kwords 60000-6FFFF 30000-37FFF 1 1 0 X X X
SA7 32Kbytes 16Kwords 70000-77FFF 38000-3BFFF 1 1 1 0 X X
SA8 8Kbytes 4Kwords 78000-79FFF 3C000-3CFFF 1 1 1 1 0 0
SA9 8Kbytes 4Kwords 7A000-7BFFF 3D000-3DFFF 1 1 1 1 0 1
SA10 16Kbytes 8Kwords 7C000-7FFFF 3E000-3FFFF 1 1 1 1 1 X
Sector Sector Size Address range Sector Address
Byte Mode W ord Mode Byte Mode (x8) W ord Mode (x16) A17 A16 A15 A14 A13 A 12
SA0 16Kbytes 8Kwords 00000-03FFF 00000-01FFF 0 0 0 0 0 X
SA1 8Kbytes 4Kwords 04000-05FFF 02000-02FFF 0 0 0 0 1 0
SA2 8Kbytes 4Kwords 06000-07FFF 03000-03FFF 0 0 0 0 1 1
SA3 32Kbytes 16Kwords 08000-0FFFF 04000-07FFF 0 0 0 1 X X
SA4 64Kbytes 32Kwords 10000-1FFFF 08000-0FFFF 0 0 1 X X X
SA5 64Kbytes 32Kwords 20000-2FFFF 10000-17FFF 0 1 0 X X X
SA6 64Kbytes 32Kwords 30000-3FFFF 18000-1FFFF 0 1 1 X X X
SA7 64Kbytes 32Kwords 40000-4FFFF 20000-27FFF 1 0 0 X X X
SA8 64Kbytes 32Kwords 50000-5FFFF 28000-2FFFF 1 0 1 X X X
SA9 64Kbytes 32Kwords 60000-6FFFF 30000-37FFF 1 1 0 X X X
SA10 64Kbytes 32Kwords 70000-7FFFF 38000-3FFFF 1 1 1 X X X
MX29L V400CB SECTOR ARCHITECTURE
MX29LV400CT SECTOR ARCHITECTURE
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MX29LV800CT SECTOR ARCHITECTURE
Sector Sector Size Address range Sector Address
Byte Mode Word Mode Byte Mode (x8) Word Mode (x16) A1 8 A17 A16 A15 A 14 A13 A12
SA0 64Kbytes 32Kwords 00000h-0FFFFh 00000h-07FFFh 0000XXX
SA1 64Kbytes 32Kwords 10000h-1FFFFh 08000h-0FFFFh 0001XXX
SA2 64Kbytes 32Kwords 20000h-2FFFFh 10000h-17FFFh 0010XXX
SA3 64Kbytes 32Kwords 30000h-3FFFFh 18000h-1FFFFh 0011XXX
SA4 64Kbytes 32Kwords 40000h-4FFFFh 20000h-27FFFh 0100XXX
SA5 64Kbytes 32Kwords 50000h-5FFFFh 28000h-2FFFFh 0101XXX
SA6 64Kbytes 32Kwords 60000h-6FFFFh 30000h-37FFFh 0110XXX
SA7 64Kbytes 32Kwords 70000h-7FFFFh 38000h-3FFFFh 0111XXX
SA8 64Kbytes 32Kwords 80000h-8FFFFh 40000h-47FFFh 1000XXX
SA9 64Kbytes 32Kwords 90000h-9FFFFh 48000h-4FFFFh 1001XXX
SA10 64Kbytes 32Kwords A0000h-AFFFFh 50000h-57FFFh 1010XXX
SA11 64Kbytes 32Kwords B0000h-BFFFFh 58000h-5FFFFh 1011XXX
SA12 64Kbytes 32Kwords C0000h-CFFFFh 60000h-67FFFh 1100XXX
SA13 64Kbytes 32Kwords D0000h-DFFFFh 68000h-6FFFFh 1101XXX
SA14 64Kbytes 32Kwords E0000h-EFFFFh 70000h-77FFFh 1110XXX
SA15 32Kbytes 16Kwords F0000h-F7FFFh 78000h-7BFFFh 11110XX
SA16 8Kbytes 4Kwords F8000h-F9FFFh 7C000h-7CFFFh 111110 0
SA17 8Kbytes 4Kwords FA000h-FBFFFh 7D000h-7DFFFh 111110 1
SA18 16Kbytes 8Kwords FC000h-FFFFFh 7E000h-7FFFFh 111111 X
13
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Sector Sector Size Address range Sector Address
Byte Mode Word Mode Byte Mode (x8) Word Mode (x16) A1 8 A17 A16 A15 A 14 A13 A12
SA0 16Kbytes 8Kwords 00000h-03FFFh 00000h-01FFFh 000000 X
SA1 8Kbytes 4Kwords 04000h-05FFFh 02000h-02FFFh 000001 0
SA2 8Kbytes 4Kwords 06000h-07FFFh 03000h-03FFFh 000001 1
SA3 32Kbytes 16Kwords 08000h-0FFFFh 04000h-07FFFh 00001XX
SA4 64Kbytes 32Kwords 10000h-1FFFFh 08000h-0FFFFh 0001XXX
SA5 64Kbytes 32Kwords 20000h-2FFFFh 10000h-17FFFh 0010XXX
SA6 64Kbytes 32Kwords 30000h-3FFFFh 18000h-1FFFFh 0011XXX
SA7 64Kbytes 32Kwords 40000h-4FFFFh 20000h-27FFFh 0100XXX
SA8 64Kbytes 32Kwords 50000h-5FFFFh 28000h-2FFFFh 0101XXX
SA9 64Kbytes 32Kwords 60000h-6FFFFh 30000h-37FFFh 0110XXX
SA10 64Kbytes 32Kwords 70000h-7FFFFh 38000h-3FFFFh 0111XXX
SA11 64Kbytes 32Kwords 80000h-8FFFFh 40000h-47FFFh 1000XXX
SA12 64Kbytes 32Kwords 90000h-9FFFFh 48000h-4FFFFh 1001XXX
SA13 64Kbytes 32Kwords A0000h-AFFFFh 50000h-57FFFh 1010XXX
SA14 64Kbytes 32Kwords B0000h-BFFFFh 58000h-5FFFFh 1011XXX
SA15 64Kbytes 32Kwords C0000h-CFFFFh 60000h-67FFFh 1100XXX
SA16 64Kbytes 32Kwords D0000h-DFFFFh 68000h-6FFFFh 1101XXX
SA17 64Kbytes 32Kwords E0000h-EFFFFh 70000h-77FFFh 1110XXX
SA18 64Kbytes 32Kwords F0000h-FFFFFh 78000h-7FFFFh 1111XXX
MX29LV800CB SECTOR ARCHITECTURE
14
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Sector Sector Size Address range Sector Address
Byte Mode W ord Mode Byte Mode(x8) W ord Mode(x16) A19 A1 8 A17 A16 A15 A1 4 A13 A12
SA0 64Kbytes 32Kwords 000000-00FFFF 00000-07FFF 00000XXX
SA1 64Kbytes 32Kwords 010000-01FFFF 08000-0FFFF 00001XXX
SA2 64Kbytes 32Kwords 020000-02FFFF 10000-17FFF 00010XXX
SA3 64Kbytes 32Kwords 030000-03FFFF 18000-1FFFF 00011XXX
SA4 64Kbytes 32Kwords 040000-04FFFF 20000-27FFF 00100XXX
SA5 64Kbytes 32Kwords 050000-05FFFF 28000-2FFFF 00101XXX
SA6 64Kbytes 32Kwords 060000-06FFFF 30000-37FFF 00110XXX
SA7 64Kbytes 32Kwords 070000-07FFFF 38000-3FFFF 00111XXX
SA8 64Kbytes 32Kwords 080000-08FFFF 40000-47FFF 01000XXX
SA9 64Kbytes 32Kwords 090000-09FFFF 48000-4FFFF 01001XXX
SA10 64Kbytes 32Kwords 0A0000-0AFFFF 50000-57FFF 01010XXX
SA11 64Kbytes 32Kwords 0B0000-0BFFFF 58000-5FFFF 01011XXX
SA12 64Kbytes 32Kwords 0C0000-0CFFFF 60000-67FFF 01100XXX
SA13 64Kbytes 32Kwords 0D0000-0DFFFF 68000-6FFFF 01101XXX
SA14 64Kbytes 32Kwords 0E0000-0EFFFF 70000-77FFF 01110XXX
SA15 64Kbytes 32Kwords 0F0000-0FFFFF 78000-7FFFF 01111XXX
SA16 64Kbytes 32Kwords 100000-10FFFF 80000-87FFF 10000XXX
SA17 64Kbytes 32Kwords 110000-11FFFF 88000-8FFFF 10001XXX
SA18 64Kbytes 32Kwords 120000-12FFFF 90000-97FFF 10010XXX
SA19 64Kbytes 32Kwords 130000-13FFFF 98000-9FFFF 10011XXX
SA20 64Kbytes 32Kwords 140000-14FFFF A0000-A7FFF 10100XXX
SA21 64Kbytes 32Kwords 150000-15FFFF A8000-AFFFF 10101XXX
SA22 64Kbytes 32Kwords 160000-16FFFF B0000-B7FFF 10110XXX
SA23 64Kbytes 32Kwords 170000-17FFFF B8000-BFFFF 10111XXX
SA24 64Kbytes 32Kwords 180000-18FFFF C0000-C7FFF 11000XXX
SA25 64Kbytes 32Kwords 190000-19FFFF C8000-CFFFF 11001XXX
SA26 64Kbytes 32Kwords 1A0000-1AFFFF D0000-D7FFF 11010XXX
SA27 64Kbytes 32Kwords 1B0000-1BFFFF D8000-DFFFF 11011XXX
SA28 64Kbytes 32Kwords 1C0000-1CFFFF E0000-E7FFF 11100XXX
SA29 64Kbytes 32Kwords 1D0000-1DFFFF E8000-EFFFF 11101XXX
SA30 64Kbytes 32Kwords 1E0000-1EFFFF F0000-F7FFF 11110XXX
SA31 32Kbytes 16Kwords 1F0000-1F7FFF F8000-FBFFF 111110XX
SA32 8Kbytes 4Kwords 1F8000-1F9FFF FC000-FCFFF 1111110 0
SA33 8Kbytes 4Kwords 1FA000-1FBFFF FD000-FDFFF 1111110 1
SA34 16Kbytes 8Kwords 1FC000-1FFFFF FE000-FFFFF 1111111 X
MX29LV160CT SECTOR ARCHITECTURE
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MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Sector Sector Size Address range Sector Address
Byte Mode W ord Mode Byte Mode (x8) Word Mode (x16) A19 A18 A17 A16 A15 A14 A13 A 12
SA0 16Kbytes 8Kwords 000000-003FFF 00000-01FFF 0 0 0 0 0 0 0 X
SA1 8Kbytes 4Kwords 004000-005FFF 02000-02FFF 0 0 0 0 0 0 1 0
SA2 8Kbytes 4Kwords 006000-007FFF 03000-03FFF 0 0 0 0 0 0 1 1
SA3 32Kbytes 16Kwords 008000-00FFFF 04000-07FFF 0 0 0 0 0 1 X X
SA4 64Kbytes 32Kwords 010000-01FFFF 08000-0FFFF 0 0 0 0 1 X X X
SA5 64Kbytes 32Kwords 020000-02FFFF 10000-17FFF 0 0 0 1 0 X X X
SA6 64Kbytes 32Kwords 030000-03FFFF 18000-1FFFF 0 0 0 1 1 X X X
SA7 64Kbytes 32Kwords 040000-04FFFF 20000-27FFF 0 0 1 0 0 X X X
SA8 64Kbytes 32Kwords 050000-05FFFF 28000-2FFFF 0 0 1 0 1 X X X
SA9 64Kbytes 32Kwords 060000-06FFFF 30000-37FFF 0 0 1 1 0 X X X
SA10 64Kbytes 32Kwords 070000-07FFFF 38000-3FFFF 0 0 1 1 1 X X X
SA11 64Kbytes 32Kwords 080000-08FFFF 40000-47FFF 0 1 0 0 0 X X X
SA12 64Kbytes 32Kwords 090000-09FFFF 48000-4FFFF 0 1 0 0 1 X X X
SA13 64Kbytes 32Kwords 0A0000-0AFFFF 50000-57FFF 0 1 0 1 0 X X X
SA14 64Kbytes 32Kwords 0B0000-0BFFFF 58000-5FFFF 0 1 0 1 1 X X X
SA15 64Kbytes 32Kwords 0C0000-0CFFFF 60000-67FFF 0 1 1 0 0 X X X
SA16 64Kbytes 32Kwords 0D0000-0DFFFF 68000-6FFFF 0 1 1 0 1 X X X
SA17 64Kbytes 32Kwords 0E0000-0EFFFF 70000-77FFF 0 1 1 1 0 X X X
SA18 64Kbytes 32Kwords 0F0000-0FFFFF 78000-7FFFF 0 1 1 1 1 X X X
SA19 64Kbytes 32Kwords 100000-10FFFF 80000-87FFF 1 0 0 0 0 X X X
SA20 64Kbytes 32Kwords 110000-11FFFF 88000-8FFFF 1 0 0 0 1 X X X
SA21 64Kbytes 32Kwords 120000-12FFFF 90000-97FFF 1 0 0 1 0 X X X
SA22 64Kbytes 32Kwords 130000-13FFFF 98000-9FFFF 1 0 0 1 1 X X X
SA23 64Kbytes 32Kwords 140000-14FFFF A0000-A7FFF 1 0 1 0 0 X X X
SA24 64Kbytes 32Kwords 150000-15FFFF A8000-AFFFF 1 0 1 0 1 X X X
SA25 64Kbytes 32Kwords 160000-16FFFF B0000-B7FFF 1 0 1 1 0 X X X
SA26 64Kbytes 32Kwords 170000-17FFFF B8000-BFFFF 1 0 1 1 1 X X X
SA27 64Kbytes 32Kwords 180000-18FFFF C0000-C7FFF 1 1 0 0 0 X X X
SA28 64Kbytes 32Kwords 190000-19FFFF C8000-CFFFF 1 1 0 0 1 X X X
SA29 64Kbytes 32Kwords 1A0000-1AFFFF D0000-D7FFF 1 1 0 1 0 X X X
SA30 64Kbytes 32Kwords 1B0000-1BFFFF D8000-DFFFF 1 1 0 1 1 X X X
SA31 64Kbytes 32Kwords 1C0000-1CFFFF E0000-E7FFF 1 1 1 0 0 X X X
SA32 64Kbytes 32Kwords 1D0000-1DFFFF E8000-EFFFF 1 1 1 0 1 X X X
SA33 64Kbytes 32Kwords 1E0000-1EFFFF F0000-FFFFF 1 1 1 1 0 X X X
SA34 64Kbytes 32Kwords 1F0000-1FFFFF F8000-FFFFF 1 1 1 1 1 X X X
MX29LV160CB SECTOR ARCHITECTURE
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
T able 2. BUS OPERA TION--1
Note:
1. Q0~Q15 are input (DIN) or output (DOUT) pins according to the requests of command sequence, sector protection,
or data polling algo rithm.
2. In W o rd Mo de (Byte#=Vih), the addresses are AM to A0.
In Byte Mo de (Byte#=Vil), the addresses are AM to A-1 (Q15).
3. AM: MSB of address.
Mode Select RE- CE# WE# OE# Address Data Byte#
SET# (I/O) Vil Vih
Q0~Q7 Data (I/O)
Q8~Q15
Device Reset L X X X X HighZ HighZ HighZ
Standby Mo de Vcc±Vcc±X X X HighZ HighZ HighZ
0.3V 0.3V
Output H L H H X HighZ HighZ HighZ
Disable
Read Mode H L H L AIN DOUT Q8-Q14= DOUT
Write H L L H AIN DIN HighZ DIN
Temporary Vhv X X X AIN DIN HighZ DIN
Sector
Unprotect
Sector Vhv L L H Sector Address, DIN, DOUT X X
Protect A6=L, A1=H,
A0=L
Chip Vhv L L H Secto r Address, DIN, DOUT X X
Unprotect A6=H, A1=H,
A0=L
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
BUS OPERA TION--2
Item Control Input AM A 11 A 8 A 5
CE# WE# OE# to to A9 to A6 to A1 A0 Q0~Q7 Q8~Q15
A12 A10 A7 A2
Sector Lock Status L H L SA x Vhv x L x H L 01h or x
Verification 00h
(Note1)
Read Silico n ID L H L x x Vhv x L x L L C2H x
Manufacturer Code
Read Silico n ID L H L x x Vhv x L x L H B9H 22h(Word)
MX29LV400CT x (Byte)
Read Silico n ID L H L x x Vhv x L x L H BAH 22h(Word)
MX29LV400CB x (Byte)
Read Silico n ID L H L x x Vhv x L x L H DAH 22h(Word)
MX29LV800CT x (Byte)
Read Silico n ID L H L x x Vhv x L x L H 5BH 22h(Word)
MX29LV800CB x (Byte)
Read Silico n ID L H L x x Vhv x L x L H C4H 22h(Word)
MX29LV160CT x (Byte)
Read Silico n ID L H L x x Vhv x L x L H 49H 22h(Word)
MX29LV160CB x (Byte)
Notes:
1. Sector unprotected co de:00h. Sector protected code:01h.
2. AM: MSB of address.
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MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
WRITE COMMANDS/COMMAND SEQUENCES
To write a command to the device, system must driv e WE# and CE# to Vil, and OE# to Vih. In a command cycle, all
address are latched at the later falling edge o f CE# and WE#, and all data are latched at the earlier rising edge of CE#
and WE#.
Figure 1 illustrates the A C timing wavefo rm of a write command, and Table 3 defines all the valid co mmand sets o f the
device. System is not allowed to write invalid commands not defined in this datasheet. Writing an invalid command will
bring the device to an undefined state.
REQUIREMENTS FOR READING ARRAY DA T A
Read array actio n is to read the data stored in the arra y . While the memo ry device is in powered up o r has been reset,
it will auto matically enter the status of read array . If the micro processo r wants to read the data sto red in array, it has to
drive CE# (device enable control pin) and OE# (Output contro l pin) as Vil, and input the address of the data to be read
into address pin at the same time. After a perio d of read cycle (Tce o r Taa), the data being read o ut will be displa yed
o n output pin fo r microprocessor to access. If CE# or OE# is Vih, the o utput will be in tri-state, and there will be no data
displa yed on o utput pin at all.
After the memo ry device co mpletes embedded o peratio n (automatic Erase or Program), it will auto matically return to
the status o f read arra y, and the device can read the data in any address in the arra y. In the pro cess o f erasing, if the
de vice receiv es the Er ase suspend command, erase o peration will be stopped temporarily after a period of time no
more than Tready1 and the device will return to the status of read array. At this time, the device can read the data
sto red in any address except the secto r being erased in the array. In the status of erase suspend, if user wants to read
the data in the secto rs being erased, the device will o utput status data o nto the output. Similarly , if pro gram co mmand
is issued after erase suspend, after pro g ram o peratio n is co mpleted, system can still read arra y data in any address
e xcept the sectors to be erased
The device needs to issue reset co mmand to enable read arra y operatio n again in order to arbitrarily read the data in
the arra y in the following two situatio ns:
1. In pro gram o r erase o peratio n, the programming o r erasing f ailure causes Q5 to go high.
2. The device is in auto select mo de or CFI mo d e.
In the two situations above, if reset command is not issued, the device is not in read array mode and system must
issue reset co mmand befo re reading array data.
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MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
RESET# OPERA TION
Driving RESET# pin low fo r a period more than Trp will reset the device back to read mo de. If the device is in pro gram
o r erase o peratio n, the reset operation will take at mo st a perio d o f Tready1 fo r the device to return to read array mo de.
Bef o re the de vice returns to read array mo d e, the R Y/BY# pin remains low (b usy status).
When RESET# pin is held at GND±0.3V, the device consumes standby current(Isb).However, device draws larger
current if RESET# pin is held at Vil b ut not within GND±0.3V.
It is reco mmended that the system to tie its reset signal to RESET# pin of flash memory, so that the flash memo ry will
be reset during system reset and allows system to read bo ot co de fro m flash memo ry.
SECTOR PROTECT OPERA TION
When a sector is protected, program or erase operation will be disabled on that protected sector. MX29LV400C/
MX29LV800C/MX29L V160C T/B pro vides two methods fo r sector protection.
Once the secto r is pro tected, the sector remains pro tected until next chip unprotect, o r is tempo rarily unpro tected by
asserting RESET# pin at Vhv . Ref er to tempo rary secto r unpro tect o peratio n f o r further details.
The first method is by applying Vhv on RESET# pin. Refer to Figure 12 for timing diagram and Figure 13 for the
algo rithm for this metho d.
The o ther method is asserting Vhv o n A9 and OE# pins, with A6 and CE# at Vil. The pro tection operation begins at the
f alling edge o f WE# and terminates at the rising edge. Co ntact Macro nix f o r details.
CHIP UNPROTECT OPERA TION
MX29LV400C/MX29L V800C/MX29LV160C T/B pro vides two metho ds for chip unprotect. The chip unpro tect operation
unpro tects all sectors within the device. It is reco mmended to protect all sectors befo re activating chip unpro tect mode.
All secto rs are unpro tected when shipped fro m the facto ry .
The first metho d is by applying Vhv o n RESET# pin. Refer to Figure 12 fo r timing diagram and Figure 13 fo r algorithm
o f the operation.
The other method is asserting Vhv on A9 and OE# pins, with A6 at Vih and CE# at Vil (see Table 2). The unprotect
o peratio n begins at the f alling edge o f WE# and terminates at the rising edge. Co ntact Macro nix fo r details.
TEMPORAR Y SECTOR UNPROTECT OPERA TION
System can apply RESET# pin at Vhv to place the device in temporar y unprotect mode. In this mode, previously
pro tected sectors can be programmed o r erased just as it is unpro tected. The devices returns to normal o peration once
Vhv is remo v ed fro m RESET# pin and previo usly pro tected secto rs are again pro tected.
20
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
AUTOMATIC SELECT OPERA TION
When the device is in Read array mode, erase-suspended read arra y mo de or CFI mo de, user can issue read silico n
ID command to enter read silicon ID mode. After entering read silicon ID mode, user can query several silicon IDs
continuously and does not need to issue read silicon ID mode again. When A0 is Low, device will output Macronix
Manufacture ID C2. When A0 is high, device will o utput Device ID. In read silicon ID mo de, issuing reset command will
reset device back to read array mode o r erase-suspended read array mo de.
Ano ther way to enter read silico n ID is to apply high vo ltage o n A9 pin with CE#, OE#, A6 and A1 at Vil. While the high
v o ltage o f A9 pin is discharged, device will automatically leav e read silico n ID mo de and go back to read arra y mo de
or erase-suspended read arra y mode. When A0 is Low, device will output Macro nix Manuf acture ID C2. When A0 is
high, de vice will output De vice ID.
VERIFY SECT OR PROTECT ST ATUS OPERA TION
MX29LV400C/MX29LV800C/MX29LV160C T/B pro vides hardware secto r protection against Program and Erase o p-
eration for protected sectors. The sector protect status can be read through Sector Protect Verify command. This
metho d requires Vhv on A9 pin, Vih on WE# and A1 pins, Vil on CE#, OE#, A6 and A0 pins, and sector address on A12
to Am pins. If the read o ut data is 01H, the designated secto r is pro tected. Oppo sitely, if the read o ut data is 00H, the
designated secto r is no t protected.
DA T A PROTECTION
To avoid accidental erasure or programming o f the device, the de vice is automatically reset to read array mode during
pow er up. Besides, o nly after successful co mpletio n o f the specified co mmand sets will the de vice begin its erase o r
program o peration.
Other features to pro tect the data fro m accidental alternation are described as fo llowed.
LOW VCC WRITE INHIBIT
The device refuses to accept any wr ite command when Vcc is less than 1.4V. This prevents data from spuriously
altered. The device automatically resets itself when Vcc is lo w er than 1.4V and write cycles are ignored until Vcc is
greater than 1.4V. System must provide pro per signals o n contro l pins after Vcc is larger than 1.4V to a v o id uninten-
tio nal program o r erase o peration
WRITE PULSE "GLITCH" PRO TECTION
CE#, WE#, OE# pulses sho rter than 5ns are treated as glitches and will no t be regarded as an effectiv e write cycle.
LOGICAL INHIBIT
A valid write cycle requires both CE# and WE# at Vil with OE# at Vih. Write cycle is igno red when either CE# at Vih,
WE# a Vih, or OE# at Vil.
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MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
POWER-UP SEQUENCE
Upo n power up, MX29L V400C/MX29LV800C/MX29LV160C T/B is placed in read array mode. Furthermo re, program o r
erase o peratio n will begin o nly after successful completio n o f specified command sequences.
POWER-UP WRITE INHIBIT
When WE#, CE# is held at Vil and OE# is held at Vih during power up , the de vice ignores the first command on the
rising edge of WE#.
PO WER SUPPLY DECOUPLING
A 0.1uF capacito r sho uld be connected between the Vcc and GND to reduce the no ise effect.
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
T ABLE 3. MX29L V400C/MX29LV800C/MX29LV160C T/B COMMAND DEFINITIONS
Notes:
1. Device ID : MX29LV400CT: 22B9; MX29LV400CB: 22BA.
MX29LV800CT: 22DA; MX29L V800CB: 225B.
MX29LV160CT: 22C4; MX29LV160CB: 2249.
2. For sector protect verify result, XX00H/00H means sector is not protected, XX01H/01H means sector has been
protected.
3. Secto r Protect co mmand is valid during Vhv at RESET# pin, Vih at A1 pin and Vil at A0, A6 pins. The last Bus cyc
is for protect verify.
Hex Word Byte Word Byte Word Byte Word/Byte Word/Byte
1s t B us Cyc Addr 555 A A A 555 AA A 55 A A XXX XXX
Data AA AA AA AA 98 98 B0 30
2nd B us Cy c A ddr 2A A 555 2A A 555
Data 55 55 55 55
3rd Bus Cy c A ddr 555 A A A 555 A AA
Data 80 80 80 80
4th B us Cy c A ddr 555 A A A 555 A AA
Data AA AA AA AA
5th B us Cy c A ddr 2AA 555 2A A 555
Data 55 55 55 55
6th B us Cy c A ddr 555 A A A S ec t or S ec t or
Data 10 10 30 30
CFI Read Erase
Suspend Erase
Resume
Com m and Chip E ras e S ec t or E ras e
Hex Word Byte Word Byte Word Byte Word Byte
1s t B us Cy c A ddr A ddr X X X 555 A A A 5 55 A A A 555 A A A 555 A A A
Data Data F0 AA AA AA AA AA AA AA AA
2nd B us Cy c A ddr 2A A 555 2A A 555 2A A 555 2A A 555
Data 55 55 55 55 55 55 55 55
3rd B us Cy c A dd r 555 A A A 555 A A A 555 AA A 555 A A A
Data 90 90 90 90 90 90 A0 A0
4th B us Cy c A dd r X 00 X 00 X 01 X 02 (Sector)
X02 (Sector)
X04 Addr Addr
Data C2 C2 ID ID 00/01 00/01 Data Data
5th B us Cy c A ddr
Data
6th B us Cy c A ddr
Data
ProgramCommand Read
Mode Reset
Mode Manifacture ID De vi c e ID S ec tor P rotec t
Verify
Automatic Select
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
RESET
In the f ollowing situations, e x ecuting reset command will reset de vice bac k to read arra y mode:
•Amo ng erase command sequence (before the full command set is completed)
•Secto r erase time-o ut perio d
•Erase fail (while Q5 is high)
•Among program command sequence (before the full command set is completed, erase-suspended program in-
cluded)
•Pro gram fail (while Q5 is high, and erase-suspended pro gram fail is included)
•Read silico n ID mo de
•Secto r protect v erify
•CFI mo de
While de vice is at the status o f prog ram fail o r erase f ail (Q5 is high), user must issue reset co mmand to reset device
back to read array mode. While the device is in read silicon ID mode, sector protect verify or CFI mode, user must
issue reset command to reset de vice back to read arra y mode.
When the device is in the progress o f programming (not program fail) o r erasing (no t erase fail), device will ignore reset
command.
AUTOMA TIC SELECT COMMAND SEQUENCE
Automatic Select mode is used to access the manufacturer ID, device ID and to ver ify whether or not a sector is
protected. The automatic select mode has four command cycles. The first two are unlock cycles, and followed by a
specific command. The fourth cycle is a no rmal read cycle, and user can read at an y address an y n umber of times
witho ut entering another command sequence. The reset co mmand is necessary to exit the Auto matic Select mode and
back to read array. The f ollowing tab le shows the identificatio n code with co rrespo nding address.
Address Data (Hex) Representation
Manufacturer ID W o rd X00 00C2
Byte X00 C2
Device ID W or d X01 ID To p/Bo tto m Bo o t Sector
Byte X02 ID Top/Bottom Boo t Sector
Secto r Pro tect Verify W or d (Secto r address) X 02 00/01 Unprotected/protected
Byte (Secto r address) X 04 00/01 Unprotected/protected
There is an alternative metho d to that shown in Table 2, which is intended fo r EPROM pro grammers and requires Vhv
o n address bit A9.
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
AUTOMA TIC PROGRAMMING
The MX29LV400C/MX29L V800C/MX29LV160C T/B can provide the user program function by the form o f Byte-Mode or
Word-Mode. As long as the users enter the right cycle defined in the Table.3 (including 2 unlock cycles and A0H), any
data user inputs will auto matically be pro grammed into the arra y .
Once the pro gram function is executed, the internal write state co ntroller will automatically ex ecute the algorithms and
timings necessary fo r pro gram and verificatio n, which includes generating suitable pro gram pulse, verifying whether
the threshold vo ltage of the pro grammed cell is high enough and repeating the program pulse if any o f the cells do es not
pass verificatio n. Meanwhile, the internal co ntro l will pro hibit the pro gramming to cells that pass verificatio n while the
other cells fail in verification in order to avoid over-programming. With the inter nal write state controller, the device
requires the user to write the pro gram co mmand and data only .
Pro gramming will o nly change the bit status from "1" to "0". That is to say, it is impossible to co nvert the bit status fro m
"0" to "1" by programming. Meanwhile, the internal write verification only detects the errors of the "1" that is not
successfully pro grammed to "0".
Any co mmand written to the device during programming will be igno red except hardware reset, which will terminate the
pro gram o peration after a perio d of time no mo re than Tready1. When the embedded program algo rithm is complete o r
the pro gram o peratio n is terminated by hardware reset, the device will return to the reading arra y data mode.
The typical chip pro gram time at room temperature o f the MX29LV400C/MX29LV800C/MX29L V160C T/B is less than
36 seco nds.
When the embedded program o peration is on going, user can confirm if the embedded o peration is finished or no t by the
fo llowing metho ds:
Status Q7 Q6 Q5 RY/BY#*2
In progress*1 Q7# to gging 0 0
Finished Q7 Stop toggling 0 1
Exceed time limit Q7# Toggling 1 0
*1: The status "in pro gress" means both pro gram mo de and erase-suspended pro gram mo de.
*2: R Y/BY# is an open drain o utput pin and sho uld be weakly co nnected to VDD thro ugh a pull-up resisto r .
*3: When an attempt is made to program a protected sector , Q7 will output its complement data or Q6 continues to
toggle f or about 1us or less and the de vice returns to read array state without programing the data in the protected
sector.
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MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
SECTOR ERASE
Secto r Erase is to erase all the data in a secto r with "1" and "0" as all "1". It requires six co mmand cycles to issue. The
first two cycles are "unlock cycles", the third o ne is a configuratio n cycle, the f o urth and fifth are also "unlo ck cycles"
and the sixth cycle is the secto r erase command. After the secto r erase co mmand sequence is issued, there is a time-
o ut period of 50us counted internally . During the time-out perio d, additional secto r address and sector erase command
can be written multiply. Once user enters ano ther sector erase co mmand, the time-o ut perio d of 50us is reco unted. If
user enters any co mmand o ther than sector eras o r erase suspend during time-o ut perio d, the erase command wo uld
be abor ted and the device is reset to read array condition. The number of sectors could be from one sector to all
secto rs. After time-o ut perio d passing by, additional erase co mmand is no t accepted and erase embedded o peratio n
begins.
During sector erasing, all commands will no t be accepted except hardware reset and erase suspend and user can
check the status as chip erase.
When the embedded chip erase o peratio n is on go ing, user can confirm if the embedded operation is finished or not by
the fo llowing methods:
Status Q7 Q6 Q5 Q2 RY/BY#
In pro gress 0 To gging 0 Toggling 0
Finished 1 Stop toggling 0 1 1
Exceed time limit 0 Toggling 1 Toggling 0
CHIP ERASE
Chip Erase is to erase all the data with "1" and "0" as all "1". It needs 6 cycles to write the actio n in, and the first two
cycles are "unlo ck" cycles , the third o ne is a co nfiguration cycle, the fourth and fifth are also "unlo ck" cycles , and the
sixth cycle is the chip erase operatio n.
During chip erasing, all the co mmands will not be accepted except hardware reset or the wo rking vo ltage is too low that
chip erase will be interrupted. After Chip Erase, the chip will return to the state o f Read Arra y.
*1: The status Q3 is the time-out period indicator. When Q3=0, the device is in time-out period and is acceptible to
ano ther secto r address to be erased. When Q3=1, the de vice is in erase o peratio n and o nly er ase suspend is valid.
*2: R Y/BY# is open drain o utput pin and sho uld be weakly co nnected to VDD thro ugh a pull-up resistor.
*3: When an attempt is made to erase a protected sector, Q7 will o utput its complement data or Q6 continues to to ggle
f o r 100us o r less and the de vice returned to read arra y status witho ut erasing the data in the pro tected secto r .
When the embedded erase o peration is on going, user can confirm if the embedded o peratio n is finished or no t by the
fo llowing metho ds:
Status Q7 Q6 Q5 Q3 Q2 RY/BY#*2
Time-out period 0 To gging 0 0 Toggling 0
In pro gress 0 To gging 0 1 Toggling 0
Finished 1 Sto p toggling 0 1 1 1
Exceed time limit 0 Toggling 1 1 Toggling 0
26
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
When the device has suspended er asing, user can e x ecute the co mmand sets e xcept secto r erase and chip erase ,
such as read silico n ID , secto r pro tect v erify, pro gram, CFI query and erase resume.
SECTOR ERASE RESUME
Secto r erase resume co mmand is valid o nly when the device is in erase suspend state. After erase resume, user can
issue another erase suspend command, but there should be a 400uS interval between er ase resume and the ne xt
erase suspend. If user issue infinite suspend-resume loop, or suspend-resume exceeds 1024 times, the time for
erasing will increase.
Status Q7 Q6 Q5 Q3 Q2 RY/BY#
Erase suspend read in erase suspended secto r 1 No to ggle 0 N/A toggle 1
Erase suspend read in no n-erase suspended secto r Data Data Data Data Data 1
Erase suspend pro gram in no n-erase suspended sector Q 7# To ggle 0 N/A N/A 0
SECTOR ERASE SUSPEND
During sector erasure, secto r erase suspend is the o nly valid co mmand. If user issue erase suspend co mmand in the
time-o ut perio d o f sector erasure, device time-o ut perio d will be o ver immediately and the device will go back to erase-
suspended read array mo de. If user issue erase suspend co mmand during the sector erase is being o perated, device
will suspend the o ngo ing erase o peratio n, and after the Tready1 (<=20us) suspend finishes and the de vice will enter
erase-suspended read array mode. User can judge if the device has finished erase suspend thro ugh Q6, Q7, and RY/
BY#.
After device has entered erase-suspended read array mo de, user can read other sectors not at erase suspend by the
speed o f Taa; while reading the secto r in erase-suspend mo de, device will o utput its status. User can use Q6 and Q2
to judge the secto r is erasing or the erase is suspended.
27
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
T able 4-1. CFI mode: Identification Data V alues
(All values in these tables are in hexadecimal)
T able 4-2. CFI Mode: System Interface Data V alues
QUER Y COMMAND AND COMMON FLASH INTERFACE (CFI) MODE
MX29L V400C/MX29LV800C/MX29L V160C T/B features CFI mo de. Host system can retrieve the o perating character-
istics, structure and vendor-specified info rmatio n such as identifying inf o rmatio n, memo ry size , byte/wo rd co nfigura-
tion, operating voltages and timing infor mation of this device by CFI mode. The device enters the CFI Query mode
when the system writes the CFI Query command, 98H, to address 55H/AAH (depending on Wo rd/Byte mo de) any time
the device is ready to read array data. The system can read CFI info rmation at the addresses given in T able 4. A reset
command is required to exit CFI mo de and go back to ready array mo de or erase suspend mo de. The system can write
the CFI Query command only when the device is in read mode, erase suspend, standby mode or automatic select
mode.
Description Address (h) Address (h) Data (h)
(Word Mode) (Byte Mode)
Query-unique ASCII string "QRY" 1 0 2 0 0051
11 22 0052
12 24 0059
Primary vendor command set and control interface ID code 1 3 2 6 0002
14 28 0000
Address for primary algorithm extended query table 1 5 2A 0040
16 2C 0000
Alternate vendor command set and control interface ID code 1 7 2E 0000
18 30 0000
Address for alternate algorithm extended query table 19 32 0000
1A 34 0000
Description Address (h) Address (h) Data (h)
(Word Mode) (Byte Mode)
Vcc supply minimum program/erase voltage 1B 3 6 0027
Vcc supply maximum program/erase voltage 1 C 38 0036
VPP supply minimum program/erase voltage 1 D 3A 0000
VPP supply maximum program/erase voltage 1E 3 C 0000
Typical timeout per single word/byte write, 2n uS 1F 3E 0004
Typical timeout for maximum-size buffer write, 2n uS 2 0 40 0000
Typical timeout per individual block erase, 2n mS 2 1 42 000A
Typical timeout for full chip erase, 2n mS 2 2 44 0000
Maximum timeout for word/byte write, 2n times typical 2 3 4 6 0005
Maximum timeout for buffer write, 2n times typical 24 48 0000
Maximum timeout per individual block erase, 2n times typical 2 5 4A 0004
Maximum timeout for chip erase, 2n times typical 26 4C 0000
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P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
T able 4-3. CFI Mode: Device Geometry Data V alues
Description Address (h) Address (h) Data (h)
(Word Mode) (Byte Mode)
Device size = 2n in number of bytes (MX29LV400C) 2 7 4E 0013
Device size = 2n in number of bytes (MX29LV800C) 2 7 4E 0014
Device size = 2n in number of bytes (MX29LV160C) 2 7 4E 0015
Flash device interface description (02=asynchronous x8/x16) 2 8 50 0002
29 52 0000
Maximum number of bytes in buffer write = 2n (not support) 2 A 5 4 0000
2B 56 0000
Number of erase regions within device 2 C 5 8 0004
Index for Erase Bank Area 1 2D 5 A 0000
[2E,2D] = # of same-size sectors in region 1-1 2E 5C 0000
[30, 2F] = sector size in multiples of 256-bytes 2F 5E 0040
30 60 0000
Index for Erase Bank Area 2 31 6 2 0001
32 64 0000
33 66 0020
34 68 0000
Index for Erase Bank Area 3 35 6A 0000
36 6C 0000
37 6E 0080
38 70 0000
Index for Erase Bank Area 4 (for MX29LV400C) 3 9 7 2 0006
Index for Erase Bank Area 4 (for MX29LV800C) 3 9 7 2 000E
Index for Erase Bank Area 4 (for MX29LV160C) 3 9 7 2 001E
3A 74 0000
3B 76 0000
3C 78 0001
29
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
T able 4-4. CFI Mode: Primary Vendor-Specific Extended Query Data V alues
Description Address (h) Address (h) Data (h)
(Word Mode) (Byte Mode)
Query - Primary extended table, unique ASCII string, PRI 4 0 8 0 0050
41 82 0052
42 84 0049
Major version number, ASCII 4 3 8 6 0031
Minor version number, ASCII 4 4 8 8 0030
Unlock recognizes address (0= recognize, 1= don't recognize) 4 5 8A 0000
Erase suspend (2= to both read and program) 4 6 8 C 0002
Sector protect (N= # of sectors/group) 4 7 8E 0001
Temporary sector unprotect (1=supported) 48 90 0001
Sector protect/Chip unprotect scheme 49 92 0004
Simultaneous R/W operation (0=not supported) 4A 94 0000
Burst mode (0=not supported) 4B 96 0000
Page mode (0=not supported) 4C 98 0000
30
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
ABSOLUTE MAXIMUM STRESS RATINGS
Surrounding Temperature with Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to +125oC
Storage Temperature . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC
V oltage Range
Vcc . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +4.0 V
RESET#, A9 and OE# . .. . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +12.5 V
The other pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5 V to Vcc +0.5 V
Output Short Circuit Current (less than o ne second) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200 mA
OPERATING TEMPERATURE AND VOLTAGE
Commercial (C) Grade
Surrounding Temperature (TA ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial (I) Grade
Surrounding Temperature (TA ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
VCC Supply Voltages
VCC range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.7 V to 3.6 V
31
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
DC CHARACTERISTICS
Symbol Description Min Typ Max Remark
Iilk Input Leak ± 1.0uA
Iilk9 A9 Leak 35uA A9=12.5V
Iolk Output Leak ± 1.0uA
Icr1 Read Current(5MHz) 7mA 12mA CE#=Vil,
OE#=Vih
Icr2 Read Current(1MHz) 2mA 4mA CE#=Vil,
OE#=Vih
Icw Write Current 15mA 30mA CE#=Vil,
OE#=Vih,
WE#=Vil
Isb Standby Current 0.2uA 5uA Vcc=Vcc max,
other pin disable
Isbr Reset Current 0.2uA 5uA Vcc=Vccmax,
Reset# enable,
other pin disable
Isbs Sleep Mo de Current 0.2uA 5uA
Vil Input Low V oltage -0.5V 0.8V
Vih Input High V oltage 0.7xVcc Vcc+0.3V
Vhv V ery High V oltage fo r hardware 11.5V 12.5V
Protect/Unprotect/Accelerated
Program/Auto Select/T empo rary
Unprotect
V o l Output Low V o ltage 0.45V Iol=4.0mA
V oh1 Ouput High V oltage 0.85xVcc Ioh1=-2mA
V oh2 Ouput High V oltage Vcc-0.4V Io h2=-100uA
32
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
SWITCHING TEST CIRCUITS
Test Conditio n
Output Lo ad : 1 TTL gate
Output Lo ad Capacitance,CL : 30pF(70nS)/100pF(90nS)
Rise/Fall Times : 5nS
In/Out reference levels :1.5V
SWITCHING TEST WAVEFORMS
1.5V 1.5V
Test Points
3.0V
0.0V OUTPUT
INPUT
R1=6.2K ohm
R2=1.6K ohm
TESTED DEVICE
DIODES=IN3064
OR EQUIVALENT
CL
R1
Vcc
0.1uF R2 +3.3V
33
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
AC CHARACTERISTICS
Symbol Description Min Typ Max Unit
Taa V alid data o utput after address 45/55 (1) nS
70/90
Tce V alid data o utput after CE# low 45/55 (1) nS
70/90
Toe V alid data o utput after OE# low 3 0 n S
Tdf Data o utput floating after OE# high 2 5 nS
Toh Output ho ld time fro m the earliest rising edge o f address, 0 nS
CE#, OE#
Trc Read perio d time 45/55 (1) nS
70/90
Twc Write perio d time 70/90 nS
Tcwc Command write period time 70/90 nS
Tas Address setup time 0 nS
Tah Address ho ld time 4 5 nS
Tds Data setup time 3 5 n S
Tdh Data hold time 0 nS
Tvcs Vcc setup time 50 uS
Tcs Chip enable Setup time 0 nS
Tch Chip enable ho ld time 0 nS
To es Output enable setup time 0 nS
Toeh Read 0 nS
To e h Output enable ho ld time To ggle & 10 nS
Data# Polling
Tws WE# setup time 0 nS
Twh WE# ho ld time 0 nS
Tcep CE# pulse width 3 5 nS
Tceph CE# pulse width high 3 0 nS
Twp WE# pulse width 3 5 nS
Twp h WE# pulse width high 3 0 nS
Tbusy Pro gr am/Erase activ e time by RY/BY# 90 n S
Tghwl Read reco ver time befo re write 0 nS
Tghel Read reco ver time bef ore write 0 nS
T whwh1 Program operation Byte 9 uS
T whwh1 Program operation Word 11 uS
Twhwh2 Sector Erase Operatio n 0.7 sec
Tbal Secto r Add ho ld time 5 0 uS
No tes: (1) 45nS o nly fo r MX29L V800C-45
34
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 1. COMMAND WRITE OPERA TION
Addresses
CE#
OE#
WE#
DIN
Tds
Tah
Data
Tdh
Tcs Tch
Tcwc
Twph
Twp
Toes
Tas
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
VA
V A: Valid Address
35
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
READ/RESET OPERATION
Figure 2. READ TIMING W A VEFORMS
Addresses
CE#
OE#
Taa
WE#
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Voh
Vol
HIGH Z HIGH Z
D ATA V alid
Toe
Toeh Tdf
Tce
Trc
Outputs
Toh
ADD V alid
36
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 3. RESET# TIMING W AVEFORM
AC CHARACTERISTICS
Item Description Setup Speed Unit
Trp 1 RESET# Pulse Width (During Auto matic Algo rithms) MIN 500 nS
Trp 2 RESET# Pulse Width (NOT During Automatic Algorithms) MIN 500 nS
Trh RESET# High Time Befo re Read MIN 5 0 nS
Trb 1 R Y/BY# Reco v ery Time (to CE#, OE# go low) M IN 0 n S
Trb 2 RY/BY# Reco very Time (to WE# go low) MIN 5 0 nS
Tready1 RESET# PIN Low (During Auto matic Algorithms) MAX 2 0 uS
to Read or Write
Tready2 RESET# PIN Low (NO T During Auto matic MAX 50 0 nS
Algo rithms) to Read or Write
Trh
Trb1
Trp2
Trp1
Tready2
Tready1
RY/BY#
CE#, OE#
RESET#
Reset Timing NOT during Automatic Algorithms
Reset Timing during Automatic Algorithms
RY/BY#
CE#, OE#
Trb2
WE#
RESET#
37
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
ERASE/PROGRAM OPERATION
Figure 4. AUTOMA TIC CHIP ERASE TIMING W A VEFORM
Twc
Address
OE#
CE#
55h
2AAh SA
10h
In
Progress Complete
VA VA
Tas Tah
SA: 555h for chip erase
Tghwl
Tch
Twp
Tds Tdh
Read Status
Last 2 Erase Command Cycle
Tbusy Trb
Tcs Twph
WE#
Data
RY/BY#
38
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLO WCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data AAH Address 555H
Write Data 80H Address 555H
YES
NO Data=FFh ?
Write Data 10H Address 555H
Write Data 55H Address 2AAH
Data# Polling Algorithm or
Toggle Bit Algorithm
Auto Chip Erase Completed
39
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 6. AUTOMA TIC SECT OR ERASE TIMING W A VEFORM
Twc
Address
OE#
CE#
55h
2AAh Sector
Address 1
Sector
Address 0
30h
In
Progress Complete
VA VA
30h
Sector
Address n
Tas
Tah
Tbal
Tghwl
Tch
Twp
Tds Tdh
Twhwh2
Read Status
Last 2 Erase Command Cycle
Tbusy Trb
Tcs Twph
WE#
Data
RY/BY#
30h
40
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 7. AUTOMA TIC SECT OR ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data AAH Address 555H
Write Data 80H Address 555H
Write Data 30H Sector Address
Write Data 55H Address 2AAH
Data# Polling Algorithm or
Toggle Bit Algorithm
Auto Sector Erase Completed
NO
Last Sector
to Erase
YES
YES
NO
Data=FFh
41
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 8. ERASE SUSPEND/RESUME FLOWCHART
START
Write Data B0H
Toggle Bit checking Q6
not toggled
ERASE SUSPEND
YES
NO
Write Data 30H
Continue Erase
Reading or
Programming End
Read Array or
Program
Another
Erase Suspend ? NO
YES
YES
NO
ERASE RESUME
42
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 9. AUTOMA TIC PROGRAM TIMING WA VEFORMS
Address
OE#
CE#
A0h
555h PA
PD Status DOUT
VA VA
Tas Tah
Tghwl
Tch
Twp
Tds Tdh
Twhwh1
Last 2 Read Status CycleLast 2 Program Command Cycle
Tbusy Trb
Tcs Twph
WE#
Data
RY/BY#
43
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 10. CE# CONTROLLED WRITE TIMING W A VEFORM
Address
OE#
CE#
A0h
555h PA
PD Status DOUT
VA VA
Tas Tah
Tghwl
Tcep
Tds Tdh
Twhwh1 or Twhwh2
Tbusy Trb
Tceph
WE#
Data
RY/BY#
44
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 11. AUTOMA TIC PROGRAMMING ALGORITHM FLO WCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Program Data/Address
Write Data A0H Address 555H
YES
Read Again Data:
Program Data?
YES
Auto Program Completed
Data# Polling Algorithm or
Toggle Bit Algorithm
next address
Last Word to be
Programed
No
No
45
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
SECTOR PROTECT/CHIP UNPROTECT
Figure 12. Sector Protect/Chip Unprotect Waveform (RESET# Contr ol)
150uS: Sector Protect
15mS: Chip Unprotect
1us
Vhv
Vih
Data
SA, A6
A1, A0
CE#
WE#
OE#
VA VA VA
Status
VA: valid address
40h60h60h
Verification
RESET#
46
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 13-1. IN-SYSTEM SECTOR PROTECT WITH RESET#=Vhv
START
Retry count=0
RESET#=Vhv
Wait 1us
Write Sector Address
with [A6,A1,A0]:[0,1,0]
data: 60h
Write Sector Address
with [A6,A1,A0]:[0,1,0]
data: 40h
Read at Sector Address
with [A6,A1,A0]:[0,1,0]
Wait 150us
Reset
PLSCNT=1
Temporary Unprotect Mode
RESET#=Vih
Write RESET CMD
Sector Protect Done
Device fail
Temporary Unprotect Mode
Retry Count +1
First CMD=60h?
Data=01h?
Retry Count=25?
Yes
YesYes
Yes
No
No
No
No
Protect another
sector?
47
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 13-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv
Write [A6,A1,A0]:[1,1,0]
data: 60h
Write [A6,A1,A0]:[1,1,0]
data: 40h
Read [A6,A1,A0]:[1,1,0]
Wait 15ms
Temporary Unprotect
Write reset CMD
Chip Unprotect Done
Retry Count +1
Device fail
All sectors
protected?
Data=00h?
Retry Count=1000?
Yes
Yes
No
No
Yes
Protect All Sectors
START
Retry count=0
RESET#=Vhv
Wait 1us
Temporary Unprotect
First CMD=60h?
Yes
No
No
48
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 14. TEMPORARY SECTOR UNPROTECT W AVEFORMS
T able 5. TEMPORARY SECTOR UNPRO TECT
Parameter Alt Description Condition Speed Unit
Trpvhh Tvidr RESET# Rise Time to Vhv and Vhv Fall Time to RESET# MIN 500 nS
Tvhhwl Trsp RESET# Vhv to WE# Low MIN 4 uS
RESET#
CE#
WE#
RY/BY#
Trpvhh
12V
Vhv
0 or Vih Vil or Vih
Tvhhwl
Trpvhh
Program or Erase Command Sequence
49
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 15. TEMPORARY SECTOR UNPROTECT FLOWCHART
Start
Apply Reset# pin Vhv Volt
Enter Program or Erase Mode
(1) Remove Vhv Volt from Reset#
(2) RESET# = Vih
Completed Temporary Sector
Unprotected Mode
Mode Operation Completed
Notes:
1. Temporary unprotect all pro tected sectors Vhv=11.5~12.5V.
2. After leaving tempo rary unpro tect mode, the previo usly pro tected sectors are again pro tected.
50
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 16. SILICON ID READ TIMING W AVEFORM
Taa
Tce
Taa
Toe
Toh Toh
Tdf
DATA OUT
C2H A7H (TOP boot)
A8H (Bottom boot)
Vhv
Vih
Vil
A9
ADD
CE#
A1
OE#
WE#
A0
DATA OUT
DATA
Q0-Q7
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
51
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
WRITE OPERATION STATUS
Figure 17. DA T A# POLLING TIMING W A VEFORMS (DURING A UTOMA TIC ALGORITHMS)
Tdf
Tce
Tch
Toe
Toeh
Toh
CE#
OE#
WE#
Q7
Q0-Q6
RY/BY#
Tbusy
Status Data Status Data
Status Data Complement True Valid Data
Taa
Trc
Address
VAVA
High Z
High Z
Valid DataTrue
52
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 18. Data# P olling Algorithm
Read Q7~Q0 at valid address
(Note 1)
Read Q7~Q0 at valid address
Start
Q7 = Data# ?
Q5 = 1 ?
Q7 = Data# ?
(Note 2)
FAIL Pass
No
No
No
Yes
Yes
Yes
Notes:
1 . F or pro gramming, valid address meas pro gram address.
F o r erasing, valid address meas er ase secto rs address.
2. Q7 sho uld be rechec ked ev en Q5="1" because Q7 ma y change simultaneo usly with Q5.
53
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 19. T OGGLE BIT TIMING W A VEFORMS (DURING AUTOMA TIC ALGORITHMS)
Tdf
Tce
Tch
Toe
Toeh
Taa
Trc
Toh
Address
CE#
OE#
WE#
Q6/Q2
RY/BY#
Tbusy
Valid Status
(first read)
Valid Status
(second read) (stops toggling)
Valid Data
VA VA
VA
VA : Valid Address
VA
Valid Data
54
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 20. Toggle Bit Algorithm
Notes:
1. Read to ggle bit twice to determine whether or no t it is to ggling.
2. Recheck toggle bit because it may stop to ggling as Q5 changes to "1".
Read Q7-Q0 Twice
Q5 = 1?
Read Q7~Q0 Twice
PGM/ERS fail
Write Reset CMD PGM/ERS Complete
Q6 Toggle ?
Q6 Toggle ?
NO
(Note 1)
YES
NO
NO
YES
YES
Start
55
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
Figure 21. BYTE# TIMING W AVEFORM FOR READ OPERATIONS (BYTE# switching fr om byte mode to wor d
mode)
AC CHARACTERISTICS
WORD/BYTE CONFIGURA TION (BYTE#)
Parameter Description Speed Options Unit
-70 -90
Telfl/Telfh CE# to BYTE# fro m L/H MAX 5 5 nS
Tflqz BYTE# from L to Output Hiz MAX 25 3 0 nS
Tfhq v BYTE# from H to Output Active MIN 70 90 nS
Tfhqv
Telfh
DOUT
(Q0-Q7) DOUT
(Q0-Q14)
VA DOUT
(Q15)
CE#
OE#
BYTE#
Q0~Q14
Q15/A-1
56
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
RECOMMENDED OPERATING CONDITIONS
At Device Power-Up
AC timing illustrated in Figure A is reco mmended fo r the supply v o ltages and the co ntro l signals at device po wer-up.
If the timing in the figure is igno red, the device may not o perate correctly.
Figure A. AC Timing at Device P ower-Up
Symbol Parameter Min. Max. Unit
Tvr Vcc Rise Time 20 500000 uS/V
Tr Input Signal Rise Time 2 0 uS/V
Tf Input Signal F all Time 2 0 uS/V
Vcc
ADDRESS
CE#
WE#
OE#
DATA
Tvr
Taa
Tr or Tf Tr or Tf
Tce
Tf
Vcc(min)
GND
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Voh High Z
Vol
WP#/ACC
Valid
Ouput
Valid
Address
Tvcs
Tr
Toe
Tf Tr
57
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MIN. MAX.
Input Voltage voltage difference with GND on all pins except I/O pins -1.0V 12.5V
Input Voltage voltage difference with GND on all I/O pins -1.0V Vcc + 1.0V
Vcc Current -100mA +100mA
All pins included except Vcc. Test conditions: Vcc = 3.0V, one pin per testing
LIMITS
PARAMETER MIN. TYP. MAX. UNITS
Chip Erase Time MX29LV400C 4 32 sec
MX29LV800C 8 32 sec
MX29LV160C 15 32 sec
Sector Erase Time 0. 7 1 5 sec
Erase/Program Cycles 100,000 Cycles
Chip Programming Time MX29LV400C Byte Mode 4.5 13.5 sec
Word Mode 3 9 sec
MX29LV800C Byte Mode 9 2 7 sec
Word Mode 5.8 17 sec
MX29LV160C Byte Mode 1 8 54 sec
Word Mode 12 36 sec
Accelerated Byte/Word Program Time 7 210 uS
Word Program Time 1 1 360 uS
Byte Programming Time 9 300 uS
LATCH-UP CHARACTERISTICS
ERASE AND PROGRAMMING PERFORMANCE
Parameter Symbol Parameter Description Test Set TYP MAX UNIT
CIN2 Control Pin Capacitance VIN=0 7.5 9 pF
COUT Output Capacitance VOUT=0 8.5 1 2 pF
CIN Input Capacitance VIN=0 6 7.5 pF
TSOP PIN CAPACITANCE
58
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
ORDERING INFORMATION
MX29LV400C T/B
PART NO. ACCESS TIME OPERA TING CURRENT ST ANDBY CURRENT PACKA GE
(ns) MAX.(mA) MAX.(uA)
MX29LV400CTMC-55R 5 5 30 5 44 Pin SOP
MX29LV400CBMC-55R 55 3 0 5 44 Pin SOP
MX29LV400CTMC-70 7 0 3 0 5 44 Pin SOP
MX29LV400CBMC-70 7 0 3 0 5 44 Pin SOP
MX29LV400CTMC-90 9 0 3 0 5 44 Pin SOP
MX29LV400CBMC-90 9 0 3 0 5 44 Pin SOP
MX29LV400CTTC-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CBTC-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CTTC-70 70 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CBTC-70 7 0 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CTTC-90 90 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CBTC-90 9 0 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CTXBC-55R 5 5 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CBXBC-55R 5 5 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CTXBC-70 7 0 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CBXBC-70 70 3 0 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CTXBC-90 9 0 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CBXBC-90 90 3 0 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CTXEC-55R 5 5 30 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CBXEC-55R 5 5 30 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CTXEC-70 7 0 30 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CBXEC-70 70 3 0 5 48 Ball CSP
(ball size=0.4mm)
59
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
PART NO. ACCESS TIME OPERA TING CURRENT ST ANDBY CURRENT PACKA GE
(ns) MAX.(mA) MAX.(uA)
MX29LV400CTXEC-90 9 0 30 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CBXEC-90 90 3 0 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CTMI-55R 55 3 0 5 44 Pin SOP
MX29LV400CBMI-55R 5 5 3 0 5 44 Pin SOP
MX29LV400CTMI-70 7 0 30 5 44 Pin SOP
MX29LV400CBMI-70 7 0 30 5 44 Pin SOP
MX29LV400CTMI-90 9 0 30 5 44 Pin SOP
MX29LV400CBMI-90 9 0 30 5 44 Pin SOP
MX29LV400CTTI-55R 55 30 5 48 Pin TSOP
(Normal T ype)
MX29LV400CBTI-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CTTI-70 70 30 5 48 Pin TSOP
(Normal T ype)
MX29LV400CBTI-70 70 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CTTI-90 90 30 5 48 Pin TSOP
(Normal T ype)
MX29LV400CBTI-90 90 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV400CTXBI-55R 5 5 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CBXBI-55R 5 5 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CTXBI-70 7 0 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CBXBI-70 70 3 0 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CTXBI-90 9 0 30 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CBXBI-90 90 3 0 5 48 Ball CSP
(ball size=0.3mm)
MX29LV400CTXEI-55R 5 5 30 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CBXEI-55R 5 5 30 5 48 Ball CSP
(ball size=0.4mm)
60
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERATING ST ANDBY PACKAGE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV400CTXEI-70 70 30 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CBXEI-70 70 3 0 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CTXEI-90 90 30 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CBXEI-90 90 3 0 5 48 Ball CSP
(ball size=0.4mm)
MX29LV400CTMC-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV400CBMC-55Q 55 30 5 44 Pin SOP PB free
MX29LV400CTMC-70G 70 3 0 5 44 Pin SOP PB free
MX29LV400CBMC-70G 70 30 5 44 Pin SOP PB free
MX29LV400CTMC-90G 90 3 0 5 44 Pin SOP PB free
MX29LV400CBMC-90G 90 30 5 44 Pin SOP PB free
MX29LV400CTTC-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CBTC-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CTTC-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CBTC-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CTTC-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CBTC-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CTXBC-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CBXBC-55Q 55 30 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CTXBC-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CBXBC-70G 70 30 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CTXBC-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CBXBC-90G 90 30 5 48 Ball CSP PB free
(ball size=0.3mm)
61
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV400CTXEC-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CBXEC-55Q 55 30 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CTXEC-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CBXEC-70G 70 30 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CTXEC-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CBXEC-90G 90 30 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CTMI-55Q 55 30 5 44 Pin SOP PB free
MX29LV400CBMI-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV400CTMI-70G 70 30 5 44 Pin SOP PB free
MX29LV400CBMI-70G 70 3 0 5 44 Pin SOP PB free
MX29LV400CTMI-90G 90 30 5 44 Pin SOP PB free
MX29LV400CBMI-90G 90 3 0 5 44 Pin SOP PB free
MX29LV400CTTI-55Q 5 5 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CBTI-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CTTI-70G 7 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CBTI-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CTTI-90G 9 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CBTI-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV400CTXBI-55Q 55 30 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CBXBI-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CTXBI-70G 70 30 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CBXBI-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size=0.3mm)
62
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV400CTXBI-90G 90 30 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CBXBI-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size=0.3mm)
MX29LV400CTXEI-55Q 55 30 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CBXEI-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CTXEI-70G 70 30 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CBXEI-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CTXEI-90G 90 30 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CBXEI-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size=0.4mm)
MX29LV400CTXHI-55Q 55 30 5 48 Ball CSP PB free
(4 x 6 mm)
MX29LV400CBXHI-55Q 55 30 5 48 Ball CSP PB free
(4 x 6 mm)
MX29LV400CTXHI-70G 70 30 5 48 Ball CSP PB free
(4 x 6 mm)
MX29LV400CBXHI-70G 70 30 5 48 Ball CSP PB free
(4 x 6 mm)
MX29LV400CTGBI-70G 7 0 3 0 5 48 Ball XFLGA PB free
(4 x 6 x 0.5mm)
MX29LV400CBGBI-70G 70 30 5 48 Ball XFLGA PB free
(4 x 6 x 0.5mm)
63
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MX29LV800C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV800CTMC-55R 5 5 3 0 5 44 Pin SOP
MX29LV800CBMC-55R 55 3 0 5 44 Pin SOP
MX29LV800CTMC-70 7 0 3 0 5 44 Pin SOP
MX29LV800CBMC-70 7 0 3 0 5 44 Pin SOP
MX29LV800CTMC-90 9 0 3 0 5 44 Pin SOP
MX29LV800CBMC-90 9 0 3 0 5 44 Pin SOP
MX29LV800CTTC-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV800CBTC-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV800CTTC-70 70 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV800CBTC-70 70 30 5 48 Pin TSOP
(Normal T ype)
MX29LV800CTTC-90 90 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV800CBTC-90 90 30 5 48 Pin TSOP
(Normal T ype)
MX29LV800CTXBC-55R 5 5 3 0 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CBXBC-55R 5 5 3 0 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CTXBC-70 70 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CBXBC-70 7 0 3 0 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CTXBC-90 90 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CBXBC-90 9 0 3 0 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CTMI-55R 5 5 3 0 5 44 Pin SOP
MX29LV800CBMI-55R 55 30 5 44 Pin SOP
MX29LV800CTMI-70 7 0 30 5 44 Pin SOP
MX29LV800CBMI-70 7 0 30 5 44 Pin SOP
MX29LV800CTMI-90 9 0 30 5 44 Pin SOP
MX29LV800CBMI-90 9 0 30 5 44 Pin SOP
MX29LV800CTTI-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV800CBTI-55R 5 5 30 5 48 Pin TSOP
(Normal T ype)
MX29LV800CTTI-70 7 0 30 5 48 Pin TSOP
(Normal T ype)
MX29LV800CBTI-70 7 0 3 0 5 48 Pin TSOP
(Normal T ype)
64
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PA CKAGE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV800CTTI-90 9 0 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV800CBTI-90 9 0 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV800CTXBI-55R 55 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CBXBI-55R 55 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CTXBI-70 70 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CBXBI-70 70 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CTXBI-90 90 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CBXBI-90 90 30 5 48 Ball CSP
(Ball Size:0.3mm)
MX29LV800CTXEC-55R 5 5 3 0 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CBXEC-55R 5 5 3 0 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CTXEC-70 7 0 3 0 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CBXEC-70 7 0 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CTXEC-90 9 0 3 0 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CBXEC-90 9 0 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CTXEI-55R 55 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CBXEI-55R 55 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CTXEI-70 70 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CBXEI-70 70 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CTXEI-90 90 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CBXEI-90 90 30 5 48 Ball CSP
(Ball Size:0.4mm)
MX29LV800CTMC-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV800CBMC-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV800CTMC-70G 70 3 0 5 44 Pin SOP PB free
MX29LV800CBMC-70G 70 3 0 5 44 Pin SOP PB free
65
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV800CTMC-90G 90 3 0 5 44 Pin SOP PB free
MX29LV800CBMC-90G 90 30 5 44 Pin SOP PB free
MX29LV800CTTC-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CBTC-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CTTC-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CBTC-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CTTC-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CBTC-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CTXBC-55Q 5 5 3 0 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CBXBC-55Q 55 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CTXBC-70G 7 0 3 0 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CBXBC-70G 70 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CTXBC-90G 9 0 3 0 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CBXBC-90G 90 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CTMI-55Q 55 30 5 44 Pin SOP PB free
MX29LV800CBMI-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV800CTMI-70G 70 30 5 44 Pin SOP PB free
MX29LV800CBMI-70G 70 3 0 5 44 Pin SOP PB free
MX29LV800CTMI-90G 90 30 5 44 Pin SOP PB free
MX29LV800CBMI-90G 90 3 0 5 44 Pin SOP PB free
MX29LV800CTTI-55Q 5 5 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CBTI-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CTTI-70G 7 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CBTI-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CTTI-90G 9 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CBTI-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CTXBI-55Q 55 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
66
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PA CKAGE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV800CBXBI-55Q 5 5 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CTXBI-70G 70 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CBXBI-70G 7 0 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CTXBI-90G 90 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CBXBI-90G 9 0 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CTXEC-55Q 5 5 3 0 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CBXEC-55Q 5 5 3 0 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CTXEC-70G 7 0 3 0 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CBXEC-70G 7 0 3 0 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CTXEC-90G 9 0 3 0 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CBXEC-90G 9 0 3 0 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CTXEI-55Q 55 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CBXEI-55Q 5 5 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CTXEI-70G 70 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CBXEI-70G 7 0 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CTXEI-90G 90 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CBXEI-90G 9 0 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CTTI-45Q 4 5 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CBTI-45Q 4 5 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV800CTXBI-45Q 45 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CBXBI-45Q 4 5 30 5 48 Ball CSP PB free
(Ball Size:0.3mm)
MX29LV800CTXEI-45Q 45 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
MX29LV800CBXEI-45Q 4 5 30 5 48 Ball CSP PB free
(Ball Size:0.4mm)
67
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV800CTXHI-55R 55 30 5 48 Ball CSP
(4 x 6 mm)
MX29LV800CBXHI-55R 55 30 5 48 Ball CSP
(4 x 6 mm)
MX29LV800CTXHI-70G 70 30 5 48 Ball CSP PB free
(4 x 6 mm)
MX29LV800CBXHI-70G 70 30 5 48 Ball CSP PB free
(4 x 6 mm)
MX29LV800CTGBI-70G 7 0 3 0 5 48 Ball XFLGA PB free
(4 x 6 x 0.5mm)
MX29LV800CBGBI-70G 70 30 5 48 Ball XFLGA PB free
(4 x 6 x 0.5mm)
68
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV160CTMC-55R 5 5 3 0 5 44 Pin SOP
MX29LV160CBMC-55R 55 3 0 5 44 Pin SOP
MX29LV160CTMC-70 7 0 3 0 5 44 Pin SOP
MX29LV160CBMC-70 7 0 3 0 5 44 Pin SOP
MX29LV160CTMC-90 9 0 3 0 5 44 Pin SOP
MX29LV160CBMC-90 9 0 3 0 5 44 Pin SOP
MX29LV160CTMI-55R 5 5 3 0 5 44 Pin SOP
MX29LV160CBMI-55R 55 30 5 44 Pin SOP
MX29LV160CTMI-70 7 0 30 5 44 Pin SOP
MX29LV160CBMI-70 7 0 30 5 44 Pin SOP
MX29LV160CTMI-90 9 0 30 5 44 Pin SOP
MX29LV160CBMI-90 9 0 30 5 44 Pin SOP
MX29LV160CTTC-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV160CBTC-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV160CTTC-70 70 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV160CBTC-70 70 30 5 48 Pin TSOP
(Normal T ype)
MX29LV160CTTC-90 90 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV160CBTC-90 90 30 5 48 Pin TSOP
(Normal T ype)
MX29LV160CTTI-55R 5 5 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV160CBTI-55R 5 5 30 5 48 Pin TSOP
(Normal T ype)
MX29LV160CTTI-70 7 0 30 5 48 Pin TSOP
(Normal T ype)
MX29LV160CBTI-70 7 0 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV160CTTI-90 9 0 30 5 48 Pin TSOP
(Normal T ype)
MX29LV160CBTI-90 9 0 3 0 5 48 Pin TSOP
(Normal T ype)
MX29LV160CTXBC-55R 5 5 3 0 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CBXBC-55R 5 5 3 0 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CTXBC-70 70 30 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160C T/B
69
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV160CBXBC-70 7 0 3 0 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CTXBC-90 90 30 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CBXBC-90 9 0 3 0 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CTXBI-55R 55 30 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CBXBI-55R 55 30 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CTXBI-70 70 30 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CBXBI-70 70 3 0 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CTXBI-90 90 30 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CBXBI-90 90 3 0 5 48 Ball CSP
(ball size:0.3mm)
MX29LV160CTXEC-55R 5 5 3 0 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CBXEC-55R 5 5 3 0 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CTXEC-70 70 30 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CBXEC-70 7 0 3 0 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CTXEC-90 90 30 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CBXEC-90 9 0 3 0 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CTXEI-55R 55 30 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CBXEI-55R 55 30 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CTXEI-70 70 30 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CBXEI-70 70 3 0 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CTXEI-90 90 30 5 48 Ball CSP
(ball size:0.4mm)
MX29LV160CBXEI-90 90 3 0 5 48 Ball CSP
(ball size:0.4mm)
70
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PA CKAGE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV160CTMC-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV160CBMC-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV160CTMC-70G 70 3 0 5 44 Pin SOP PB free
MX29LV160CBMC-70G 70 3 0 5 44 Pin SOP PB free
MX29LV160CTMC-90G 90 3 0 5 44 Pin SOP PB free
MX29LV160CBMC-90G 90 3 0 5 44 Pin SOP PB free
MX29LV160CTMI-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV160CBMI-55Q 55 3 0 5 44 Pin SOP PB free
MX29LV160CTMI-70G 70 3 0 5 44 Pin SOP PB free
MX29LV160CBMI-70G 70 3 0 5 44 Pin SOP PB free
MX29LV160CTMI-90G 90 3 0 5 44 Pin SOP PB free
MX29LV160CBMI-90G 90 3 0 5 44 Pin SOP PB free
MX29LV160CTTC-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CBTC-55Q 5 5 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CTTC-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CBTC-70G 7 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CTTC-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CBTC-90G 9 0 3 0 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CTTI-55Q 5 5 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CBTI-55Q 5 5 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CTTI-70G 7 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CBTI-70G 7 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CTTI-90G 9 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CBTI-90G 9 0 30 5 48 Pin TSOP PB free
(Normal T ype)
MX29LV160CTXBC-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CBXBC-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CTXBC-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CBXBC-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
71
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
P ART NO. ACCESS OPERA TING ST ANDBY PACKA GE Remark
TIME (ns) Current MAX. (mA) Current MAX. (uA)
MX29LV160CTXBC-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CBXBC-90G 90 30 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CTXBI-55Q 55 30 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CBXBI-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CTXBI-70G 70 30 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CBXBI-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CTXBI-90G 90 30 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CBXBI-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size:0.3mm)
MX29LV160CTXEC-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CBXEC-55Q 55 30 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CTXEC-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CBXEC-70G 70 30 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CTXEC-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CBXEC-90G 90 30 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CTXEI-55Q 55 30 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CBXEI-55Q 5 5 3 0 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CTXEI-70G 70 30 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CBXEI-70G 7 0 3 0 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CTXEI-90G 90 30 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CBXEI-90G 9 0 3 0 5 48 Ball CSP PB free
(ball size:0.4mm)
MX29LV160CTGBI-70G 7 0 3 0 5 48 Ball XFLGA PB free
(4 x 6 x 0.5mm)
MX29LV160CBGBI-70G 70 30 5 48 Ball XFLGA PB free
(4 x 6 x 0.5mm)
72
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
PART NAME DESCRIPTION
MX 29 LV 70C T T C G
OPTION:
G: Lead-free package
R: Restricted Vcc (3.0V~3.6V)
Q: Restricted Vcc (3.0V~3.6V) with Lead-free package
blank: normal
SPEED:
55: 55nS
70: 70nS
90: 90nS
TEMPERATURE RANGE:
C: Commercial (0˚C to 70˚C)
I: Industrial (-40˚C to 85˚C)
PACKAGE:
M: SOP
T: TSOP
X: FBGA (CSP)
XH: WFBGA - 4 x 6 x 0.75mm, Pitch 0.5mm, 0.3mm Ball
GB: XFLGA - 4 x 6 x 0.5mm, Pitch 0.5mm, 0.25mm Ball
BOOT BLOCK TYPE:
T: Top Boot
B: Bottom Boot
REVISION:
C
DENSITY & MODE:
160: 16Mb, x8/x16 Boot Block
800: 8Mb, x8/x16 Boot Block
400: 4Mb, x8/x16 Boot Block
TYPE:
LV: 3V
DEVICE:
29:Flash
XB - 6 x 8 x 1.2mm, Pitch 0.8mm, 0.3mm Ball
XE - 6 x 8 x 1.3mm, Pitch 0.8mm, 0.4mm Ball
160
73
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
PACKAGE INFORMATION
74
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
75
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball CSP (for MX29LV400C/MX29LV800C/MX29LV160C TXBC/ TXBI/BXBC/BXBI)
76
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball CSP (for MX29LV400C/MX29LV800C/MX29LV160C TXEC/ TXEI/BXEC/BXEI)
77
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball CSP (for MX29LV400C/MX29L V800C TXHC/ TXHI/BXHC/BXHI)
78
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
48-Ball XFLGA (for MX29LV400C/MX29LV800C/MX29L V160C TGBI/BGBI)
79
P/N:PM1300 REV. 1.3, NOV. 06, 2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
REVISION HISTORY
Revision No. Description Page Date
1. 1 1. Data modification All AUG/17/2006
1.2 1. Added 48-ball XFLGA package information P4,7,9,62 SEP/19/2006
P67,71,72,78
1. 3 1. Added statement P80 NOV/06/2006
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MACRONIX INTERNATIONAL CO., LTD .
Headquarters:
TEL:+886-3-578-6688
FAX:+886-3-563-2888
Europe Office :
TEL:+32-2-456-8020
FAX:+32-2-456-8021
Hong Kong Office :
TEL:+86-512-6258-0888
FAX:+86-512-6258-6799
Japan Office :
Kawasaki Office :
TEL:+81-44-246-9100
FAX:+81-44-246-9105
Technical Support Center :
TEL:+81-44-246-9875
FAX:+81-44-246-9951
Singapore Office :
TEL:+65-6346-5505
FAX:+65-6348-8096
Taipei Office :
TEL:+886-2-2509-3300
FAX:+886-2-2509-2200
MACRONIX AMERICA, INC.
TEL:+1-408-262-8887
FAX:+1-408-262-8810
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
Macro nix's products are not designed, manufactured, or intended for use fo r any high risk applications in which the
failure of a single component could cause death, personal injury, severe physical damage, or other substantial
harm to persons or property, such as life-support systems, high temperature automotive, medical, aircraft and
military applicatio n. Macronix and its suppliers will not be liable to yo u and/or any third party fo r any claims, injuries
o r damages that may be incurred due to use o f Macro nix's products in the pro hibited applicatio ns.
80
