MCP1804T-2502I/MT - Microchip Technology

Features

• 150 mA Output Current

• Low Drop Out Voltage, 260 mV typical @ 20 mA,

VR = 3.3V

• 50 µA Typical Quiescent Current

• 0.01 µA Typical Shutdown Current

• Input Operating Voltage Range: 2.0V to 28.0V

• Standard Output Voltage Options

(1.8V, 2.5V, 3.0V, 3.3V, 5.0V, 10.0V, 12.0V)

• Output Voltage Accuracy: ±2%

• Output voltages from 1.8V to 18.0V in 0.1V

increments are available upon request

• Stable with Ceramic output capacitors

• Current Limit Protection With Current Foldback

• Shutdown pin

• High PSRR: 50 dB typical @ 1 kHz

Applications

• Cordless Phones, Wireless Communications

• PDAs, Notebook and Netbook Computers

•Digital Cameras

• Microcontroller Power

• Car Audio and Navigation Systems

• Home Appliances

Related Literature

• AN765, “Using Microchip’s Micropower LDOs”,

• AN766, “Pin-Compatible CMOS Upgrades to

BiPolar LDOs”, DS00766, Microchip Technology

• AN792, “A Method to Determine How Much

Power a SOT23 C an Di ss ip a te in an Appli ca tio n”,

Description

The MCP1804 is a family of CMOS low dropout (LDO)

voltage regulators that can deliver up to 150 mA of

current while consuming only 50 µA of quiescent

current (typical, 1.8V ≤ V

OUT ≤ 5.0V). The input

operating range is specified from 2.0V to 28.0V.

The MCP1804 is capable of delivering 100 mA with

only 1300 mV (typical) of input to output voltage

differential (VOUT = 3.3V). The output voltage tolerance

of the MCP1804 at +25°C is a maximum of ±2%. Line

regulation is ±0.15% typical at +25°C.

The LDO input and output is stable with 0.1 µF of input

and output capacitance. Ceramic, tantalum or

aluminum electrolytic capacitors can all be used for

input and output. Overcurrent limit with current foldback

to 40 mA (typical) provides short-circuit protection.

A shutdown (SHDN) function allows the output to be

enabled or disabled. When disabled, the MCP1804

draws only 0.01 µA of current (typical).

Package options include the SOT-23-5 (SOT-25), SOT-

89-3, SOT-89-5, and SOT-223-3.

Package Types

SOT-23-5

123

VOUT

VIN NC

SHDNGND

SOT-89-5

(Top View)

123

VOUT SHDN

VIN NCGND

123

VOUT VIN

GND

(Top View)

SOT-223

123

VOUT VIN

GND

(Top View)

SOT-89-3

150 mA, 28V LDO Regulator With Shutdown

MCP1804

Functional Block Diagram

Typical Application Circuit

Thermal

VIN VOUT

GND

Error Amplifier

Voltage

Reference Current Limiter

Shutdown

Control

SHDN

Protection

*5-Pin Versions Only

VIN

CIN

1µF

COUT

1µFCeramic

VIN

12V

Battery

VOUT

SHDN

GND

Ceramic

VOUT

5.0V @ 30 mA

SOT-25

MCP1804

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

Input Voltage ...................................................... +30V

Output Current (Continuous)........... PD/(VIN-VOUT)mA

Output Current (Peak)...................................... 300 mA

Output Voltage ..................... (VSS-0.3V) to (VIN+0.3V)

SHDN Voltage ................................(VSS-0.3V) to +30V

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of

the device at those or any other conditions above those

indicated in the operational listings of this specification

is not implied. Exposure to maximum rating conditions

for extended periods may affect device reliability.

ELECTR ICAL CHARACTERISTICS

Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 2.0V, Note 1,

COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C

Parameters Sym Min Typ Max Units Conditions

Input / Output Characteristics

Input Operating

Voltage

VIN 2.0 — 28.0 V Note 1

Input Quiescent

Current

IqIL = 0 mA

— 50 105 µA 1.8V ≤ VOUT ≤ 5.0V

— 60 115 µA 5.1V ≤ VOUT ≤ 12.0V

— 65 125 µA 12.1V ≤ VOUT ≤ 18.0V

Shutdown Current ISHDN — 0.01 0.10 µA SHDN = 0V

Maximum Output

Current

IOUT_mA VIN = VR + 3.0V

100 — — mA VOUT <3.0V

150 — — mA VOUT ≥3.0V

Current Limiter ILIMIT — 200 — mA

Output Short Circuit

Current

IOUT_SC —40— mA

Output Voltage

Regulation

VOUT VR-2.0% VRVR+2.0% V IOUT =10mA, Note 2

VOUT Temperature

Coefficient

TCVOUT — ±100 — ppm/°C IOUT =20mA,

-40°C ≤TA≤+85°C, Note 3

Line Regulation ΔVOUT/

(VOUTXΔVIN)

(VR+2V)≤VIN ≤28V, Note 1

— 0.05 0.10 %/V IOUT = 5 mA

— 0.15 0.30 %/V IOUT = 13 mA

Load Regulation ΔVOUT/VOUT IL = 1.0 mA to 50 mA, Note 4

—5090 mV1.8V ≤ VOUT ≤ 5.0V

— 110 175 mV 5.1V ≤ VOUT ≤ 12.0V

— 180 275 mV 12.1V ≤ VOUT ≤ 18.0V

Note 1: The minimum VIN must meet one condition: VIN ≥ (VR + 2.0V).

2: VR is the nominal regulator output voltage with an input voltage of VIN = VR + 2.0V.

For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, etc.

3: TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured

over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range.

4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing.

Changes in output voltage due to heating effects are determined using thermal regulation specification

TCVOUT.

5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its

measured value with an applied input voltage of VR + 2.0V.

MCP1804

Dropout Voltage

Note 1, Note 5 VDROPOUT IL = 20 mA

—550710 mV1.8V ≤ VR ≤ 1.9V

— 450 600 mV 2.0V ≤ VR ≤ 2.1V

— 390 520 mV 2.2V ≤ VR ≤ 2.4V

— 310 450 mV 2.5V ≤ VR ≤ 2.9V

— 260 360 mV 3.0V ≤ VR ≤ 3.9V

— 220 320 mV 4.0V ≤ VR ≤ 4.9V

— 190 280 mV 5.0V ≤ VR ≤ 6.4V

— 170 230 mV 6.5V ≤ VR ≤ 8.0V

— 130 190 mV 8.1V ≤ VR ≤ 10.0V

— 120 170 mV 10.1V ≤ VR ≤ 18.0V

IL = 100 mA

— 2200 2700 mV 1.8V ≤ VR ≤ 1.9V

— 1900 2600 mV 2.0V ≤ VR ≤ 2.1V

— 1700 2200 mV 2.2V ≤ VR ≤ 2.4V

— 1500 1900 mV 2.5V ≤ VR ≤ 2.9V

— 1300 1700 mV 3.0V ≤ VR ≤ 3.9V

— 1100 1500 mV 4.0V ≤ VR ≤ 4.9V

— 1000 1300 mV 5.0V ≤ VR ≤ 6.4V

— 800 1150 mV 6.5V ≤ VR ≤ 8.0V

— 700 950 mV 8.1V ≤ VR ≤ 10.0V

— 650 850 mV 10.1V ≤ VR ≤ 18.0V

SHDN “H” Voltage VSHDN_H 1.1 — VIN VV

IN = 28V

SHDN “L” Voltage VSHDN_L 0 — 0.35 V VIN = 28V

SHDN Current ISHDN -0.1 — 0.1 µA VIN = 28V, VSHDN = GND or VIN

Power Supply Ripple

Rejection Ratio

PSRR — 50 — dB f = 1 kHz, IL = 20 mA,

VINAC = 0.5V pk-pk, CIN = 0 µF

Thermal Shutdown

Protection

TSD — 150 — °C TJ

Thermal Shutdown

Hysteresis

ΔTSD — 25 — °C

ELECTRICAL CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 2.0V, Note 1,

COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C

Parameters Sym Min Typ Max Units Conditions

Note 1: The minimum VIN must meet one condition: VIN ≥ (VR + 2.0V).

2: VR is the nominal regulator output voltage with an input voltage of VIN = VR + 2.0V.

For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, etc.

3: TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured

over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range.

4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing.

Changes in output voltage due to heating effects are determined using thermal regulation specification

TCVOUT.

5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its

measured value with an applied input voltage of VR + 2.0V.

MCP1804

TEMPERATURE SPECIFICATIONS

Parameters Sym Min Typ Max Units Conditions

Temperature Ranges

Operating Temperature Range TA-40 +85 °C

Storage Temperature Range Tstg -55 +125 °C

Thermal Package Resistance

Thermal Resistance, 5LD SOT-23 θJA

θJC

—

256

—

—°C/W EIA/JEDEC JESD51-7

FR-4 0.063 4-Layer Board

Thermal Resistance, 3LD SOT-89

Thermal Resistance, 5LD SOT-89

θJA

θJC

—

180

100

—

—°C/W EIA/JEDEC JESD51-7

FR-4 0.063 4-Layer Board

Thermal Resistance, 3LD SOT-223 θJA

θJC

—

—°C/W EIA/JEDEC JESD51-7

FR-4 0.063 4-Layer Board

MCP1804

2.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-1: Output Voltage vs. Output

Current.

FIGURE 2-2: Output Voltage vs. Output

Current.

FIGURE 2-3: Output Voltage vs. Output

Current.

FIGURE 2-4: Output Voltage vs. Output

Current.

FIGURE 2-5: Output Voltage vs. Output

Current.

FIGURE 2-6: Output Voltage vs. Output

Current.

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0 50 100 150 200 250 300

Output Current (mA)

Output Voltage (V)

Ta=-40℃

Ta=25℃

Ta=85℃

VR=2.8V

VIN=SHDN=4.8V

0.0

1.0

2.0

3.0

4.0

5.0

6.0

0 50 100 150 200 250 300

Output Current (mA)

Output Voltage (V)

Ta=-40℃

Ta=25℃

Ta=85℃

VR=5VVIN=SHDN=8.0V

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

0 50 100 150 200 250 300

Output Current (mA)

Output Voltage (V)

Ta=-40℃

Ta=25℃

Ta=85℃

VR=12V

VIN=SHDN=15V

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0 50 100 150 200 250 300

Output Curren t (mA)

Output Voltage (V)

VIN=2.8V

VIN=3.8V

VIN=4.8V

VR=1.8V

0.0

1.0

2.0

3.0

4.0

5.0

6.0

0 50 100 150 200 250 300

Output Current (mA)

Output Voltage (V)

VIN=6V

VIN=7V

VIN=8V

VR=5.0V

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

0 50 100 150 200 250 300

Output Current (mA)

Output Voltage (V)

VIN=13V

VIN=14V

VIN=15V

VR=12V

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-7: Output Voltage vs. Input

Voltage.

FIGURE 2-8: Output Voltage vs. Input

Voltage.

FIGURE 2-9: Output Voltage vs. Input

Voltage.

FIGURE 2-10: Output Voltage vs. Input

Voltage.

FIGURE 2-11: Output Voltage vs. Input

Voltage.

FIGURE 2-12: Output Voltage vs. Input

Voltage.

1.5

1.6

1.7

1.8

1.9

2.0

2.1

0.8 1.3 1.8 2.3 2.8 3.3 3.8

Input Vo ltag e (V)

Output Vo ltage (V)

IOUT=1mA

IOUT=10mA

IOUT=30mA

VR=1.8V

4.0

4.2

4.4

4.6

4.8

5.0

5.2

5.4

5.6

5.8

6.0

4.0 4.5 5.0 5.5 6.0

Input Vo ltage (V )

Output Voltage (V)

IOUT=1mA

IOUT=10mA

IOUT=30mA

VR=5V

9.0

10.0

11.0

12.0

13.0

14.0

15.0

10 11 12 13 14

In put V oltage (V)

Output Voltage (V)

IOUT=1mA

IOUT=10mA

IOUT=30mA

VR=12V

1.5

1.6

1.7

1.8

1.9

2.0

2.1

4 8 12 16 20 24 28

Input Voltage (V)

Output Voltage (V)

IOUT=1mA

IOUT=10mA

IOUT=30mA

VR=1.8V

4.0

4.2

4.4

4.6

4.8

5.0

5.2

5.4

5.6

5.8

6.0

8 1216202428

Input Volta ge (V)

Output Voltage (V)

IOUT=1mA

IOUT=10mA

IOUT=30mA

VR=5V

9.0

10.0

11.0

12.0

13.0

14.0

15.0

14 16 18 20 22 24 26 28

Input Voltage (V )

Output Voltage (V)

IOUT=1mA

IOUT=10mA

IOUT=30mA

VR=12V

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-13: Dropout Voltage vs. Load

Current.

FIGURE 2-14: Dropout Voltage vs. Load

Current.

FIGURE 2-15: Dropout Voltage vs. Load

Current.

FIGURE 2-16: Supply Current vs. Input

Voltage.

FIGURE 2-17: Supply Current vs. Input

Voltage.

FIGURE 2-18: Supply Current vs. Input

Voltage.

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0 25 50 75 100 125 150

Output Current (mA)

Dropout Voltage (V)

Ta=85℃

Ta=25℃

Ta=-40℃

VR=1.8V

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0 25 50 75 100 125 150

Output Current (mA)

Dropout Voltag e (V )

Ta=85℃

Ta=25℃

Ta=-40℃

VR=5V

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0 25 50 75 100 125 150

Output Current (mA)

Dropout Voltag e (V )

Ta=85℃

Ta=25℃

Ta=-40℃

VR=12V

0 4 8 1216202428

Input Voltag e (V)

Supply Cu rr ent (µA)

Ta=85℃

Ta=25℃

Ta=-40℃

VR=1.8V

0 4 8 12 16 20 24 28

Input Voltag e (V)

Supply Current (µA)

Ta=85℃

Ta=25℃

Ta=-40℃

VR=5V

0 4 8 1216202428

Input Voltage (V)

Suppl y Current (µA)

Ta=85℃

Ta=25℃

Ta=-40℃

VR=12V

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-19: Supply Current vs. Input

Voltage.

FIGURE 2-20: Supply Current vs. Input

Voltage.

FIGURE 2-21: Supply Current vs. Input

Voltage.

FIGURE 2-22: Output Voltage vs. Ambient

Temperature.

FIGURE 2-23: Output Voltage vs. Ambient

Temperature.

FIGURE 2-24: Output Voltage vs. Ambient

Temperature.

-40-200 20406080100

A m bient Temperature (°C )

Supply Current (µA)

VR=1.8V

-40-200 20406080100

A m bient Temperature (°C )

Sup ply Curre n t (µA)

VR=5V

-40-200 20406080100

Ambient Temperat ure (°C)

Supply Current (µA)

VR=12V

1.60

1.65

1.70

1.75

1.80

1.85

1.90

1.95

2.00

-50-250 255075100

A m bient Tem peratu re (°C ）

Output Voltage (V)

IOUT=1mA

IOUT=10mA

IOUT=20mA

VR=1.8V

4.80

4.85

4.90

4.95

5.00

5.05

5.10

5.15

5.20

-50-250 255075100

Ambient Temperature (°C）

Output Voltage (V)

IOUT=1mA

IOUT=10mA

IOUT=20mA

VR=5V

11.5

11.6

11.7

11.8

11.9

12.0

12.1

12.2

12.3

12.4

12.5

-50 -25 0 25 50 75 100

Am bient Temperature (°C）

Output Vol t a ge (V)

IOUT=1mA

IOUT=10mA

IOUT=20mA

VR=12V

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-25: Dynamic Line Response.

FIGURE 2-26: Dynamic Line Response.

FIGURE 2-27: Dynamic Line Response.

FIGURE 2-28: Dynamic Line Response.

FIGURE 2-29: Dynamic Line Response.

FIGURE 2-30: Dynamic Line Response.

1.3

2.3

3.3

4.3

5.3

6.3

7.3

Time (1ms/div)

Input Voltag e (V)

3.26

3.28

3.30

3.32

3.34

3.36

3.38

Output Vo ltage (V)

VOUT

VIN

VR=3.3V

IOUT=1 mA

Time (1 ms/div)

Input Volt age (V)

4.96

4.98

5.00

5.02

5.04

5.06

5.08

Output Voltage (V)

VOUT

VIN

R=5V

IOUT 1 mA

Time (1ms/div)

In put Voltage (V )

11.96

11.98

12.00

12.02

12.04

12.06

12.08

Output Voltage (V)

VOUT

VIN

VR=12V

IOUT=1 mA

1.3

2.3

3.3

4.3

5.3

6.3

7.3

Time (1ms/div)

Input Volt age (V)

3.26

3.28

3.30

3.32

3.34

3.36

3.38

Out put Vo ltag e (V)

VOUT

VIN

VR=3.3V

IOUT=30 mA

Ti me (1 ms/div)

Input Voltage (V)

4.96

4.98

5.00

5.02

5.04

5.06

5.08

Output Voltage (V)

VOUT

VIN

VR=5V

IOUT=30 mA

Time (1ms/div)

Input Voltage (V)

11.96

11.98

12.00

12.02

12.04

12.06

12.08

Output Vo ltage (V)

VR=12V

IOUT=30 mA

VOUT

VIN

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-31: Dynamic Load Response.

FIGURE 2-32: Dynamic Load Response.

FIGURE 2-33: Dynamic Load Response.

FIGURE 2-34: Startup Response.

FIGURE 2-35: Startup Response.

FIGURE 2-36: Startup Response.

2.6

2.7

2.8

2.9

3.0

3.1

3.2

3.3

3.4

3.5

3.6

Time (1ms/div)

Output Voltage (V)

120

150

Output Curr e nt (mA)

Output Current

VOUT

VR=3.3V

4.4

4.5

4.6

4.7

4.8

4.9

5.0

5.1

5.2

5.3

5.4

Time (1ms/div)

Output Voltage (V)

120

150

Output Curr e nt (m A)

Output Current

VOUT

VR = 5V

10.6

10.8

11.0

11.2

11.4

11.6

11.8

12.0

12.2

12.4

12.6

Tim e (1 m s /di v )

Output Voltage (V)

120

150

Output Curr e nt (m A)

VOUT

VR = 12V

IOUT

-8

-6

-4

-2

Tim e (1 m s /di v )

Input Voltage (V)

Output Voltage (V)

VOUT

VR=3.3V

IOUT=1 mA

VIN

-8

-6

-4

-2

Time (1ms/div)

Input Voltage (V)

Output Vo ltage (V )

VOUT

VR=3.3V

IOUT=30 mA

VIN

-8

-6

-4

-2

Tim e (1 m s /div)

Input Vo ltage (V)

Output Voltage (V)

VOUT

VR=5.0V

IOUT=1 mA

VIN

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-37: Startup Response.

FIGURE 2-38: Startup Response.

FIGURE 2-39: Startup Response.

FIGURE 2-40: SHDN Response.

FIGURE 2-41: SHDN Response.

FIGURE 2-42: SHDN Response.

-8

-6

-4

-2

Time (1ms/div)

Input Volta ge (V)

Output Voltage (V)

VOUT

VR=5.0V

IOUT=30 mA

VIN

-15

-10

-5

Time (1ms/div)

Input Volta ge (V)

Output Voltage (V)

VR=12V

IOUT=1 mA

VOUT

VIN

-15

-10

-5

Time (1ms/div)

Input Voltage (V)

Output Voltage (V)

VR=12V

IOUT=30 mA

VIN

VOUT

-8

-6

-4

-2

Tim e (1 m s /di v )

SHD N Voltage (V)

VOUT (V)

VR=3.3V

IOUT=1 mA

VOUT

SHDN

-8

-6

-4

-2

Time (1ms/div)

SH DN Volt ag e (V )

VOUT (V)

VR=5V

IOUT=1 mA

VOUT

SHDN

-15

-10

-5

Time (1ms/div)

SHDN Voltage (V)

VOU T ( V)

VR=12V

IOUT=1 mA

VOUT

SHDN

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-43: SHDN Response.

FIGURE 2-44: SHDN Response.

FIGURE 2-45: SHDN Response.

FIGURE 2-46: PSRR 3.3V @ 1 mA.

FIGURE 2-47: PSRR 5.0V @ 1 mA.

FIGURE 2-48: PSRR 12.0V @ 1 mA.

-8

-6

-4

-2

Time (1ms/div)

SHDN Voltage (V)

VOUT (V)

VR=3.3V

IOUT=30 mA

VOUT

SHDN

-8

-6

-4

-2

Time (1ms/div)

SHDN Voltage (V)

VOUT (V)

VR=5V

IOUT=30 mA

VOUT

SHDN

-15

-10

-5

Tim e (1 m s /di v )

SHDN Vo lta ge (V)

VOUT (V )

VOUT

VR=12V

IOUT=30 mA

SHDN

0.01 0.1 1 10 100

Ripple Frequenc y: f (kHz)

Ripple Rejection Ra te: PSRR

(dB)

VOUT=3.3V

CIN=0

IOUT=1 mA

VIN_AC=0.5Vp-p

0.01 0.1 1 10 100

Ripple Frequency: f (kHz)

Ripple Rejection Rate: PSRR

(dB)

OUT=5V

CIN=0

IOUT=1 mA

IN_AC=0.5Vp-p

0.01 0.1 1 10 100

Ripple Frequency: f (kHz)

Ripple Rejection Rate: PSRR

(dB)

VOUT=12V

CIN=0

IOUT=1 mA

VIN_AC=0.5Vp-p

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-49: PSRR 3.3V @ 30 mA.

FIGURE 2-50: PSRR 5.0V @ 30 mA.

FIGURE 2-51: PSRR 12V @ 30 mA.

FIGURE 2-52: PSRR 5V @ 30 mA.

FIGURE 2-53: Ground Current vs. Output

Current.

FIGURE 2-54: Ground Current vs. Output

Current.

Output Current: Iout (mA)

MCP1804

Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V.

FIGURE 2-55: Ground Current vs. Output

Current.

0.01 0.1 1

Ripple Frequency f [kHz]

10.00

1.00

0.10

0.01

Output Noise Density [µV √Hz]

VR = 3.3V

VIN = 5.0V

IOUT = 50 mA

10 100

MCP1804

3.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Tabl e 3- 1.

TABLE 3-1: MCP1804 PIN FUNCTION TABLE

3.1 Unregulat ed Input Voltage (VIN)

Connect VIN to the input unregulated source voltage.

Like all low dropout linear regulators, low source

impedance is necessary for the stable operation of the

LDO. The amount of capacitance required to ensure

low source impedance will depend on the proximity of

the input source capacitors or battery type. For most

applications, 0.1 µF to 1.0 µF of capacitance will

ensure stable operation of the LDO circuit. The type of

capacitor used can be ceramic, tantalum or aluminum

electrolytic. The low ESR characteristics of the ceramic

will yield better noise and PSRR performance at

high-frequency.

3.2 Ground Terminal (GND)

Regulator ground. Tie GND to the negative side of the

output and the negative side of the input capacitor.

Only the LDO bias current (50 to 60 µA typical) flows

out of this pin; there is no high current. The LDO output

regulation is referenced to this pin. Minimize voltage

drops between this pin and the negative side of the

load.

3.3 Shutdown Input (SHDN)

The SHDN input is used to turn the LDO output voltage

on and off. When the SHDN input is at a logic-high

level, the LDO output voltage is enabled. When the

SHDN input is pulled to a logic-low level, the LDO

output voltage is disabled and the LDO enters a low

quiescent current shutdown state where the typical

quiescent current is 0.01 µA. The SHDN pin does not

have an internal pullup or pulldown resistor. The SHDN

pin must be connected to either VIN or GND to prevent

the device from becoming unstable.

3.4 Regulated Output Voltage (VOUT)

Connect VOUT to the positive side of the load and the

positive terminal of the output capacitor. The positive

side of the output capacitor should be physically

located as close to the LDO VOUT pin as is practical.

The current flowing out of this pin is equal to the DC

load current. For most applications, 0.1 µF to 1.0 µF of

capacitance will ensure stable operation of the LDO

circuit. Larger values may be used to improve dynamic

load response. The type of capacitor used can be

ceramic, tantalum or aluminum electrolytic. The low

ESR characteristics of the ceramic will yield better

noise and PSRR performance at high-frequency.

MCP1804 Symbol Description

SOT-23-5 SOT-89-5 SOT-89-3 SOT-223-3

15 3 3V

IN Unregulated Supply Voltage

2 2,TAB 2, TAB 2 GND Ground Terminal

34 —TAB NC No connection

43 ——SHDN Shutdown

51 1 1V

OUT Regulated Voltage Output

MCP1804

4.0 DETAILED DESCRIPTION

4.1 Output Regulation

A portion of the LDO output voltage is fed back to the

internal error amplifier and compared with the precision

internal bandgap reference. The error amplifier output

will adjust the amount of current that flows through the

P-Channel pass transistor, thus regulating the output

voltage to the desired value. Any changes in input

voltage or output current will cause the error amplifier

to respond and adjust the output voltage to the target

voltage (refer to Figure 4-1).

4.2 Overcurrent

The MCP1804 internal circuitry monitors the amount of

current flowing through the P-Channel pass transistor.

In the event that the load current reaches the current

limiter level of 200 mA (typical), the current limiter

circuit will operate and the output voltage will drop. As

the output voltage drops, the internal current foldback

circuit will further reduce the output voltage causing the

output current to decrease. When the output is shorted,

a typical output current of 50 mA flows.

4.3 Shutdown

The SHDN input is used to turn the LDO output voltage

on and off. When the SHDN input is at a logic-high

level, the LDO output voltage is enabled. When the

SHDN input is pulled to a logic-low level, the LDO

output voltage is disabled and the LDO enters a low

quiescent current shutdown state where the typical

quiescent current is 0.01 µA. The SHDN pin does not

have an internal pullup or pulldown resistor. Therefore

the SHDN pin must be pulled either high or low to

prevent the device from becoming unstable. The

internal device current will increase when the device is

operational and current flows through the pullup or

pull-down resistor to the SHDN pin internal logic. The

SHDN pin internal logic is equivalent to an inverter

input.

4.4 Output Capaci tor

The MCP1804 requires a minimum output capacitance

of 0.1 µF to 1.0 µF for output voltage stability. Ceramic

capacitors are recommended because of their size,

cost and environmental robustness qualities.

Aluminum-electrolytic and tantalum capacitors can be

used on the LDO output as well. The output capacitor

should be located as close to the LDO output as is

practical. Ceramic materials X7R and X5R have low

temperature coefficients.

Larger LDO output capacitors can be used with the

MCP1804 to improve dynamic performance and power

supply ripple rejection performance. Aluminum-

electrolytic capacitors are not recommended for low

temperature applications of < -25°C.

4.5 Input Capacitor

Low input source impedance is necessary for the LDO

output to operate properly. When operating from

batteries, or in applications with long lead length

(> 10 inches) between the input source and the LDO,

some input capacitance is recommended. A minimum

of 0.1 µF to 1.0 µF is recommended for most

applications.

For applications that have output step load

requirements, the input capacitance of the LDO is very

important. The input capacitance provides the LDO

with a good local low-impedance source to pull the

transient currents from in order to respond quickly to

the output load step. For good step response

performance, the input capacitor should be of

equivalent or higher value than the output capacitor.

The capacitor should be placed as close to the input of

the LDO as is practical. Larger input capacitors will also

help reduce any high-frequency noise on the input and

output of the LDO and reduce the effects of any

inductance that exists between the input source

voltage and the input capacitance of the LDO.

4.6 Thermal Shutdown

The MCP1804 thermal shutdown circuitry protects the

device when the internal junction temperature reaches

the typical thermal limit value of +150°C. The thermal

limit shuts off the output drive transistor. Device output

will resume when the internal junction temperature falls

below the thermal limit value by an amount equal to the

thermal limit hysteresis value of +25°C.

MCP1804

FIGURE 4-1: Bl ock Diagram.

Thermal

VIN VOUT

GND

Error Amplifier

Voltage

Reference Current Limiter

Shutdown

Control

SHDN

Protection

5-Pin Versions Only

MCP1804

5.0 FUNCTIONAL DESCRIPTION

The MCP1804 CMOS linear regulator is intended for

applications that need the low current consumption

while maintaining output voltage regulation. The

operating continuous load range of the MCP1804 is

from 0 mA to 150 mA. The input operating voltage

range is from 2.0V to 28.0V, making it capable of

operating from a single 12V battery or single and

multiple Li-Ion cell batteries.

5.1 Input

The input of the MCP1804 is connected to the source

of the P-Channel PMOS pass transistor. As with all

LDO circuits, a relatively low source impedance

(< 10Ω) is needed to prevent the input impedance from

causing the LDO to become unstable. The size and

type of the capacitor needed depends heavily on the

input source type (battery, power supply) and the

output current range of the application. For most

applications a 0.1 µF ceramic capacitor will be

sufficient to ensure circuit stability. Larger values can

be used to improve circuit AC performance.

5.2 Output

The maximum rated continuous output current for the

MCP1804 is 150 mA.

A minimum output capacitance of 0.1 µF to 1.0 µF is

required for small signal stability in applications that

have up to 150 mA output current capability. The

capacitor type can be ceramic, tantalum or aluminum

electrolytic.

MCP1804

6.0 APPLICATION CIRCUITS AND

ISSUES

6.1 Typical Application

The MCP1804 is most commonly used as a voltage

regulator. It’s low quiescent current and wide input volt-

age make it ideal for Li-Ion and 12V battery-powered

applications.

FIGURE 6-1: Typical App li cat io n Circui t.

6.1.1 APPLICATION INPUT CONDITIONS

6.2 Power Calculations

6.2.1 POWER DISSIPATION

The internal power dissipation of the MCP1804 is a

function of input voltage, output voltage and output

current. The power dissipation, as a result of the

quiescent current draw, is so low, it is insignificant

(50.0 µA x VIN). The following equation can be used to

calculate the internal power dissipation of the LDO.

EQUATION 6-1:

The maximum continuous operating temperature

specified for the MCP1804 is +85°C. To estimate the

internal junction temperature of the MCP1804, the total

internal power dissipation is multiplied by the thermal

resistance from junction to ambient (RθJA). The thermal

resistance from junction to ambient for the SOT-23 pin

package is estimated at 256°C/W.

EQUATION 6-2:

The maximum power dissipation capability for a

package can be calculated given the junction-

to-ambient thermal resistance and the maximum

ambient temperature for the application. The following

equation can be used to determine the package

maximum internal power dissipation.

EQUATION 6-3:

EQUATION 6-4:

EQUATION 6-5:

Package Type = SOT-23

Input Voltage Range = 3.8V to 4.2V

VIN maximum = 4.6V

VOUT typical = 1.8V

IOUT = 50 mA maximum

GND

VOUT VIN

CIN

1µF

COUT

1µF Ceramic

VOUT VIN

4.2V

1.8V

IOUT

50 mA

Ceramic

SHDN NC

MCP1804

PLDO VIN MAX)()

VOUT MIN()

–()IOUT MAX)()

Where:

PLDO = LDO Pass device internal power

dissipation

VIN(MAX) = Maximum input voltage

VOUT(MIN) = LDO minimum output voltage

TJMAX()

PTOTAL R

TAMAX

Where:

TJ(MAX) = Maximum continuous junction

temperature.

PTOTAL = Total device power dissipation.

RϴJA = Thermal resistance from junction to

ambient.

TAMAX = Maximum ambient temperature.

PDMAX()

TJMAX()

TAMAX()

–()

---------------------------------------------------=

Where:

PD(MAX) = Maximum device power dissipation.

TJ(MAX) = Maximum continuous junction

temperature.

TA(MAX) = Maximum ambient temperature.

RϴJA = Thermal resistance from junction to

ambient.

TJRISE()

PDMAX()

Where:

TJ(RISE) = Rise in device junction temperature over

the ambient temperature.

PD(MAX) = Maximum device power dissipation.

RϴJA = Thermal resistance from junction to

ambient.

TJTJRISE()

Where:

TJ= Junction Temperature.

TJ(RISE) = Rise in device junction temperature over

the ambient temperature.

TA= Ambient temperature.

MCP1804

6.3 Voltage Regulator

Internal power dissipation, junction temperature rise,

junction temperature and maximum power dissipation

are calculated in the following example. The power

dissipation, as a result of ground current, is small

enough to be neglected.

6.3.1 POWER DISSIPATION EXAMPLE

6.3.1.1 Device Junction Temperature Rise

The internal junction temperature rise is a function of

internal power dissipation and the thermal resistance

from junction to ambient for the application. The thermal

resistance from junction to ambient (RθJA) is derived

from an EIA/JEDEC standard for measuring thermal

resistance for small surface mount packages. The EIA/

JEDEC specification is JESD51-7, “High Effective Ther-

mal Conductivity Test Board for Leaded Surface Mount

Packages”. The standard describes the test method

and board specifications for measuring the thermal

resistance from junction to ambient. The actual thermal

resistance for a particular application can vary depend-

ing on many factors, such as copper area and thick-

ness. Refer to AN792, “A Method to Determine How

Much Power a SOT 23 Can Dissipate in an Application”

(DS00792), for more information regarding this subject.

6.3.1.2 Junction Temperature Estimate

To estimate the internal junction temperature, the

calculated temperature rise is added to the ambient or

offset temperature. For this example, the worst-case

junction temperature is estimated below.

Maximum Package Power Dissipation at +25°C

Ambient Temperature (minimum PCB footprint)

6.4 Voltage Reference

The MCP1804 can be used not only as a regulator, but

also as a low quiescent current voltage reference. In

many microcontroller applications, the initial accuracy

of the reference can be calibrated using production test

equipment or by using a ratio measurement. When the

initial accuracy is calibrated, the thermal stability and

line regulation tolerance are the only errors introduced

by the MCP1804 LDO. The low-cost, low quiescent

current and small ceramic output capacitor are all

advantages when using the MCP1804 as a voltage

reference.

FIGURE 6-2: Using the MCP1804 as a

Voltage Reference.

6.5 Pulsed Load Applications

For some applications, there are pulsed load current

events that may exceed the specified 150 mA

maximum specification of the MCP1804. The internal

current limit of the MCP1804 will prevent high peak

load demands from causing non-recoverable damage.

The 150 mA rating is a maximum average continuous

rating. As long as the average current does not exceed

150 mA nor the max power dissipation of the packaged

device, pulsed higher load currents can be applied to

the MCP1804. The typical current limit for the

MCP1804 is 200 mA (TA = +25°C).

Package:

Package Type = SOT-23

Input Voltage:

VIN = 3.8V to 4.6V

LDO Output Voltages and Currents:

VOUT = 1.8V

IOUT =50mA

Maximum Ambient Temperature:

TA(MAX) =+40°C

Internal Power Dissipation:

Internal Power dissipation is the product of the LDO

output current times the voltage across the LDO

(VIN to VOUT).

PLDO(MAX) =(V

IN(MAX) - VOUT(MIN)) x

IOUT(MAX)

PLDO = (4.6V - (0.98 x 1.8V)) x 50 mA

PLDO = 141.8 milli-Watts

TJ(RISE) =P

TOTAL x RqJA

TJRISE = 141.8 milli-Watts x 256.0°C/Watt

TJRISE =36.3°C

TJ =T

JRISE + TA(MAX)

TJ = 76.3°C

SOT-23 (256°C/Watt = RθJA):

PD(MAX) = (85°C - 25°C) / 256°C/W

PD(MAX) = 234 milli-Watts

SOT-89 (180°C/Watt = RθJA):

PD(MAX) = (85°C - 25°C) / 180°C/W

PD(MAX) = 333 milli-Watts

PICmicro®

GND

VIN

CIN

1µF COUT

1µF

Bridge Sensor

VOUT VREF

ADO

AD1

Ratio Metric Reference

50 µA Bias Microcontroller

MCP1804

7.0 PACKAGING INFORMATION

7.1 Package Marking Information

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Pb-free JEDEC designator for Matte Tin (Sn)

*This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

5-Lead SOT-89 Example:

5-Lead SOT-23 Example:

80K25

XXXXXXX

XXXYYWW

3-Lead SOT-223

NNN

XXXYYWW

Example:

80K25

Part Number Code

MCP1804T-1802I/OT 80KNN

MCP1804T-2502I/OT 80TNN

MCP1804T-3002I/OT 80ZNN

MCP1804T-3302I/OT 812NN

MCP1804T-5002I/OT 81MNN

MCP1804T-A002I/OT 839NN

MCP1804T-C002I/OT 83ZNN

Part Number Code

MCP1804T-1802I/MT 80KNN

MCP1804T-2502I/MT 80TNN

MCP1804T-3002I/MT 80ZNN

MCP1804T-3302I/MT 812NN

MCP1804T-5002I/MT 81MNN

MCP1804T-A002I/MT 839NN

MCP1804T-C002I/MT 83ZNN

Part Number Code

MCP1804T-1802I/DB 84KNN

MCP1804T-2502I/DB 84TNN

MCP1804T-3002I/DB 84ZNN

MCP1804T-3302I/DB 852NN

MCP1804T-5002I/DB 85MNN

MCP1804T-A002I/DB 879NN

MCP1804T-C002I/DB 87ZNN

3-Lead SOT-89 Example:

NNN

XXXYYWW 84K25

Part Number Code

MCP1804T-1802I/MB 84KNN

MCP1804T-2502I/MB 84TNN

MCP1804T-3002I/MB 84ZNN

MCP1804T-3302I/MB 852NN

MCP1804T-5002I/MB 85MNN

MCP1804T-A002I/MB 879NN

MCP1804T-C002I/MB 87ZNN

84K25

NNN

XXNN

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2YHUDOO+HLJKW $  

2YHUDOO:LGWK +  

0ROGHG3DFNDJH:LGWK (  

2YHUDOO/HQJWK '  

7DE:LGWK '  

)RRW/HQJWK /  

/HDG7KLFNQHVV F  

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NOTES:

MCP1804

APPENDIX A: REVISION HISTORY

Revision C (June 2011)

The following is the list of modifications:

1. Added seven new characterization graphs to

Section 2.0 “Typical Performance Curves”

(Figure 2-49 - Figure 2-55).

2. Changed layout of Table 3-1. Added separate

column for SOT-223-3.

3. Updated Package Marking drawings and

examples in the Packaging Information section.

4. Added new voltage option to Product

Identification System table.

Revision B (November 2009)

The following is the list of modifications:

• Electrical characteristics, SHDN “H” Voltage item:

Changed to SHDN “L” Voltage.

Revision A (September 2009)

• Original Release of this Document.

MCP1804

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. X/XX

-XX

Voltage PackageTemperature

Range

Device

Device MCP1804T: LDO Voltage Regulator (Tape and Reel)

Voltage Options 18 = 1.8V

25 = 2.5V

30 = 3.0V

33 = 3.3V

50 = 5.0V

A0 = 10V

C0 = 12V

J0 = 18V

Output Voltage

Tolerance

02 = ±2%

Temperature Range I = -40°C to +85°C (Industrial)

Package DB = 3-lead Plastic Small OutlineTransistor (SOT-223)

MB = 3-lead Plastic Small OutlineTransistor (SOT-89)

MT = 5-lead Plastic Small OutlineTransistor (SOT-89)

OT = 5-lead Plastic Small OutlineTransistor (SOT-23)

Examples:

a) MCP1804T-1802I/OT: 1.8V, 5-LD SOT-23

b) MCP1804T-2502I/OT: 2.5V, 5-LD SOT-23

c) MCP1804T-3002I/OT: 3.0V, 5-LD SOT-23

d) MCP1804T-3302I/OT: 3.3V, 5-LD SOT-23

e) MCP1804T-5002I/OT: 5.0V, 5-LD SOT-23

f) MCP1804T-A002I/OT: 10V, 5-LD SOT-23

g) MCP1804T-C002I/OT: 12V, 5-LD SOT-23

a) MCP1804T-1802I/MB: 1.8V, 5-LD SOT-89

b) MCP1804T-2502I/MB: 2.5V, 5-LD SOT-89

c) MCP1804T-3002I/MB: 3.0V, 5-LD SOT-89

d) MCP1804T-3302I/MB: 3.3V, 5-LD SOT-89

e) MCP1804T-5002I/MB: 5.0V, 5-LD SOT-89

f) MCP1804T-A002I/MB: 10V, 5-LD SOT-89

g) MCP1804T-C002I/MB: 12V, 5-LD SOT-89

a) MCP1804T-1802I/MT: 1.8V, 5-LD SOT-89

b) MCP1804T-2502I/MT: 2.5V, 5-LD SOT-89

c) MCP1804T-3002I/MT: 3.0V, 5-LD SOT-89

d) MCP1804T-3302I/MT: 3.3V, 5-LD SOT-89

e) MCP1804T-5002I/MT: 5.0V, 5-LD SOT-89

f) MCP1804T-A002I/MT: 10V, 5-LD SOT-89

g) MCP1804T-C002I/MT: 12V, 5-LD SOT-89

a) MCP1804T-1802I/DB: 1.8V, 3-LD SOT-223

b) MCP1804T-2502I/DB: 2.5V, 3-LD SOT-223

c) MCP1804T-3002I/DB: 3.0V, 3-LD SOT-223

d) MCP1804T-3302I/DB: 3.3V, 3-LD SOT-223

e) MCP1804T-5002I/DB: 5.0V, 3-LD SOT-223

f) MCP1804T-A002I/DB: 10V, 3-LD SOT-223

g) MCP1804T-C002I/DB: 12V, 3-LD SOT-223

Tape

and

Reel

Output

Voltage

Tolerance

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

PIC32 logo, rfPIC and UNI/O are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, chipKIT,

chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,

dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,

FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,

Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,

MPLINK, mTouch, Omniscient Code Generation, PICC,

PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,

rfLAB, Select Mode, Total Endurance, TSHARC,

UniWinDriver, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

ISBN: 978-1-61341-301-2

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping

devices, Serial EEPROMs, microperiph erals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

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05/02/11