LM86CIMMX/NOPB - NATIONAL SEMICONDUCTOR

LM86

LM86 ±0.75°C Accurate, Remote Diode and Local Digital Temperature Sensor

with Two-Wire Interface

Literature Number: SNIS114D

LM86

±0.75˚C Accurate, Remote Diode and Local Digital

Temperature Sensor with Two-Wire Interface

General Description

The LM86 is an 11-bit digital temperature sensor with a

2-wire System Management Bus (SMBus) serial interface.

The LM86 accurately measures its own temperature as well

as the temperature of an external device, such as processor

thermal diode or diode connected transistor such as the

2N3904. The temperature of any ASIC can be accurately

determined using the LM86 as long as a dedicated diode

(semiconductor junction) is available on the target die. The

LM86 remote sensor accuracy of ±0.75˚C is factory trimmed

for the 1.008 typical non-ideality factor of the mobile Pen-

tium™III thermal diode. The LM86 has an Offset

requiring continuous software management. Contact

hardware.monitor.team@nsc.com to obtain the latest data for

new processors.

Activation of the ALERT output occurs when any tempera-

ture goes outside a preprogrammed window set by the HIGH

and LOW temperature limit registers or exceeds the T_CRIT

temperature limit. Activation of the T_CRIT_A occurs when

any temperature exceeds the T_CRIT programmed limit.

The LM86 is pin and register compatible with the the Analog

Devices ADM1032 and Maxim MAX6657/8.

Features

nAccurately senses die temperature of remote ICs or

diode junctions

nOffset register allows sensing a variety of thermal

diodes accurately

nOn-board local temperature sensing

n10 bit plus sign remote diode temperature data format,

0.125 ˚C resolution

nT_CRIT_A output useful for system shutdown

nALERT output supports SMBus 2.0 protocol

nSMBus 2.0 compatible interface, supports TIMEOUT

n8-pin MSOP and SOIC packages

Key Specifications

jSupply Voltage 3.0V to 3.6V

jSupply Current 0.8mA (typ)

jLocal Temp Accuracy (includes quantization error)

=25˚C to 125˚C ±3.0˚C (max)

jRemote Diode Temp Accuracy (includes quantization

error)

=30˚C, T

=80˚C ±0.75˚C (max)

=30˚C to 50˚C, T

=60˚C to 100˚C ±1.0˚C (max)

=0˚C to 85˚C, T

=25˚C to 125˚C ±3.0˚C (max)

Applications

nComputer System Thermal Management

(e.g. Laptop, Desktop, Workstations, Server)

nElectronic Test Equipment

nOffice Electronics

Simplified Block Diagram

10130301

Pentium™is a trademark of Intel Corporation.

April 2003

LM86

0.75˚C Accurate, Remote Diode and Local Digital Temperature Sensor with Two-Wire

Interface

Connection Diagram

MSOP-8 or SOIC-8

10130302

TOP VIEW

Ordering Information

Package

Marking

NS Package

Number

Transport

Media

LM86CIMM T10C MUA08A

(MSOP-8)

1000 Units on

Tape and Reel

LM86CIMMX T10C MUA08A

(MSOP-8)

3500 Units on

Tape and Reel

LM86CIM LM86CIM M08A

(SOIC-8)

95 Units in Rail

LM86CIMX LM86CIM M08A

(SOIC-8)

2500 Units on

Tape and Reel

Pin Descriptions

Label Pin #Function Typical Connection

1Positive Supply Voltage

Input

DC Voltage from 3.0 V to 3.6 V

D+ 2

Diode Current Source To Diode Anode. Connected to remote discrete

diode conected transistor junction or to the diode

connected transistor junction on a remote IC whose

die temperature is being sensed.

D− 3 Diode Return Current Sink To Diode Cathode.

T_CRIT_A 4T_CRIT Alarm Output,

Open-Drain, Active-Low

Pull-Up Resistor, Controller Interrupt or Power

Supply Shutdown Control

GND 5 Power Supply Ground Ground

ALERT 6Interrupt Output,

Open-Drain, Active-Low

Pull-Up Resistor, Controller Interrupt or Alert Line

SMBData 7 SMBus Bi-Directional Data

Line, Open-Drain Output

From and to Controller, Pull-Up Resistor

SMBCLK 8 SMBus Input From Controller, Pull-Up Resistor

LM86

www.national.com 2

Typical Application

10130303

LM86

www.national.com3

Absolute Maximum Ratings (Note 1)

Supply Voltage −0.3 V to 6.0 V

Voltage at SMBData, SMBCLK,

ALERT, T_CRIT_A −0.5V to 6.0V

Voltage at Other Pins −0.3 V to

+ 0.3 V)

D− Input Current ±1mA

Input Current at All Other Pins (Note

2) ±5mA

Package Input Current (Note 2) 30 mA

SMBData, ALERT, T_CRIT_A Output

Sink Current 10 mA

Storage Temperature −65˚C to

+150˚C

Soldering Information, Lead Temperature

SOIC-8 or MSOP-8 Packages (Note

Vapor Phase (60 seconds) 215˚C

Infrared (15 seconds) 220˚C

ESD Susceptibility (Note 4)

Human Body Model 2000 V

Machine Model 200 V

Operating Ratings

(Notes 1, 5)

Operating Temperature Range 0˚C to +125˚C

Electrical Characteristics

Temperature Range T

MIN

≤T

MAX

LM86 0˚C≤T

≤+85˚C

Supply Voltage Range (V

) +3.0V to +3.6V

Temperature-to-Digital Converter Characteristics

Unless otherwise noted, these specifications apply for V

=+3.0Vdc to 3.6Vdc. Boldface limits apply for T

MIN

≤T

MAX

;all other limits T

=+25˚C, unless otherwise noted.

Parameter Conditions Typical Limits Units

(Note 6) (Note 7) (Limit)

Temperature Accuracy Using Local Diode T

= +25˚C to +125˚C, (Note 8) ±1±3˚C (max)

Temperature Accuracy Using Remote Diode of

mobile Pentium III with typical non-ideality of

1.008. For other processors email

hardware.monitor.team@nsc.com to obtain the

latest data. (T

is the Remote Diode Junction

Temperature)

= +30˚C T

= +80˚C ±0.75 ˚C (max)

= +30˚C to

+50˚C

= +60˚C

to +100˚C

±1˚C (max)

= +0˚C to

+85˚C

= +25˚C

to +125˚C

±3˚C (max)

Remote Diode Measurement Resolution 11 Bits

0.125 ˚C

Local Diode Measurement Resolution 8 Bits

1˚C

Conversion Time of All Temperatures at the

Fastest Setting

(Note 10) 31.25 34.4 ms (max)

Quiescent Current (Note 9) SMBus Inactive, 16Hz conversion

rate

0.8 1.7 mA (max)

Shutdown 315 µA

D− Source Voltage 0.7 V

Diode Source Current (D+ − D−)=+ 0.65V; high level 160 315 µA (max)

110 µA (min)

Low level 13 20 µA (max)

7µA (min)

ALERT and T_CRIT_A Output Saturation

Voltage

OUT

= 6.0 mA 0.4 V (max)

Power-On Reset Threshold Measure on V

input, falling

edge

2.4

1.8

V (max)

V (min)

Local and Remote HIGH Default Temperature

settings

(Note 11) +70 ˚C

Local and Remote LOW Default Temperature

settings

(Note 11) 0 ˚C

LM86

www.national.com 4

Temperature-to-Digital Converter Characteristics (Continued)

Unless otherwise noted, these specifications apply for V

=+3.0Vdc to 3.6Vdc. Boldface limits apply for T

MIN

≤T

MAX

;all other limits T

=+25˚C, unless otherwise noted.

Parameter Conditions Typical Limits Units

(Note 6) (Note 7) (Limit)

Local and Remote T_CRIT Default

Temperature Setting

(Note 11) +85 ˚C

Logic Electrical Characteristics

DIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for V

=+3.0 to 3.6 Vdc. Boldface lim-

its apply for T

MIN

to T

MAX

;all other limits T

=+25˚C, unless otherwise noted.

Symbol Parameter Conditions Typical Limits Units

(Note 6) (Note 7) (Limit)

SMBData, SMBCLK INPUTS

IN(1)

Logical “1” Input Voltage 2.1 V (min)

IN(0)

Logical “0”Input Voltage 0.8 V (max)

IN(HYST)

SMBData and SMBCLK Digital

Input Hysteresis

400 mV

IN(1)

Logical “1” Input Current V

0.005 ±10 µA (max)

IN(0)

Logical “0” Input Current V

= 0 V −0.005 ±10 µA (max)

Input Capacitance 5 pF

ALL DIGITAL OUTPUTS

High Level Output Current V

10 µA (max)

SMBus Low Level Output Voltage I

= 4mA

= 6mA

0.4

0.6

V (max)

SMBus DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for V

=+3.0 Vdc to

+3.6 Vdc, C

(load capacitance) on output lines = 80 pF. Boldface limits apply for T

MIN

to T

MAX

;all other limits

= +25˚C, unless otherwise noted. The switching characteristics of the LM86 fully meet or exceed the published specifi-

cations of the SMBus version 2.0. The following parameters are the timing relationships between SMBCLK and SMBData sig-

nals related to the LM86. They adhere to but are not necessarily the SMBus bus specifications.

Symbol Parameter Conditions Typical Limits Units

(Note 6) (Note 7) (Limit)

SMB

SMBus Clock Frequency 100

kHz (max)

kHz (min)

LOW

SMBus Clock Low Time from V

IN(0)

max to

IN(0)

max

4.7

µs (min)

ms (max)

HIGH

SMBus Clock High Time from V

IN(1)

min to V

IN(1)

min 4.0 µs (min)

R,SMB

SMBus Rise Time (Note 12) 1 µs (max)

F,SMB

SMBus Fall Time (Note 13) 0.3 µs (max)

Output Fall Time C

= 400pF,

= 3mA, (Note 13)

250 ns (max)

TIMEOUT

SMBData and SMBCLK Time Low for

Reset of Serial Interface (Note 14)

ms (min)

ms (max)

SU;DAT

Data In Setup Time to SMBCLK High 250 ns (min)

HD;DAT

Data Out Stable after SMBCLK Low 300

900

ns (min)

ns (max)

HD;STA

Start Condition SMBData Low to SMBCLK

Low (Start condition hold before the first

clock falling edge)

100 ns (min)

SU;STO

Stop Condition SMBCLK High to SMBData

Low (Stop Condition Setup)

100 ns (min)

SU;STA

SMBus Repeated Start-Condition Setup

Time, SMBCLK High to SMBData Low

0.6 µs (min)

LM86

www.national.com5

SMBus DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for V

=+3.0 Vdc to

+3.6 Vdc, C

(load capacitance) on output lines = 80 pF. Boldface limits apply for T

MIN

to T

MAX

;all other limits

= +25˚C, unless otherwise noted. The switching characteristics of the LM86 fully meet or exceed the published specifi-

cations of the SMBus version 2.0. The following parameters are the timing relationships between SMBCLK and SMBData sig-

nals related to the LM86. They adhere to but are not necessarily the SMBus bus specifications.

Symbol Parameter Conditions Typical Limits Units

(Note 6) (Note 7) (Limit)

BUF

SMBus Free Time Between Stop and Start

Conditions

1.3 µs (min)

SMBus Communication

10130340

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating

the device beyond its rated operating conditions.

Note 2: When the input voltage (VI) at any pin exceeds the power supplies (VI<GND or VI>VDD), the current at that pin should be limited to 5 mA.

Parasitic components and or ESD protection circuitry are shown in the figure below for the LM86’s pins. The nominal breakdown voltage of D3 is 6.5 V. Care should

be taken not to forward bias the parasitic diode, D1, present on pins: D+, D−. Doing so by more than 50 mV may corrupt a temperature measurements.

Pin Name PIN #D1 D2 D3 D4 D5 D6 R1 SNP ESD CLAMP

(V+) 1 x x

D+ 2 xx xxx x

D− 3 xx xxx x

T_CRIT_A 4xxx

ALERT 6xxx

SMBData 7 x x x

SMBCLK 8 x

Note: An “x” indicates that the diode exists.

Note 3: See the URL ”http://www.national.com/packaging/“ for other recommendations and methods of soldering surface mount devices.

Note 4: Human body model, 100pF discharged through a 1.5kΩresistor. Machine model, 200pF discharged directly into each pin.

Note 5: Thermal resistance junction-to-ambient when attached to a printed circuit board with 2 oz. foil:

– SOIC-8 = 168˚C/W

– MSOP-8 = 210˚C/W

Note 6: Typicals are at TA= 25˚C and represent most likely parametric norm.

Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

10130313

FIGURE 1. ESD Protection Input Structure

LM86

www.national.com 6

Note 8: Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power

dissipation of the LM86 and the thermal resistance. See (Note 5) for the thermal resistance to be used in the self-heating calculation.

Note 9: Quiescent current will not increase substantially with an SMBus.

Note 10: This specification is provided only to indicate how often temperature data is updated. The LM86 can be read at any time without regard to conversion state

(and will yield last conversion result).

Note 11: Default values set at power up.

Note 12: The output rise time is measured from (VIN(0)max + 0.15V) to (VIN(1)min − 0.15V).

Note 13: The output fall time is measured from (VIN(1)min - 0.15V) to (VIN(1)min + 0.15V).

Note 14: Holding the SMBData and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM86’s SMBus state machine, therefore setting

SMBData and SMBCLK pins to a high impedance state.

1.0 Functional Description

The LM86 temperature sensor incorporates a delta V

based temperature sensor using a Local or Remote diode

and a 10-bit plus sign ADC (Delta-Sigma Analog-to-Digital

Converter). The LM86 is compatible with the serial SMBus

version 2.0 two-wire interface. Digital comparators compare

the measured Local Temperature (LT) to the Local High

(LHS), Local Low (LLS) and Local T_CRIT (LCS) user-

programmable temperature limit registers. The measured

Remote Temperature (RT) is digitally compared to the Re-

mote High (RHS), Remote Low (RLS) and Remote T_CRIT

(RCS) user-programmable temperature limit registers. Acti-

vation of the ALERT output indicates that a comparison is

greater than the limit preset in a T_CRIT or HIGH limit

The T_CRIT_A output responds as a true comparator with

built in hysteresis. The hysteresis is set by the value placed

in the Hysteresis register (TH). Activation of T_CRIT_A oc-

curs when the temperature is above the T_CRIT setpoint.

T_CRIT_A remains activated until the temperature goes be-

low the setpoint calculated by T_CRIT − TH. The hysteresis

perature readings.

The LM86 may be placed in a low power consumption

(Shutdown) mode by setting the RUN/STOP bit found in the

Configuration register. In the Shutdown mode, the LM86’s

SMBus interface remains while all circuitry not required is

turned off.

The Local temperature reading and setpoint data registers

are 8-bits wide. The format of the 11-bit remote temperature

data is a 16-bit left justified word. Two 8-bit registers, high

and low bytes, are provided for each setpoint as well as the

temperature reading. Two offset registers (RTOLB and

RTOHB) can be used to compensate for non_ideality error,

discussed further in Section 4.1 DIODE NON-IDEALITY.

The remote temperature reading reported is adjusted by

subtracting from or adding to the actual temperature reading

the value placed in the offset registers.

1.1 CONVERSION SEQUENCE

The LM86 takes approximately 31.25 ms to convert the

Local Temperature (LT), Remote Temperature (RT), and to

update all of its registers. Only during the conversion pro-

cess the busy bit (D7) in the Status register (02h) is high.

These conversions are addressed in a round robin se-

quence. The conversion rate may be modified by the Con-

version Rate Register (04h). When the conversion rate is

modified a delay is inserted between conversions, the actual

conversion time remains at 31.25ms. Different conversion

rates will cause the LM86 to draw different amounts of

supply current as shown in Figure 2.

1.2 THE ALERT OUTPUT

The LM86’s ALERT pin is an active-low open-drain output

that is triggered by a temperature conversion that is outside

the limits defined by the temperature setpoint registers. Re-

set of the ALERT output is dependent upon the selected

method of use. The LM86’s ALERT pin is versatile and will

accommodate three different methods of use to best serve

the system designer: as a temperature comparator, as a

temperature based interrupt flag, and as part of an SMBus

ALERT system. The three methods of use are further de-

scribed below. The ALERT and interrupt methods are differ-

ent only in how the user interacts with the LM86.

Each temperature reading (LT and RT) is associated with a

T_CRIT setpoint register (LCS, RCS), a HIGH setpoint reg-

ister (LHS and RHS) and a LOW setpoint register (LLS and

RLS). At the end of every temperature reading, a digital

comparison determines whether that reading is above its

HIGH or T_CRIT setpoint or below its LOW setpoint. If so,

the corresponding bit in the STATUS REGISTER is set. If the

ALERT mask bit is not high, any bit set in the STATUS

(D2), will cause the ALERT output to be pulled low. Any

temperature conversion that is out of the limits defined by the

temperature setpoint registers will trigger an ALERT. Addi-

tionally, the ALERT mask bit in the Configuration register

must be cleared to trigger an ALERT in all modes.

1.2.1 ALERT Output as a Temperature Comparator

When the LM86 is implemented in a system in which it is not

serviced by an interrupt routine, the ALERT output could be

used as a temperature comparator. Under this method of

use, once the condition that triggered the ALERT to go low is

10130339

FIGURE 2. Conversion Rate Effect on Power Supply

Current

LM86

www.national.com7

1.0 Functional Description (Continued)

no longer present, the ALERT is de-asserted (Figure 3). For

example, if the ALERT output was activated by the compari-

son of LT >LHS, when this condition is no longer true the

ALERT will return HIGH. This mode allows operation without

software intervention, once all registers are configured dur-

ing set-up. In order for the ALERT to be used as a tempera-

ture comparator, bit D0 (the ALERT configure bit) in the

FILTER and ALERT CONFIGURE REGISTER (xBF) must

be set high. This is not the power on default default state.

1.2.2 ALERT Output as an Interrupt

The LM86’s ALERT output can be implemented as a simple

interrupt signal when it is used to trigger an interrupt service

routine. In such systems it is undesirable for the interrupt flag

to repeatedly trigger during or before the interrupt service

routine has been completed. Under this method of operation,

during a read of the STATUS REGISTER the LM86 will set

the ALERT mask bit (D7 of the Configuration register) if any

bit in the STATUS REGISTER is set, with the exception of

Busy (D7) and OPEN (D2). This prevents further ALERT

triggering until the master has reset the ALERT mask bit, at

the end of the interrupt service routine. The STATUS REG-

ISTER bits are cleared only upon a read command from the

master (see Figure 4) and will be re-asserted at the end of

the next conversion if the triggering condition(s) persist(s). In

order for the ALERT to be used as a dedicated interrupt

signal, bit D0 (the ALERT configure bit) in the FILTER and

ALERT CONFIGURE REGISTER (xBF) must be set low.

This is the power on default state.

The following sequence describes the response of a system

that uses the ALERT output pin as a interrupt flag:

1. Master Senses ALERT low

2. Master reads the LM86 STATUS REGISTER to deter-

mine what caused the ALERT

3. LM86 clears STATUS REGISTER, resets the ALERT

HIGH and sets the ALERT mask bit (D7 in the Configu-

ration register).

4. Master attends to conditions that caused the ALERT to

be triggered. The fan is started, setpoint limits are ad-

justed, etc.

5. Master resets the ALERT mask (D7 in the Configuration

1.2.3 ALERT Output as an SMBus ALERT

When the ALERT output is connected to one or more ALERT

outputs of other SMBus compatible devices and to a master,

an SMBus alert line is created. Under this implementation,

the LM86’s ALERT should be operated using the ARA (Alert

Response Address) protocol. The SMBus 2.0 ARA protocol,

defined in the SMBus specification 2.0, is a procedure de-

signed to assist the master in resolving which part generated

an interrupt and service that interrupt while impeding system

operation as little as possible.

The SMBus alert line is connected to the open-drain ports of

all devices on the bus thereby AND’ing them together. The

ARA is a method by which with one command the SMBus

master may identify which part is pulling the SMBus alert line

LOW and prevent it from pulling it LOW again for the same

triggering condition. When an ARA command is received by

all devices on the bus, the devices pulling the SMBus alert

line LOW, first, send their address to the master and second,

release the SMBus alert line after recognizing a successful

transmission of their address.

The SMBus 1.1 and 2.0 specification state that in response

to an ARA (Alert Response Address) “after acknowledging

the slave address the device must disengage its SMBALERT

pulldown”. Furthermore, “if the host still sees SMBALERT

low when the message transfer is complete, it knows to read

the ARA again”. This SMBus “disengaging of SMBALERT”

requirement prevents locking up the SMBus alert line. Com-

petitive parts may address this “disengaging of SMBALERT”

requirement differently than the LM86 or not at all. SMBus

systems that implement the ARA protocol as suggested for

the LM86 will be fully compatible with all competitive parts.

The LM86 fulfills “disengaging of SMBALERT” by setting the

ALERT mask bit (bit D7 in the Configuration register, at

address 09h) after successfully sending out its address in

response to an ARA and releasing the ALERT output pin.

Once the ALERT mask bit is activated, the ALERT output pin

will be disabled until enabled by software. In order to enable

the ALERT the master must read the STATUS REGISTER,

at address 02h, during the interrupt service routine and then

reset the ALERT mask bit in the Configuration register to 0 at

the end of the interrupt service routine.

The following sequence describes the ARA response proto-

col.

10130331

FIGURE 3. ALERT Comparator Temperature Response

Diagram

10130328

FIGURE 4. ALERT Output as an Interrupt Temperature

Response Diagram

LM86

www.national.com 8

1.0 Functional Description (Continued)

1. Master Senses SMBus alert line low

2. Master sends a START followed by the Alert Response

Address (ARA) with a Read Command.

3. Alerting Device(s) send ACK.

4. Alerting Device(s) send their Address. While transmitting

their address, alerting devices sense whether their ad-

dress has been transmitted correctly. (The LM86 will

reset its ALERT output and set the ALERT mask bit once

its complete address has been transmitted successfully.)

5. Master/slave NoACK

6. Master sends STOP

7. Master attends to conditions that caused the ALERT to

be triggered. The STATUS REGISTER is read and fan

started, setpoint limits adjusted, etc.

8. Master resets the ALERT mask (D7 in the Configuration

The ARA, 000 1100, is a general call address. No device

should ever be assigned this address.

Bit D0 (the ALERT configure bit) in the FILTER and ALERT

CONFIGURE REGISTER (xBF) must be set low in order for

the LM86 to respond to the ARA command.

The ALERT output can be disabled by setting the ALERT

mask bit, D7, of the Configuration register. The power on

default is to have the ALERT mask bit and the ALERT

configure bit low.

1.3 T_CRIT_A OUTPUT and T_CRIT LIMIT

T_CRIT_A is activated when any temperature reading is

greater than the limit preset in the critical temperature set-

point register (T_CRIT), as shown in Figure 6. The Status

alarm. A bit in the Status Register is set high to indicate

which temperature reading exceeded the T_CRIT setpoint

temperature and caused the alarm, see Section 2.3.

Local and remote temperature diodes are sampled in se-

quence by the A/D converter. The T_CRIT_A output and the

Status Register flags are updated after every Local and

Remote temperature conversion. T_CRT_A follows the state

of the comparison, it is reset when the temperature falls

below the setpoint RCS-TH. The Status Register flags are

reset only after the Status Register is read and if a tempera-

ture conversion(s) is/are below the T_CRIT setpoint, as

shown in . Figure 6

1.4 POWER ON RESET DEFAULT STATES

LM86 always powers up to these known default states. The

LM86 remains in these states until after the first conversion.

1. Command Register set to 00h

2. Local Temperature set to 0˚C

3. Remote Diode Temperature set to 0˚C until the end of

the first conversion.

4. Status Register set to 00h.

5. Configuration register set to 00h; ALERT enabled, Re-

mote T_CRIT alarm enabled and Local T_CRIT alarm

enabled

6. 85˚C Local and Remote T_CRIT temperature setpoints

7. 70˚C Local and Remote HIGH temperature setpoints

8. 0˚C Local and Remote LOW temperature setpoints

9. Filter and Alert Configure Register set to 00h; filter dis-

abled, ALERT output set as an SMBus ALERT

10. Conversion Rate Register set to 8h; conversion rate set

to 16 conv./sec.

1.5 SMBus INTERFACE

The LM86 operates as a slave on the SMBus, so the

SMBCLK line is an input and the SMBData line is bi-

directional. The LM86 never drives the SMBCLK line and it

does not support clock stretching. According to SMBus

specifications, the LM86 has a 7-bit slave address. All bits A6

through A0 are internally programmed and can not be

changed by software or hardware.

The complete slave address is:

A6 A5 A4 A3 A2 A1 A0

1001100

1.6 TEMPERATURE DATA FORMAT

Temperature data can only be read from the Local and

Remote Temperature registers; the setpoint registers

(T_CRIT, LOW, HIGH) are read/write.

Remote temperature data is represented by an 11-bit, two’s

complement word with an LSB (Least Significant Bit) equal

to 0.125˚C. The data format is a left justified 16-bit word

available in two 8-bit registers:

10130329

FIGURE 5. ALERT Output as an SMBus ALERT

Temperature Response Diagram

10130306

FIGURE 6. T_CRIT_A Temperature Response Diagram

LM86

www.national.com9

1.0 Functional Description (Continued)

Temperature Digital Output

Binary Hex

+125˚C 0111 1101 0000 0000 7D00h

+25˚C 0001 1001 0000 0000 1900h

+1˚C 0000 0001 0000 0000 0100h

+0.125˚C 0000 0000 0010 0000 0020h

0˚C 0000 0000 0000 0000 0000h

−0.125˚C 1111 1111 1110 0000 FFE0h

−1˚C 1111 1111 0000 0000 FF00h

−25˚C 1110 0111 0000 0000 E700h

−55˚C 1100 1001 0000 0000 C900h

Local Temperature data is represented by an 8-bit, two’s

complement byte with an LSB (Least Significant Bit) equal to

1˚C:

Temperature Digital Output

Binary Hex

+125˚C 0111 1101 7Dh

+25˚C 0001 1001 19h

+1˚C 0000 0001 01h

0˚C 0000 0000 00h

−1˚C 1111 1111 FFh

−25˚C 1110 0111 E7h

−55˚C 1100 1001 C9h

1.7 OPEN-DRAIN OUTPUTS

The SMBData, ALERT and T_CRIT_A outputs are open-

drain outputs and do not have internal pull-ups. A “high” level

will not be observed on these pins until pull-up current is

provided by some external source, typically a pull-up resis-

tor. Choice of resistor value depends on many system fac-

tors but, in general, the pull-up resistor should be as large as

possible. This will minimize any internal temperature reading

errors due to internal heating of the LM86. The maximum

resistance of the pull-up to provide a 2.1V high level, based

on LM86 specification for High Level Output Current with the

supply voltage at 3.0V, is 82kΩ(5%) or 88.7kΩ(1%).

1.8 DIODE FAULT DETECTION

The LM86 is equipped with operational circuitry designed to

detect fault conditions concerning the remote diode. In the

event that the D+ pin is detected as shorted to V

floating, the Remote Temperature High Byte (RTHB) register

is loaded with +127˚C, the Remote Temperature Low Byte

(RTLB) register is loaded with 0, and the OPEN bit (D2) in

the status register is set. As a result, if the Remote T_CRIT

setpoint register (RCS) is set to a value less than +127˚C the

ALERT and T_Crit output pins will be pulled low, if the Alert

Mask and T_Crit Mask are disabled. If the Remote HIGH

Setpoint High Byte Register (RHSHB) is set to a value less

than +127˚C then ALERT will be pulled low, if the Alert Mask

is disabled. The OPEN bit itself will not trigger and ALERT.

In the event that the D+ pin is shorted to ground or D−, the

Remote Temperature High Byte (RTHB) register is loaded

with −128˚C (1000 0000) and the OPEN bit (D2) in the status

is beyond it’s operational limits, this temperature reading

represents this shorted fault condition. If the value in the

Remote Low Setpoint High Byte Register (RLSHB) is more

than −128˚C and the Alert Mask is disabled, ALERT will be

pulled low.

Remote diode temperature sensors that have been previ-

ously released and are competitive with the LM86 output a

code of 0˚C if the external diode is short-circuited. This

change is an improvement that allows a reading of 0˚C to be

truly interpreted as a genuine 0˚C reading and not a fault

condition.

1.9 COMMUNICATING with the LM86

The data registers in the LM86 are selected by the Com-

mand Register. At power-up the Command Register is set to

“00”, the location for the Read Local Temperature Register.

The Command Register latches the last location it was set

to. Each data register in the LM86 falls into one of four types

of user accessibility:

1. Read only

2. Write only

3. Read/Write same address

4. Read/Write different address

AWrite to the LM86 will always include the address byte and

the command byte. A write to any register requires one data

byte.

Reading the LM86 can take place either of two ways:

1. If the location latched in the Command Register is cor-

rect (most of the time it is expected that the Command

isters because that will be the data most frequently read

from the LM86), then the read can simply consist of an

address byte, followed by retrieving the data byte.

2. If the Command Register needs to be set, then an

address byte, command byte, repeat start, and another

address byte will accomplish a read.

The data byte has the most significant bit first. At the end of

a read, the LM86 can accept either acknowledge or No

Acknowledge from the Master (No Acknowledge is typically

used as a signal for the slave that the Master has read its

last byte). It takes the LM86 31.25ms to measure the tem-

perature of the remote diode and internal diode. When re-

trieving all 10 bits from a previous remote diode temperature

measurement, the master must insure that all 10 bits are

from the same temperature conversion. This may be

achieved by using one-shot mode or by setting the conver-

sion rate and monitoring the busy bit such that no conversion

occurs in between reading the MSB and LSB of the last

temperature conversion.

LM86

www.national.com 10

1.0 Functional Description (Continued) 1.9.1 SMBus Timing Diagrams

1.10 SERIAL INTERFACE RESET

In the event that the SMBus Master is RESET while the

LM86 is transmitting on the SMBData line, the LM86 must be

returned to a known state in the communication protocol.

This may be done in one of two ways:

1. When SMBData is LOW, the LM86 SMBus state ma-

chine resets to the SMBus idle state if either SMBData

or SMBCLK are held low for more than 35ms (t

TIMEOUT

Note that according to SMBus specification 2.0 all de-

vices are to timeout when either the SMBCLK or SMB-

Data lines are held low for 25-35ms. Therefore, to insure

a timeout of all devices on the bus the SMBCLK or

SMBData lines must be held low for at least 35ms.

2. When SMBData is HIGH, have the master initiate an

SMBus start. The LM86 will respond properly to an

SMBus start condition at any point during the communi-

cation. After the start the LM86 will expect an SMBus

Address address byte.

1.11 DIGITAL FILTER

In order to suppress erroneous remote temperature readings

due to noise, the LM86 incorporates a user-configured digital

filter. The filter is accessed in the FILTER and ALERT CON-

FIGURE REGISTER at BFh. The filter can be set according

to the following table.

10130310

(a) Serial Bus Write to the internal Command Register followed by a the Data Byte

10130311

(b) Serial Bus Write to the Internal Command Register

10130312

FIGURE 7. SMBus Timing Diagrams

LM86

www.national.com11

1.0 Functional Description (Continued)

D2 D1 Filter

0 0 No Filter

0 1 Level 1

1 0 Level 1

1 1 Level 2

Level 2 sets maximum filtering.

Figure 8 depict the filter output to in response to a step input

and an impulse input. Figure 9 depicts the digital filter in use

in a Pentium 4 processor system. Note that the two curves,

with filter and without, have been purposely offset so that

both responses can be clearly seen. Inserting the filter does

not induce an offset as shown.

10130325

a)Step Response

10130326

b)Impulse Response

FIGURE 8. Filter Output Response to a Step Input

10130327

FIGURE 9. Digital Filter Response in a Pentium 4 processor System. The filter on and off curves were purposely

offset to better show noise performance.

LM86

www.national.com 12

1.0 Functional Description (Continued)

1.12 Fault Queue

In order to suppress erroneous ALERT or T_CRIT triggering

the LM86 incorporates a Fault Queue. The Fault Queue acts

to insure a remote temperature measurement is genuinely

beyond a HIGH, LOW or T_CRIT setpoint by not triggering

until three consecutive out of limit measurements have been

made, see Figure 10. The fault queue defaults off upon

power-up and may be activated by setting bit D0 in the

Configuration register (09h) to “1”.

1.13 One-Shot Register

The One-Shot register is used to initiate a single conversion

and comparison cycle when the device is in standby mode,

after which the device returns to standby. This is not a data

conversion. The data written to this address is irrelevant and

is not stored. A zero will always be read from this register.

2.0 LM86 REGISTERS

2.1 COMMAND REGISTER

Selects which registers will be read from or written to. Data for this register should be transmitted during the Command Byte of

the SMBus write communication.

P7 P6 P5 P4 P3 P2 P1 P0

Command Select

P0-P7: Command Select

Command Select Address Power On Default State Register

Name

Read Address

<P7:P0>hex

Write Address

<P7:P0>hex

<D7:D0>binary <D7:D0>

decimal

00h NA 0000 0000 0 LT Local Temperature

01h NA 0000 0000 0 RTHB Remote Temperature High Byte

02h NA 0000 0000 0 SR Status Register

03h 09h 0000 0000 0 C Configuration

04h 0Ah 0000 1000 8 (16 conv./sec) CR Conversion Rate

05h 0Bh 0100 0110 70 LHS Local HIGH Setpoint

06h 0Ch 0000 0000 0 LLS Local LOW Setpoint

07h 0Dh 0100 0110 70 RHSHB Remote HIGH Setpoint High

Byte

08h 0Eh 0000 0000 0 RLSHB Remote LOW Setpoint High

Byte

NA 0Fh One Shot Writing to this register will

initiate a one shot conversion

10h NA 0000 0000 0 RTLB Remote Temperature Low Byte

10130330

FIGURE 10. Fault Queue Temperature Response

Diagram

LM86

www.national.com13

2.0 LM86 REGISTERS (Continued)

Command Select Address Power On Default State Register

Name

Read Address

<P7:P0>hex

Write Address

<P7:P0>hex

<D7:D0>binary <D7:D0>

decimal

11h 11h 0000 0000 0 RTOHB Remote Temperature Offset

High Byte

12h 12h 0000 0000 0 RTOLB Remote Temperature Offset

Low Byte

13h 13h 0000 0000 0 RHSLB Remote HIGH Setpoint Low

Byte

14h 14h 0000 0000 0 RLSLB Remote LOW Setpoint Low

Byte

19h 19h 0101 0101 85 RCS Remote T_CRIT Setpoint

20h 20h 0101 0101 85 LCS Local T_CRIT Setpoint

21h 21h 0000 1010 10 TH T_CRIT Hysteresis

B0h-BEh B0h-BEh Manufacturers Test Registers

BFh BFh 0000 0000 0 RDTF Remote Diode Temperature

Filter

FEh NA 0000 0001 1 RMID Read Manufacturer’s ID

FFh NA 0001 0001 17 RDR Read Stepping or Die Revision

Code

2.2 LOCAL and REMOTE TEMPERATURE REGISTERS (LT, RTHB, RTLB)

(Read Only Address 00h, 01h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value SIGN 64 32 16 8 4 2 1

For LT and RTHB D7–D0: Temperature Data. LSB = 1˚C. Two’s complement format.

(Read Only Address 10h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value 0.5 0.25 0.125 00000

For RTLB D7–D5: Temperature Data. LSB = 0.125˚C. Two’s complement format.

The maximum value available from the Local Temperature register is 127; the minimum value available from the Local

Temperature register is -128. The maximum value available from the Remote Temperature register is 127.875; the minimum value

available from the Remote Temperature registers is −128.875.

2.3 STATUS REGISTER (SR)

(Read Only Address 02h):

D7 D6 D5 D4 D3 D2 D1 D0

Busy LHIGH LLOW RHIGH RLOW OPEN RCRIT LCRIT

Power up default is with all bits “0” (zero).

D0: LCRIT: When set to “1” indicates a Local Critical Temperature alarm.

D1: RCRIT: When set to “1” indicates a Remote Diode Critical Temperature alarm.

D2: OPEN: When set to “1” indicates a Remote Diode disconnect.

D3: RLOW: When set to “1” indicates a Remote Diode LOW Temperature alarm

D4: RHIGH: When set to “1” indicates a Remote Diode HIGH Temperature alarm.

D5: LLOW: When set to “1” indicates a Local LOW Temperature alarm.

D6: LHIGH: When set to “1” indicates a Local HIGH Temperature alarm.

D7: Busy: When set to “1” ADC is busy converting.

LM86

www.national.com 14

2.0 LM86 REGISTERS (Continued)

2.4 CONFIGURATION REGISTER

(Read Address 03h /Write Address 09h):

D7 D6 D5 D4 D3 D2 D1 D0

ALERT mask RUN/STOP 0 Remote

T_CRIT_A

mask

0 Local

T_CRIT_A

mask

0 Fault Queue

Power up default is with all bits “0” (zero)

D7: ALERT mask: When set to “1” ALERT interrupts are masked.

D6: RUN/STOP: When set to “1” SHUTDOWN is enabled.

D5: is not defined and defaults to “0”.

D4: Remote T_CRIT mask: When set to “1” a diode temperature reading that exceeds T_CRIT setpoint will not activate the

T_CRIT_A pin.

D3: is not defined and defaults to “0”.

D2: Local T_CRIT mask: When set to “1” a Local temperature reading that exceeds T_CRIT setpoint will not activate the

T_CRIT_A pin.

D1: is not defined and defaults to “0”.

D0: Fault Queue: when set to “1” three consecutive remote temperature measurements outside the HIGH, LOW, or T_CRIT

setpoints will trigger an “Outside Limit” condition resulting in setting of status bits and associated output pins..

2.5 CONVERSION RATE REGISTER

(Read Address 04h /Write

Address 0Ah)

Value Conversion

Rate

00 62.5 mHz

01 125 mHz

02 250 mHz

03 500 mHz

04 1 Hz

05 2 Hz

(Read Address 04h /Write

Address 0Ah)

Value Conversion

Rate

06 4 Hz

07 8 Hz

08 16 Hz

09 32 Hz

10-255 Undefined

2.6 LOCAL and REMOTE HIGH SETPOINT REGISTERS (LHS, RHSHB, and RHSLB)

(Read Address 05h, 07h /Write Address 0Bh, 0Dh):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value SIGN 64 32 16 8 4 2 1

For LHS and RHSHB: HIGH setpoint temperature data. Power up default is LHIGH = RHIGH = 70˚C. 1LSB = 1˚C. Two’s

complement format.

(Read/Write Address 13h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value 0.5 0.25 0.125 00000

For RHSLB: Remote HIGH Setpoint Low Byte temperature data. Power up default is 0˚C. 1LSB = 0.125˚C. Two’s complement

format.

2.7 LOCAL and REMOTE LOW SETPOINT REGISTERS (LLS, RLSHB, and RLSLB)

(Read Address 06h, 08h, /Write Address 0Ch, 0Eh):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value SIGN 64 32 16 8 4 2 1

For LLS and RLSHB: HIGH setpoint temperature data. Power up default is LHIGH = RHIGH = 0˚C. 1LSB = 1˚C. Two’s

complement format.

(Read/Write Address 14h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value 0.5 0.25 0.125 00000

LM86

www.national.com15

2.0 LM86 REGISTERS (Continued)

For RLSLB: Remote HIGH Setpoint Low Byte temperature data. Power up default is 0˚C. 1LSB = 0.125˚C. Two’s complement

format.

2.8 REMOTE TEMPERATURE OFFSET REGISTERS (RTOHB and RTOLB)

(Read/Write Address 11h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value SIGN 64 32 16 8 4 2 1

For RTOHB: Remote Temperature Offset High Byte. Power up default is LHIGH = RHIGH = 0˚C. 1LSB = 1˚C. Two’s complement

format.

(Read/Write Address 12h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value 0.5 0.25 0.125 00000

For RTOLB: Remote Temperature Offset High Byte. Power up default is 0˚C. 1LSB = 0.125˚C. Two’s complement format.

The offset value written to these registers will automatically be added to or subtracted from the remote temperature measurement

that will be reported in the Remote Temperature registers.

2.9 LOCAL and REMOTE T_CRIT REGISTERS (RCS and LCS)

(Read/Write Address 20h, 19h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value SIGN 64 32 16 8 4 2 1

D7–D0: T_CRIT setpoint temperature data. Power up default is T_CRIT = 85˚C. 1 LSB = 1˚C, two’s complement format.

2.10 T_CRIT HYSTERESIS REGISTER (TH)

(Read and Write Address 21h):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value 168421

D7–D0: T_CRIT Hysteresis temperature. Power up default is TH = 10˚C. 1 LSB = 1˚C, maximum value = 31.

2.11 FILTER and ALERT CONFIGURE REGISTER

(Read and Write Address BFh):

BIT D7 D6 D5 D4 D3 D2 D1 D0

Value 00000Filter Level ALERT

Configure

D7-D3: is not defined defaults to "0".

D2-D1: input filter setting as defined the table below:

D2 D1 Filter Level

0 0 No Filter

0 1 Level 1

1 0 Level 1

1 1 Level 2

Level 2 sets maximum filtering.

D0: when set to "1" comparator mode is enabled.

2.12 MANUFACTURERS ID REGISTER

(Read Address FEh) Default value 01h.

2.13 DIE REVISION CODE REGISTER

(Read Address FFh) Default value 11hexadecimal or 17 decimal. This register will increment by 1 every time there is a revision

to the die by National Semiconductor.

3.0 Application Hints

The LM86 can be applied easily in the same way as other

integrated-circuit temperature sensors, and its remote diode

sensing capability allows it to be used in new ways as well.

It can be soldered to a printed circuit board, and because the

path of best thermal conductivity is between the die and the

LM86

www.national.com 16

3.0 Application Hints (Continued)

pins, its temperature will effectively be that of the printed

circuit board lands and traces soldered to the LM86’s pins.

This presumes that the ambient air temperature is almost the

same as the surface temperature of the printed circuit board;

if the air temperature is much higher or lower than the

surface temperature, the actual temperature of the of the

LM86 die will be at an intermediate temperature between the

surface and air temperatures. Again, the primary thermal

conduction path is through the leads, so the circuit board

temperature will contribute to the die temperature much

more strongly than will the air temperature.

To measure temperature external to the LM86’s die, use a

remote diode. This diode can be located on the die of a

target IC, allowing measurement of the IC’s temperature,

independent of the LM86’s temperature. The LM86 has been

optimized to measure the remote diode of a Pentium III

processor as shown in Figure 11. A discrete diode can also

be used to sense the temperature of external objects or

ambient air. Remember that a discrete diode’s temperature

will be affected, and often dominated, by the temperature of

its leads.

Most silicon diodes do not lend themselves well to this

application. It is recommended that a 2N3904 transistor

base emitter junction be used with the collector tied to the

base.

A diode connected 2N3904 approximates the junction avail-

able on a Pentium III microprocessor for temperature mea-

surement. Therefore, the LM86 can sense the temperature

of this diode effectively.

3.1 DIODE NON-IDEALITY

3.1.1 Diode Non-Ideality Factor Effect on Accuracy

When a transistor is connected as a diode, the following

relationship holds for variables V

, T and I

where:

•q = 1.6x10

−19

Coulombs (the electron charge),

•T = Absolute Temperature in Kelvin

•k = 1.38x10

−23

joules/K (Boltzmann’s constant),

•ηis the non-ideality factor of the process the diode is

manufactured on,

•I

= Saturation Current and is process dependent,

•I

= Forward Current through the base emitter junction

•V

= Base Emitter Voltage drop

In the active region, the -1 term is negligible and may be

eliminated, yielding the following equation

In the above equation, ηand I

are dependant upon the

process that was used in the fabrication of the particular

diode. By forcing two currents with a very controlled ration

(N) and measuring the resulting voltage difference, it is

possible to eliminate the I

term. Solving for the forward

voltage difference yields the relationship:

The non-ideality factor, η, is the only other parameter not

accounted for and depends on the diode that is used for

measurement. Since ∆V

is proportional to both ηand T,

the variations in ηcannot be distinguished from variations in

temperature. Since the non-ideality factor is not controlled by

the temperature sensor, it will directly add to the inaccuracy

of the sensor. For the Pentium III Intel specifies a ±1%

variation in ηfrom part to part. As an example, assume a

temperature sensor has an accuracy specification of ±1˚C at

room temperature of 25 ˚C and the process used to manu-

facture the diode has a non-ideality variation of ±1%. The

resulting accuracy of the temperature sensor at room tem-

perature will be:

ACC

=±1˚C+(

±1% of 298 ˚K) = ±4˚C

The additional inaccuracy in the temperature measurement

caused by η, can be eliminated if each temperature sensor is

calibrated with the remote diode that it will be paired with.

The following table shows the variations in non-ideality for a

variety of processors.

Processor Family η, non-ideality

min typ max

Pentium II 1 1.0065 1.0173

Pentium III CPUID 67h 1 1.0065 1.0125

Pentium III CPUID

68h/PGA370Socket/Celeron

1.0057 1.008 1.0125

Pentium 4, 423 pin 0.9933 1.0045 1.0368

Pentium 4, 478 pin 0.9933 1.0045 1.0368

MMBT3904 1.003

AMD Athlon MP model 6 1.002 1.008 1.016

3.1.2 Compensating for Diode Non-Ideality

In order to compensate for the errors introduced by non-

ideality, the temperature sensor is calibrated for a particular

processor. National Semiconductor temperature sensors are

always calibrated to the typical non-ideality of a given pro-

cessor type. The LM86 is calibrated for the non-ideality of a

10130315

Mobile Pentium III or 3904 Temperature vs LM86

Temperature Reading

FIGURE 11.

LM86

www.national.com17

3.0 Application Hints (Continued)

mobile Pentium III processor, 1.008. When a temperature

sensor calibrated for a particular processor type is used with

a different processor type or a given processor type has a

non-ideality that strays from the typical, errors are intro-

duced. Figure 12 shows the minimum and maximum errors

introduced to a temperature sensor calibrated specifically to

the typical value of the processor type it is connected to. The

errors in this figure are attributed only to the variation in

non-ideality from the typical value. In Figure 13 is a plot of

the errors that result from using a temperature sensor cali-

brated for a Pentium II, the LM84, with a typical Pentium 4 or

AMD Athlon MP Model 6.

Temperature errors associated with non-ideality may be re-

duced in a specific temperature range of concern through

use of the offset registers (11h and 12h). Figure 14 shows

how the offset register may be used to compensate for the

non-ideality errors shown in Figure 13. For the case of

non-ideality=1.008, the offset register was set to −0.5˚C

resulting in the calculated residual error as shown in Figure

14. This offset has resulted in an error of less than 0.05˚C for

the temperatures measured in the critical range between 60

to 100˚C. This method yeilds a first order correction factor.

Please send an email to hardware.monitor.team@nsc.com

requesting further information on our recommended setting

of the offset register for different processor types.

10130337

Error Caused by Non-Ideality Factor

FIGURE 12.

10130336

Errors Induced when Temperature Sensor is Not

Calibrated to Typical Non-Ideality

FIGURE 13.

10130338

Compensating for an Untargeted Non-Ideality Factor

FIGURE 14.

LM86

www.national.com 18

3.0 Application Hints (Continued)

3.2 PCB LAYOUT for MINIMIZING NOISE

In a noisy environment, such as a processor mother board,

layout considerations are very critical. Noise induced on

traces running between the remote temperature diode sen-

sor and the LM86 can cause temperature conversion errors.

Keep in mind that the signal level the LM86 is trying to

measure is in microvolts. The following guidelines should be

followed:

1. Place a 0.1 µF power supply bypass capacitor as close

as possible to the V

pin and the recommended 2.2 nF

capacitor as close as possible to the LM86’s D+ and D−

pins. Make sure the traces to the 2.2nF capacitor are

matched.

2. The recommended 2.2nF diode bypass capacitor actu-

ally has a range of TBDpF to 3.3nF. The average tem-

perature accuracy will not degrade. Increasing the ca-

pacitance will lower the corner frequency where

differential noise error affects the temperature reading

thus producing a reading that is more stable. Con-

versely, lowering the capacitance will increase the cor-

ner frequency where differential noise error affects the

temperature reading thus producing a reading that is

less stable.

3. Ideally, the LM86 should be placed within 10cm of the

Processor diode pins with the traces being as straight,

short and identical as possible. Trace resistance of 1Ω

can cause as much as 1˚C of error. This error can be

compensated by using the Remote Temperature Offset

Registers, since the value placed in these registers will

automatically be subtracted from or added to the remote

temperature reading.

4. Diode traces should be surrounded by a GND guard ring

to either side, above and below if possible. This GND

guard should not be between the D+ and D− lines. In the

event that noise does couple to the diode lines it would

be ideal if it is coupled common mode. That is equally to

the D+ and D− lines.

5. Avoid routing diode traces in close proximity to power

supply switching or filtering inductors.

6. Avoid running diode traces close to or parallel to high

speed digital and bus lines. Diode traces should be kept

at least 2cm apart from the high speed digital traces.

7. If it is necessary to cross high speed digital traces, the

diode traces and the high speed digital traces should

cross at a 90 degree angle.

8. The ideal place to connect the LM86’s GND pin is as

close as possible to the Processors GND associated

with the sense diode.

9. Leakage current between D+ and GND should be kept

to a minimum. One nano-ampere of leakage can cause

as much as 1˚C of error in the diode temperature read-

ing. Keeping the printed circuit board as clean as pos-

sible will minimize leakage current.

Noise coupling into the digital lines greater than 400mVp-p

(typical hysteresis) and undershoot less than 500mV below

GND, may prevent successful SMBus communication with

the LM86. SMBus no acknowledge is the most common

symptom, causing unnecessary traffic on the bus. Although

the SMBus maximum frequency of communication is rather

low (100kHz max), care still needs to be taken to ensure

proper termination within a system with multiple parts on the

bus and long printed circuit board traces. An RC lowpass

filter with a 3db corner frequency of about 40MHz is included

on the LM86’s SMBCLK input. Additional resistance can be

added in series with the SMBData and SMBCLK lines to

further help filter noise and ringing. Minimize noise coupling

by keeping digital traces out of switching power supply areas

as well as ensuring that digital lines containing high speed

data communications cross at right angles to the SMBData

and SMBCLK lines.

4.0 Data Sheet Revision History

Date Revision

4/2003 1. Added improved guaranteed Temperature

Error specification for the Remote Diode

Readings of ±0.75oC to page 1 and

Electrical Characteristics.

2. in Section 2.13 changed "21h" to

"11hexadecimal or 17 decimal"

3. Changed numbering of "Applications Hints"

from "4." to "3."

4. Added "4.0 Data Sheet Revision History"

section.

10130317

FIGURE 15. Ideal Diode Trace Layout

LM86

www.national.com19

Physical Dimensions inches (millimeters)

unless otherwise noted

8-Lead (0.150" Wide) Molded Narrow Small-Outline Package (SOIC),

JEDEC Registration Number MS-012

Order Number LM86CIM or LM86CIMX

NS Package Number M08A

LM86

www.national.com 20

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

8-Lead Molded Mini-Small-Outline Package (MSOP),

JEDEC Registration Number MO-187

Order Number LM86CIMM or LM86CIMMX

NS Package Number MUA08A

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL

COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and

whose failure to perform when properly used in

accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a

significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform

can be reasonably expected to cause the failure of

the life support device or system, or to affect its

safety or effectiveness.

National Semiconductor

Americas Customer

Support Center

Email: new.feedback@nsc.com

Tel: 1-800-272-9959

National Semiconductor

Europe Customer Support Center

Fax: +49 (0) 180-530 85 86

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 69 9508 6208

English Tel: +44 (0) 870 24 0 2171

Français Tel: +33 (0) 1 41 91 8790

National Semiconductor

Asia Pacific Customer

Support Center

Email: ap.support@nsc.com

National Semiconductor

Japan Customer Support Center

Fax: 81-3-5639-7507

Email: jpn.feedback@nsc.com

Tel: 81-3-5639-7560

www.national.com

LM86

0.75˚C Accurate, Remote Diode and Local Digital Temperature Sensor with Two-Wire

Interface

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,

and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are

sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where

mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

applications using TI components. To minimize the risks associated with customer products and applications, customers should provide

adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,

or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information

published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a

warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual

property of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied

by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive

business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional

restrictions.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all

express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not

responsible or liable for any such statements.

TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably

be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing

such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products

and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be

provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in

such safety-critical applications.

TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are

specifically designated by TI as military-grade or "enhanced plastic."Only products designated by TI as military-grade meet military

specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at

the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are

designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated

products in automotive applications, TI will not be responsible for any failure to meet such requirements.

Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products Applications

Audio www.ti.com/audio Communications and Telecom www.ti.com/communications

Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers

Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps

DLP®Products www.dlp.com Energy and Lighting www.ti.com/energy

DSP dsp.ti.com Industrial www.ti.com/industrial

Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical

Interface interface.ti.com Security www.ti.com/security

Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community Home Page e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265