@ T2L FAST input and output @ Delays stable and precise @ SO-14 pin pattern @ Wee DIP package (.235 high) @ Available in delays from 5 to 500ns @ Output isolated and with 10 T2L fan-out capacity @ Rise time 4ns maximum design notes The "Wee DIP Series" Logic Delay Lines developed by Engi- neered Components Company have been designed to provide precise delays with required driving and pick-off circuitry con- tained in a single SO-14 surface mount package compatible with FAST TL circuits. These logic delay lines are of hybrid construc- tion utilizing the proven technologies of active integrated circuitry and of passive networks utilizing capacitive, inductive and resis- tive elements. The MTBF on these modules, when calculated per MIL-HDBK-217 fora 50C ground fixed environment, is in excess of 6 million hours. Module design includes compensation for propagation delays and incorporates internal termination at the output; no additional external components are needed to obtain the desired delay. r< surface mount TL COMPATIBLE Wee DIP DELAY LINE The SMFLDBL-TTL is offered in 76 delays from 5 to 500ns. Delay tolerances are maintained as shown in the accompanying part numbertable, when tested under the Test Conditions" shown, Delay time is measured at the +1.5V level on the leading edge, Rise time for all modules is 4ns maximum when measured fram 0.754 to 2.4V, Temperature coefficient of delay is approximately +1200 ppm@C over the operating temperature range of 0 to +70C. These modules accept either logic "1" or logic O" inputs and reproduce the logic at the output without inversion. The delay modules are intended primarily for use with positive going pulses and are calibrated to the tolerances shown in the table on rising edge delay; where best accuracy is desired in applications using falling edge timing, itis recommended that a special unit be calibrated for the specific application. Each module has the capability of driving up to 10 T2L loads. These "Wee DIP Series" modules are packaged in a SO-14 DIP housing, molded of flame-proof Diallyl Phthalate per MIL-M-14, Type SDG-F, and are fully encapsulated in epoxy resin. Leads meet the solderability requirements of MIL-STD-202, Method 208. Leads provide positive standoff fram the printed circuit board to permit solder-fillet formation and flush cleaning of solder-flux residues for improved reliability. Marking consists of manufacturer's logo (EC?), Federal Supply Code, part number, pin one (1) identification and date code of manufacture. All marking is applied by silk screen process using white epoxy paint in accordance with MIL-STD-130, to meet the permanency of identification required by MIL-STD-202, Methad 215. engineered components company 3580 SACRAMENTO DRIVE P.O. BOX 8121, SAN LUIS OBISPO, CA 93403-8121 (805) 544-3800 @ OUTSIDE CALIFORNIA (800) 235-4144 @ FAX (805) 544-8091BLOCK DIAGRAM IS SHOWN BELOW OPERATING SPECIFICATIONS * Veco supply voltage: ......,.....+ 475to5.25V 00 Vee Supply current: noc ee Constant "0" In 2. ee ee 40m<4 typical J Gonctente in ces ea ee a 7mA typical I x x x x MONRGG ss cre cere Sescwee eace enete . 2 min.; Voc max. | | | ! Current... 2... ee Seman mcm 8 2.7V = 20uA max. INPUT Loy} DELAY |_y| OUTPUT 5.5V = 1mA max. | DRIVER LINE BUFFER Logic 0 Input: Vollage. 2... ee omens Haine meee BV max. | CUHBM ts aaa cw ae =| 6mA max. | Logic 1 Voltage out: ..... 2. eee . &F min. aaa ie Logic O Voltage ou we 5 max, Operating temperature range: .. 2... Oto 7OPC. 1 7 Storage temperature:, 2... -55 to +125C. G ee aa * Delays increase or decrease approximately 4% fora respective increase or decrease of 5% in supply voltage. PART NUMBER TABLE MECHANICAL DETAIL IS SHOWN BELOW @ DELAYS AND TOLERANCES {in ns) Part Number Output Part Number Output + _ SMFLOL-TTL-5 5+ 1 SMPLDL-TTL-130 |130+4 500 a SMFLDBL-TTL-6 G+ 1 SMPFLDL-TTL-140 | 140+ 4.5 oO M SMFLDL-TTL-7 7+1 SMFLOL-TTL-150 | 150 + 4.5 * SMFLDL-TTL-8 a+ 1 SMPFLDL-TTL-160 | 160+ 4.5 A M FLDL- SMFLCBL-TTL-9 S+1 SMPFLOL-TTL-170 |17025 200 SMFLDL-TTL-10 10+ 1 SMFLGBL-TTL-180 |180+5.5 @TTL-_ _ SMFLDL-TTL-11. | 1141 |SMFLDL-TTL-190 |190+ 6 SMFLDL-TTL-12 12+1 SMFLDL-TTL-200 |200+ 6 u u SMFLDL-TTL-13 19+1 | SMFLDL-TTL-210 1210+6.5 SMEPLDL-TTL-14 14+1 SMPFLOL-TTL-220 |220+ 7 SMFLDL-TTL-15 15+1 SMEFLBL-TTL-230 | 230 + 7.5 =r f SMFLDL-TTL-16 | 16+1 | SMFLDL-TTL-240 |240+8 2 SMFLDL-TTL-1? 17+ SMFLDOL-TTL-250 | 250 + & | & SMFLDL-TTL-18 | 18+1 | SMFLDL-TTL-260 |260+ 8.5 235 / 9430 SMFLDL-TTL-19 | 19+1 | SMFLOL-TTL-270 |270+9 : 015 SMFLBL-TTL-20 20+ 1 SMFLDL-TTL-280 | 280+ 9.5 MADE IN SLO USA | SMPFLDL-TTL-21 21+1 SMFLDL-TTL-290 |290+ 10 F . SMEFLDL-TTL-22 22+ 1 SMPFLBL-TTL-300 |300+ 10 o | x SMPFLDL-TTL-23 2341 SMFLDL-TTL-310 [310+ 10 150 SMFLOL-TTL-24 e4+ 1 SMPFLDL-TTL-G20 | 320+ 11 TYP | i SMFLDL-TTL-25 25+ 1 SMEFLDL-TTL-330 | 330+ 11 SMFLDBL-TTL-30 30+ 1.5 | SMFLDL-TTL-340 | 340+ 11 300 SMFLOL-TTL-35 95 +1.5 | SMFLDL-TTL-350 | 350+ 11 . SMEPFLDL-TTL-49 4041.5 | SMFLOL-TTL-360 | 360+ 11 SMFLDL-TTL-44 45+2 SMFLOL-TTL-370 | 370+ 12 } SMFLDL-TTL-50 50+2 SMEFLDL-TTL-380 |380+ 12 O. 1. SMFLCBL-TTL-55 55+ 2 SMFLCL-TTL-390 |390+ 12 \ SMPFLDL-TTL-60 60+2 SMPFLDL-TTL-400 |400 + 12 SMFLDOL-TTL-65 65+ 2.5 | SMFLOL-TTL-419 |410+ 13 Sie t- $.022 TYP. | SMFLDL-TTL-70 | 70+ 2.5 | SMFLDL-TTL-420 |420+ 13 SMPFLOL-TTL-75& 7542.5 | SMFLOL-TTL-430 | 430+ 13 SMFLDBL-TTL-80 80+ 2.5 | SMFLOL-TTL-440 | 440+ 14 UW u SMFLOL-TTL-85 A543 SMFLDL-TTL-450 | 4504 14 ~ | SMFLOL-TTL-99 90+3 SMFLDEL-TTL-460 | 4604 14 020 TYP. - SMFLOL-TTL-95 | 9543 | SMFLDL-TTL-470 |470+ 15 SMEPFLDL-TTL-100 ]100+3 SMPFLDL-TTL-480 |480+ 15 SMFLDL-TTL-110 |110+3.5 | SMFLDOL-TTL-490 |490+ 15 TEST CONDITIONS SMFLDL-TTL-120 |120+4 | SMFLDL-TTL-500 |500 + 15 a; 2. od. 4. All measurements are made at 25C. Vee supply voltage is maintained at 5.0V DC. All units are tested using a FAST toggle-type positive input pulse and one FAST T*L load at the output, @ All modules can be operated with a minimum input pulse width of 100% of fulldelay and pulse period approaching square wave; since delay accuracies may be somewhat degraded, it is suggested that the module be evaluated under the intended specific operating Input pulse width used is 100% longer than delay of module conditions. Special modules can be readily manufactured to im- un der test; spacing between pulses (falling edgetorisingedge) = yrove accuracies and/or provide customer specified random delay is three times the pulse width used. times for specific applications. Catalog No. C/O90894