Vishay Siliconix
SiC414
Document Number: 65726
S10-1091-Rev. B, 03-May-10
www.vishay.com
13
counter to prepare for soft-start. The SiC414 then begins a
soft-start cycle. The PWM will shut off if V5V falls below
3.6 V.
LDO Regulator
The device features an integrated LDO regulator with a fixed
output voltage of 5 V. There is also an enable pin (ENL) for
the LDO that provides independent control. The LDO voltage
can also be used to provide the bias voltage for the switching
regulator.
A minimum capacitance of 1 µF referenced to AGND is
normally required at the output of the LDO for stability. If the
LDO is providing bias power to the device, then a minimum
0.1 µF capacitor referenced to AGND is required, along with
a minimum 1 µF capacitor referenced to PGND to filter the
gate drive pulses. Refer to the layout guidelines section.
LDO Start-up
Before start-up, the LDO checks the status of the following
signals to ensure proper operation can be maintained.
1. ENL pin
2. VLDO output
3. VIN input voltage
When the ENL pin is high and VIN is above the UVLO point,
the LDO will begin start-up. During the initial phase, when the
LDO output voltage is near zero, the LDO initiates a
current-limited start-up (typically 85 mA) to charge the output
capacitor. When VLDO has reached 90 % of the final value
(as sensed at the FBL pin), the LDO current limit is increased
to ~ 200 mA and the LDO output is quickly driven to the
nominal value by the internal LDO regulator.
LDO Switchover Function
The SiC414 includes a switch-over function for the LDO. The
switch-over function is designed to increase efficiency by
using the more efficient dc-to-dc converter to power the LDO
output, avoiding the less efficient LDO regulator when
possible. The switch-over function connects the VLDO pin
directly to the VOUT pin using an internal switch. When the
switch-over is complete the LDO is turned off, which results
in a power savings and maximizes efficiency. If the LDO
output is used to bias the SiC414, then after switch-over the
device is self-powered from the switching regulator with the
LDO turned off.
The switch-over logic waits for 32 switching cycles before it
starts the switch-over. There are two methods that determine
the switch-over of VLDO to VOUT.
In the first method, the LDO is already in regulation and the
dc-to-dc converter is later enabled. As soon as the PGOOD
output goes high, the 32 cycles are started. The voltages at
the VLDO and VOUT pins are then compared; if the two
voltages are within ± 300 mV of each other, the VLDO pin
connects to the VOUT pin using an internal switch, and the
LDO is turned off.
In the second method, the dc-to-dc converter is already
running and the LDO is enabled. In this case the 32 cycles
are started as soon as the LDO reaches 90 % of its final
value. At this time, the VLDO and VOUT pins are compared,
and if within ± 300 mV the switch-over occurs and the LDO
is turned off.
Benefits of having a switchover circuit
The switchover function is designed to get maximum
efficiency out of the dc-to-dc converter. The efficiency for an
LDO is very low especially for high input voltages. Using the
switchover function we tie any rails connected to VLDO
through a switch directly to VOUT. Once switchover is
complete LDO is turned off which saves power. This gives us
the maximum efficiency out of the SiC414.
If the LDO output is used to bias the SiC414, then after
switchover the VOUT self biases the SiC414 and operates in
self-powered mode.
Steps to follow when using the on chip LDO to bias the
SiC414:
• Always tie the V5V to VLDO before enabling the LDO
• Enable the LDO before enabling the switcher
• LDO has a current limit of 40 mA at start-up, so do not
connect any load between VLDO and ground
• The current limit for the LDO goes up to 200 mA once the
VLDO reaches 90 % of its final values and can easily supply
the required bias current to the IC.
Switch-over Limitations on VOUT and VLDO
Because the internal switch-over circuit always compares
the VOUT and VLDO pins at start-up, there are limitations on
permissible combinations of VOUT and VLDO. Consider the
case where VOUT is programmed to 1.5 V and VLDO is
programmed to 1.8 V. After start-up, the device would
connect VOUT to VLDO and disable the LDO, since the two
voltages are within the ± 300 mV switch-over window.
To avoid unwanted switch-over, the minimum difference
between the voltages for VOUT and VLDO should be
± 500 mV.
It is not recommended to use the switch-over feature for an
output voltage less than 3 V since this does not provide
sufficient voltage for the gate-source drive to the internal
p-channel switch-over MOSFET.
Switch-Over MOSFET Parasitic Diodes
The switch-over MOSFET contains parasitic diodes that are
inherent to its construction, as shown in figure 10.
Figure 9 - LDO Start-Up
Constant current startup
VVLDO final
90 % of VVLDO final
Voltage regulating with
~ 200 mA current limit