Low Power, High Speed
CCD Buffer Amplifier
ADA4800
Rev. A
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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FEATURES
Integrated active load and gain of 1 buffer
Very low buffer power consumption
As low as 20 mW on chip
Power save feature to reduce active load current by GPO
control
High buffer speed
400 MHz, −3 dB bandwidth
415 V/μs slew rate
Fast settling time to 1%, 2 V step: 5 ns
Adjustable buffer bandwidth
Push-pull output stage
Adjustable active load current
Small package: 1.6 mm × 1.6 mm × 0.55 mm
APPLICATIONS
CCD image sensor output buffer
Digital still cameras
Camcorders
FUNCTIONAL BLOCK DIAGRAM
09162-001
6
ISF
1
IN
5
VCC
I
AL
I
BUFF
I
CC
2
VEE
4
IDRV
3
O
UT
ADA4800
+1
I
IDRV
I
ISF
Figure 1.
GENERAL DESCRIPTION
The ADA4800 is voltage buffer integrated with an active load.
The buffer is a low power, high speed, low noise, high slew rate,
fast settling, fixed gain of 1 monolithic amplifier for charge-
coupled device (CCD) applications. For CCD applications, the
active load current source (IAL) can load the open source CCD
sensor outputs and the buffer can drive the AFE load. The active
current load can also be switched off, to use the ADA4800 as just
a unity gain buffer. The buffer consumes only 20 mW of static
power. In applications where power savings is critical, the
ADA4800 features a power save mode (see the Power Save
Mode section), which further reduces the total current
consumption. The bandwidth of the ADA4800 buffer is also
fully adjustable through the IDRV pin.
The buffer of the ADA4800 employs a push-pull output stage
architecture, providing drive current and maximum slew
capability for both rising and falling signal transitions. At a
5 mA quiescent current setting, it provides 400 MHz, −3 dB
bandwidth, which makes this buffer well suited for CCD
sensors from machine vision to digital still camera applications.
The ADA4800 is ideal for driving the input of the Analog
Devices, Inc., 12-bit and 14-bit high resolution analog
front ends (AFE) such as the AD9928, AD9990, AD9920A,
AD9923A, and AD997x family.
The versatility of the ADA4800 allows for seamless interfacing
with many CCD sensors from various manufacturers.
The ADA4800 is designed to operate at supply voltages as low
as 4 V and up to 17 V. It is available in a 1.6 mm × 1.6 mm ×
0.55 mm, 6-lead LFCSP package and is rated to operate over the
industrial temperature range of −40oC to +85oC.
09162-102
6
ISF
1
IN
5
VCC
2
VEE
4
IDRV
3
OUT
ADA4800
R
ISF
10kΩ
3V
7.5V
V
ISF
R
IDRV
249kΩ15V
0.1µF +10µF
49.9Ω
7.5V
1kΩ10Ω
22pF
I
AL
I
BUFF
+1
I
IDRV
I
ISF
Figure 2. Typical Test Circuit
ADA4800
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Buffer Electrical Characteristics ................................................. 3
Active Current Load Electrical Characteristics ........................ 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ..............................................6
Test Circuit .........................................................................................9
Theory of Operation ...................................................................... 10
Setting Active Load Current with Pin 6 (ISF) ........................ 10
Setting Bandwidth with Pin 4 (IDRV)..................................... 10
Applications Information .............................................................. 11
Open Source CCD Output Buffer ............................................ 11
Power Save Mode ....................................................................... 11
Power Supply Bypassing ............................................................ 12
Power Sequencing ...................................................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
7/10—Rev. 0 to Rev. A
Deleted Figure 15 .............................................................................. 7
Changes to Setting Active Load Current with Pin 6 ISF Section
and Setting Bandwidth with Pin 4 (IDRV) Section ................... 10
6/10—Revision 0: Initial Version
ADA4800
Rev. A | Page 3 of 16
SPECIFICATIONS
BUFFER ELECTRICAL CHARACTERISTICS
TA = 25°C, VCC = 15 V, VEE = 0 V, RIDRV = 249 k connected to VIDRV, RLOAD = 1 k in parallel with 22 pF in series with 10 , VIN = 7.5 V,
unless otherwise noted (see Figure 2 for a test circuit).
Table 1.
Parameter Condition Min Typ Max Unit
GAIN
Voltage Gain VIN = 6.5 V to 8.5 V, RISF = 0 Ω 0.995 0.998 1.005 V/V
INPUT/OUTPUT CHARACTERISTICS
I/O Offset Voltage 30 41 mV
IDRV Current RIDRV = 249 kΩ, VIDRV = 15 V 52 59 μA
Input/Output Voltage Range VEE + 1.4 VCC − 1.4 V
Input Bias Current (IBUFF) 1 μA
DYNAMIC PERFORMANCE
−3 dB Bandwidth RIDRV = 300 kΩ (ICC = 1.1 mA), VOUT = 0.1 V p-p 182 MHz
R
IDRV = 150 kΩ (ICC = 2.1 mA), VOUT = 0.1 V p-p 288 MHz
R
IDRV = 50 kΩ (ICC = 4.7 mA), VOUT = 0.1 V p-p 400 MHz
Slew Rate VOUT = 2 V step 415 V/μs
Rise Time VIN = 7.5 V to 8.5 V, 10% to 90% 2.2 ns
Fall Time VIN = 8.5 V to 7.5 V, 10% to 90% 1.8 ns
1% Settling Time VIN = 9.5 V to 7.5 V (falling edge) 5 ns
V
IN = 7.5 V to 9.5 V (rising edge) 4.5 ns
V
IN = 8.5 V to 7.5 V (falling edge) 4.5 ns
V
IN = 7.5 V to 8.5 V (rising edge) 4 ns
I/O Delay Time VIN = 8.5 V to 7.5 V (falling edge) 0.4 ns
V
IN = 7.5 V to 8.5 V (rising edge) 0.35 ns
Output Voltage Noise @ 20 MHz 1.5 nV/√Hz
POWER SUPPLY
Supply Voltage Range 4 15 17 V
Supply Current (ICC) 1.4 1.8 mA
OPERATING TEMPERATURE RANGE −40 +85 °C
ACTIVE CURRENT LOAD ELECTRICAL CHARACTERISTICS
TA = 25°C, VEE = 0 V, VISF = 3 V, RISF = 10 k connected to VISF, VIN = 7.5 V, unless otherwise noted (see Figure 2 for a test circuit).
Table 2.
Parameter Condition Min Typ Max Unit
INPUT/OUTPUT CHARACTERISTICS
Active Load Current (IAL) VISF = 0 V 1 μA
VISF = 3 V 3 mA
V
ISF = 7.5 V 12.7 mA
ISF Current (IISF) RISF = 10 kΩ 111 120 μA
Input Voltage Range VEE + 1.7 VCC V
OPERATING TEMPERATURE RANGE −40 +85 °C
ADA4800
Rev. A | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
Supply Voltage 18 V
Input Voltage VEE to VCC
ISF Pin VEE to VCC
IDRV Pin VEE to VCC
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +150°C
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA Unit
6-Lead LFCSP 160 °C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADA4800
Rev. A | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
09162-002
NOTES
1. EXPOSED P AD IS NOT I NTERNAL L Y
CONNECT E D TO DIE. CO NNECT TO ANY LO W
IMP E DANCE NODE OR LEAVE F LO ATING.
A
DA4800
EPAD
1
2
3
IN
VEE
OUT
ISF
VCC
IDRV
6
5
4
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 IN Input. Connect this pin to the CCD sensor output.
2 VEE Negative Power Supply Voltage.
3 OUT Output. Connect this pin to the AFE input.
4 IDRV
Bandwidth Adjustment Pin. Connect this pin to VCC or an external voltage with an external resistor. This pin
allows bandwidth to be controlled by adjusting ICC. This pin can also be used to power down the buffer.
5 VCC Positive Power Supply Voltage.
6 ISF
Active Load Current Adjustment Pin. Connect to VCC or an external voltage with an external resistor. This pin can
also be connected to the microcontroller logic output through an external resistor for power save mode. This pin
can also be used to power down the active current load.
EPAD EPAD Exposed Pad. Not internally connected to die. Connect to any low impedance node or leave floating.
ADA4800
Rev. A | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VCC = 7.5 V, VEE = −7.5 V, RIDRV = 249 k connected to VIDRV, VISF = −4.5 V, RISF = 10 k connected to VISF, VIN shunt
terminated with 49.9 Ω to 0 V, RLOAD = 1 k in parallel with 22 pF in series with 10  to 0 V.
1
–9
–8
–7
–6
–5
–4
–3
–2
–1
0
1M 10M 100M 1G
GAIN (dB)
FREQUENCY ( Hz )
R
IDRV
= 300kΩ
R
IDRV
= 200kΩ
R
IDRV
= 150kΩ
R
IDRV
= 50kΩ
V
OUT
= 100mV p-p
09162-003
Figure 4. Small Signal Frequency Response with Various IDRV Resistances
3
–15
–12
–9
–6
–3
0
1M 10M 100M 1G
GAIN (dB)
FREQUENCY ( Hz )
T
A
= –40°C
V
OUT
= 100mV p-p
09162-004
T
A
= +25°C
T
A
= +85°C
Figure 5. Small Signal Frequency Response at Various Temperatures
2.0
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
1.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
1.2
0369258147
% SETTLING ERROR
V
OUT
(V)
TIME (ns)
V
IN
– V
OUT
V
OUT
09162-005
Figure 6. Settling Time, 1 V to 0 V Output Transition
3
0
–30
–27
–24
–21
–18
–15
–12
–9
–6
–3
1M 10M 100M 1G
GAIN (dB)
FREQUENCY ( Hz )
R
IDRV
= 300kΩ
R
IDRV
= 200kΩ
R
IDRV
= 150kΩ
R
IDRV
= 50kΩ
V
OUT
= 2V p-p
09162-006
Figure 7. Large Signal Frequency Response with Various IDRV Resistances
1.5
–1.5
2.4
0
–1.0 0.4
–0.5 0.8
01
0.5 1.6
1.0 2.0
036 109258147
% SETTLING ERROR
V
OUT
(V)
TIME (ns)
.2
V
IN
– V
OUT
V
OUT
09162-007
Figure 8. Settling Time, 2 V to 0 V Output Transition
2.0
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
1.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
1.2
0369258147
% SETTLING ERROR
V
OUT
(V)
TIME (ns)
V
IN
– V
OUT
V
OUT
09162-008
Figure 9. Settling Time, 0 V to 1 V Output Transition
ADA4800
Rev. A | Page 7 of 16
800
200
300
400
500
600
700
11 1615141312
INPUT TO OUTPUT DELAY TIME (ps)
SUPPLY VOLTAGE (V)
0V TO 0.5V P U LSE
0.5V TO 0V PULSE
0V T O 1V P U LSE
1V T O 0V P U LSE
09162-009
Figure 10. Input to Output Delay Time vs. Supply Voltage
1.2
–0.2
0
0.2
0.4
0.6
0.8
1.0
010864297531
PULSE RESPONSE (V)
TIME (ns)
OUTPUT
INPUT
09162-010
Figure 11. Positive Pulse Response, 0 V to 1 V
2.5
2.0
1.5
1.0
0.5
–0.5
0
01412108642
PULSE RESPONSE (V)
TIME (ns)
OUTPUT
INPUT
09162-011
Figure 12. Positive Pulse Response, 0 V to 2 V
1.2
1.0
0.8
0.6
0.4
0.2
–0.2
0
01987654321
PULSE RESPONSE (V)
TIME (ns) 0
OUTPUTINPUT
09162-013
Figure 13. Negative Pulse Response, 1 V to 0 V
2.5
2.0
1.5
1.0
0.5
–0.5
0
13 27252321191715
PULSE RESPONSE (V)
TIME (ns)
OUTPUT
INPUT
09162-014
Figure 14. Negative Pulse Response, 2 V to 0 V
30
25
20
15
10
5
0
–7.5 –5.5 –3.5 –1.5 0.5 2.5 4.5 6.5
ACTI V E LO AD CURRENT, I
AL
(mA)
V
ISF
(V)
R
ISF
= 10kΩ
09162-018
Figure 15. Input Current vs. Voltage on ISF Pin (VISF)
ADA4800
Rev. A | Page 8 of 16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
–40 80706050403020100–10–20–30
CURRENT ( mA)
TEM P ERATURE (°C)
I
ISF
I
IDRV
09162-019
Figure 16. ISF and IDRV Currents vs. Temperature
0
–5
–10
–15
–20
–25
–30
–35
–40
–40 –15 10 35 60 85
V
OS
(mV)
TEM P ERATURE (°C)
09162-020
Figure 17. VOS vs. Temperature
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–7.5 –5.5 –3.5 –1.5 0.5 2.5 4.5 6.5
I
CC
(mA)
V
IDRV
(V)
09162-021
Figure 18. ICC vs. Voltage on IDRV Pin (VIDRV)
700
–700
–600
–500
–400
–300
–200
–100
0
100
200
300
400
500
600
02468101214
V
OS
(mV)
V
IN
(V)
09162-022
Figure 19. Output Offset Voltage vs. Input Voltage
ADA4800
Rev. A | Page 9 of 16
TEST CIRCUIT
ADA4800
I
AL
I
BUFF
+1
I
DRV
I
SF
6
ISF
1
IN
5
VCC
2
VEE
4
IDRV
3
OUT
R
ISF
10kΩ
3V
V
ISF
0.11mA
R
IDRV
249kΩ15V
0.05mA
7.5V
49.9Ω
2.96mA
7.5V
4.68mA
1.41mA
09162-026
0.1µF 10µF
+
1kΩ10Ω
22pF
Figure 20. Typical Current Flow
ADA4800
Rev. A | Page 10 of 16
THEORY OF OPERATION
The ADA4800 is a buffer integrated with an active load. Each
element (the active load and the buffer) operates independently,
as described in the following sections.
Figure 22 illustrates an ADA4800 application configuration for
using this power save feature.
An external resistor connected between the ISF and the
microcontroller GPO pin determines the amount of current
that flows into the input pin. This current can be calculated
by using Equation 1 and Equation 2.
SETTING ACTIVE LOAD CURRENT WITH PIN 6 (ISF)
The ISF pin is used to establish the value of the active current
load (IAL). Set the ISF current using Equation 1.
k3
V55.1
+
−
=
ISF
ISF
ISF R
V
I (1)
SETTING BANDWIDTH WITH PIN 4 (IDRV)
The IDRV pin establishes the buffer’s ICC quiescent current.
As ICC is increased, power dissipation and bandwidth both
increase. Set the current using Equation 3.
where:
VISF is referenced to Pin 2. VISF can be an external voltage source,
VCC, or a GPO output as explained in the following paragraphs.
RISF is the external resistor between the ISF pin and VISF. k28
V8.0
+
−
=
IDRV
IDRV
IDRV R
V
I (3)
where:
VIDRV is referenced to Pin 2. VIDRV can be an external voltage
source or VCC.
RIDRV is the external resistor between the IDRV pin and VIDRV.
The active load current (into the IN pin) is directly proportional
to IISF and can be calculated by Equation 2.
IAL = IISF × 27 (2)
The ADA4800 allows for additional power savings by reducing
the active load current. The active load current can be logically
controlled by connecting the ISF pin to any general-purpose
output (GPO) pin of a system microcontroller through an
external resistor. A GPO logic high enables the flow of the
active load current. Appling –VS or connecting a high-Z to the
ISF pin places the ADA4800 into power save mode by shutting
down the active load current.
The ICC current is directly proportional to IIDRV and can be
calculated by Equation 4.
ICC = IIDRV × 26 (4)
Applying –VS to the IDRV pin shuts down the buffer.
ADA4800
Rev. A | Page 11 of 16
APPLICATIONS INFORMATION
OPEN SOURCE CCD OUTPUT BUFFER
With low power, high slew rate, and fast settling time, the
ADA4800 is the ideal solution for an output buffer for CCD
sensors with an open source output configuration. Figure 21
shows a typical application circuit for the ADA4800 as a CCD
sensor output buffer.
The output of the CCD is connected directly to the IN pin
of the ADA4800, whose OUT pin is then ac-coupled into
the input of the analog front end.
IN VEE OUT
CCD AFE
09162-027
15V
ADA4800
I
AL
I
BUFF
+1
I
IDRV
I
ISF
6
ISF
1
5
VCC
2
4
IDRV
3
R
ISF
120kΩ
15V
V
ISF
R
IDRV
249kΩ
0.1µF
0.1µF
0.1µF
47µF
+
Figure 21. Typical Application Block Diagram
To help reduce the effects of power supply noise coupling into
the ISF and IDRV pins, use 0.1 F ceramic bypass decoupling
capacitors. For best performance, place these capacitors as
close to each of these pins as is physically possible.
POWER SAVE MODE
The buffer of the ADA4800 consumes only 20 mW of static
power. To achieve even more power savings, the ADA4800
active load current can be switched off during standby mode
or reduced during monitoring mode. Figure 22 illustrates the
ADA4800 as an open source CCD buffer configured for using
this power save feature. Power save mode allows IAL current to
be logically controlled by connecting the ISF pin to any general-
purpose output (GPO) pin of the system microcontroller through
an external resistor. A GPO logic high enables the flow of input
sink current, while a logic low disables the input sink current
and asserts the power save mode.
0V T O 3V
GPO PIN
IN VEE OUT
CCD AFE
09162-028
15V
ADA4800
I
AL
I
BUFF
+1
I
IDRV
I
ISF
6
ISF
1
5
VCC
2
4
IDRV
3
R
ISF
10kΩ
V
ISF
R
IDRV
249kΩ
0.1µF
0.1µF
0.1µF
47µF
+
Figure 22. Using GPO to Drive ISF Voltage
Figure 23 shows an example of the ADA4800 power save feature.
AFE
GPO1
GPO2
20kΩ
20kΩ
MAIN BO ARD FPC
ADA4800
ISF
09162-029
Figure 23. Example Block Diagram for Sink Current Selection
Three combinations of IAL are provided with Figure 23.
Selection of the IAL is controlled by the logic signals applied to
the GPO1 and GPO2 pins. Table 5 summarizes the IAL selections.
Table 5. Input Sink Current Selection
Mode GPO1 GPO2 Resistance (kΩ) Active Load Current, IAL (mA)
Standby High-Z High-Z High-Z 0
0 0 N/A
Sleep High-Z 1 20 1.90
1 High-Z 20
Active 1 1 10 3.36
ADA4800
Rev. A | Page 12 of 16
POWER SUPPLY BYPASSING
Attention must be paid to bypassing the power supply pin of
the ADA4800. Use high quality capacitors with low equivalent
series resistance (ESR), such as multilayer ceramic capacitors
(MLCCs), to minimize supply voltage ripple and power dissipa-
tion. A large, usually tantalum, 2.2 F to 47 F capacitor located
in close proximity to the ADA4800 is required to provide good
decoupling for lower frequency signals. The actual value is
determined by the circuit transient and frequency requirements. In
addition, 0.1 F MLCC decoupling capacitors should be located
as close to the power supply pin as is physically possible, no more
than ⅛ inch away. The ground returns should terminate imme-
diately into the ground plane. Locating the bypass capacitor
return close to the load return minimizes ground loops and
improves performance.
POWER SEQUENCING
All I/O pins are ESD protected with internal back-to-back
diodes connected to VCC and GND as shown in Figure 24.
With the ADA4800 supply turned off (VCC = 0 V), a voltage on
an I/O pin can turn on the protection diodes and cause permanent
damage or destroy the IC. To prevent this condition during
power-on, no voltages should be applied to any I/O pins until
VCC is fully on and settled. During power-off, I/O pin voltages
should be removed or reduced to 0 V before VCC is turned off.
ADA4800
V
C
C
EXTERNAL
PIN
09162-030
Figure 24. Simplified Input/Output Circuitry
In the presence of a voltage on an I/O pin with VCC = 0 V, the
current should be limited to 5 mA or less by the source or by
adding a series resistor.
ADA4800
Rev. A | Page 13 of 16
OUTLINE DIMENSIONS
1.15
1.05
0.95
0.375
0.300
0.225
101409-A
TOP VIEW
6
1
4
3
0.30
0.25
0.20
BOTTOM VIEW
PIN 1 INDEX
AREA
SEATING
PLANE
0.60
0.55
0.50
0.60
0.50
0.40
0.152 REF
0.05 MAX
0.02 NOM
1.65
1.60 SQ
1.55 0.50 BSC
EXPOSED
PAD
PIN1
INDICATOR
(R0.15)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
Figure 25. 6-Lead Lead Frame Chip Scale Package [LFCSP_UD]
1.60 mm × 1.60 mm Body, Ultra Thin, Dual Lead
(CP-6-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
ADA4800ACPZ-R2 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E
ADA4800ACPZ-R7 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E
ADA4800ACPZ-RL −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E
1 Z = RoHS Compliant Part.
ADA4800
Rev. A | Page 14 of 16
NOTES
ADA4800
Rev. A | Page 15 of 16
NOTES
ADA4800
Rev. A | Page 16 of 16
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09162-0-7/10(A)