Low Cost 6-Channel HD/SD Video Filter
ADA4420-6
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Trademarks and registered trademarks are the property of their respective owners.
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Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2008–2011 Analog Devices, Inc. All rights reserved.
FEATURES
Sixth-order filters
Transparent input sync tip clamp
−1 dB bandwidth of 26 MHz typical for HD
HD rejection @ 75 MHz: 48 dB typical
NTSC differential gain: 0.19%
NTSC differential phase: 0.76°
Rail-to-rail outputs
Low quiescent current: 32 mA typical
Disable feature
Output dc offset
APPLICATIONS
Set-top boxes
DVD players and recorders
HDTVs
Projectors
Personal video recorders
FUNCTIONAL BLOCK DIAGRAM
SD
SD
SD
OUTHD1
OUTHD2
OUTHD3
×2
HD
HD
HD
OUTSD1
OUTSD2
OUTSD3
INHD1
INHD2
INHD3
INSD1
INSD2
INSD3
DIS
CLAMP
×2
×2
×2
×2
×2
×1
×1
×1
×1
×1
×1
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
07532-001
ADA4420-6
Figure 1.
GENERAL DESCRIPTION
The ADA4420-6 is a low cost video reconstruction filter specifically
designed for consumer applications. It consists of six independent
sixth-order Butterworth filters/buffers, three for standard
definition (Y/C or CVBS) and three for high definition
component signals (YPrPb or RGB).
The ADA4420-6 operates from a single 5 V supply and has a
low quiescent current of 32 mA, making it ideal for applications
where power consumption is critical. A disable feature allows
for further power conservation by reducing the supply current
to less than 8 µA typical when the device is not in use.
Each channel features a transparent sync tip clamp, allowing ac
coupling of the inputs without requiring dc restoration.
The output drivers on the ADA4420-6 have rail-to-rail output
capabilities with 6 dB gain. A built-in offset of 250 mV allows
the outputs to be dc-coupled, eliminating the need for large
coupling capacitors. Each output is capable of driving two 75 Ω
doubly terminated cables.
The ADA4420-6 is available in either a 16-lead QSOP or a 20-lead
TSSOP, and operates in the extended industrial temperature
range of −40°C to +85°C.
ADA4420-6
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
Maximum Power Dissipation ..................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ..............................................7
Test Circuits..................................................................................... 10
Applications Information.............................................................. 11
Overview ..................................................................................... 11
Disable ......................................................................................... 11
Input and Output Coupling ...................................................... 11
Printed Circuit Board (PCB) Layout ....................................... 11
Video Encoder Reconstruction Filter...................................... 11
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
REVISION HISTORY
5/11—Rev. 0 to Rev. A
Added 20-Lead TSSOP Package.......................................Universal
Changes to General Description Section ...................................... 1
Changes to Disable Assert Voltage, Disable Assert Time, Disable
De-Assert Time Parameters ............................................................ 3
Changes to Table 3, Maximum Power Dissipation Section,
and Figure 2....................................................................................... 4
Added Figure 4 and Table 5............................................................. 6
Changes to Figure 18, Figure 19, and Figure 20 ......................... 10
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 14
8/08—Revision 0: Initial Version
ADA4420-6
Rev. A | Page 3 of 16
SPECIFICATIONS
VS = 5 V, TA = 25°C, VO = 2.0 V p-p, RL = 150 Ω, dc-coupled inputs, ac-coupled outputs, unless otherwise noted. See Figure 18, Figure 19,
and Figure 20 for the test circuits.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL PERFORMANCE
DC Voltage Gain All channels 5.8 6.0 6.2 dB
Input Voltage Range, All Inputs 0 to 2.1 V
Output Voltage Range, All Outputs 0.25 to 4.6 V
Linear Output Current per Channel 30 mA
Filter Input Bias Current 1 μA
SD CHANNEL DYNAMIC PERFORMANCE
−1 dB Bandwidth 8.6 MHz
−3 dB Bandwidth 8.5 10 MHz
Out-of-Band Rejection f = 27 MHz 42 45 dB
Crosstalk f = 1 MHz −68 dB
Total Harmonic Distortion f = 1 MHz, VO = 1.4 V p-p, dc-coupled outputs 0.02 %
Signal-to-Noise Ratio f = 100 kHz to 6 MHz, unweighted 70 dB
Propagation Delay 57 ns
Group Delay Variation f = 100 kHz to 5 MHz 16 ns
Differential Gain NTSC; ac-coupled inputs, dc-coupled outputs;
see Figure 19
0.19 %
Differential Phase NTSC; ac-coupled inputs, dc-coupled outputs;
see Figure 19
0.76 Degrees
HD CHANNEL DYNAMIC PERFORMANCE
−1 dB Bandwidth 26 MHz
−3 dB Bandwidth 27 31 MHz
Out-of-Band Rejection f = 75 MHz 43 48 dB
Crosstalk f = 1 MHz −68 dB
Total Harmonic Distortion f = 10 MHz, VO = 1.4 V p-p, dc-coupled outputs 0.57 %
Signal-to-Noise Ratio f = 100 kHz to 30 MHz, unweighted 66 dB
Propagation Delay 15 ns
Group Delay Variation f = 100 kHz to 30 MHz 11 ns
DC CHARACTERISTICS
Operating Voltage 4.75 to 5.25 V
Quiescent Supply Current Active, DIS = 1 32 36 mA
Disabled, DIS = 0 7 13 μA
PSRR HD channel, referred to output 35 41 dB
SD channel, referred to output 40 45 dB
Output DC Offset All channels 135 250 375 mV
Disable Assert Voltage DIS = 0 to 1 1.9 V
Disable Assert Time DIS = 0 to 1 20 ns
Disable De-Assert Time DIS = 1 to 0 450 ns
Disable Input Bias Current Disabled, DIS = 0 −6.8 μA
Input-to-Output Isolation Disabled, DIS = 0, f = 5 MHz −96 dB
ADA4420-6
Rev. A | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage 5.5 V
Power Dissipation See Figure 2
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the device soldered to a high thermal
conductivity 4-layer (2s2p) circuit board, as described in
EIA/JESD 51-7.
Table 3.
Package Type θJA θ
JC Unit
16-Lead QSOP 105 23 °C/W
20-Lead TSSOP 143 45 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4420-6
package is limited by the associated rise in junction temperature
(TJ) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4420-6. Exceeding a
junction temperature of 150°C for an extended time can result
in changes in the silicon devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). The power dissipated due to load drive
depends on the particular application. For each output, the
power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to the loads is equal to the sum of the
power dissipations due to each individual load. RMS voltages
and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θJA.
Figure 2 shows the maximum power dissipation in the package
vs. the ambient temperature for the 16-lead QSOP (105°C/W)
and the 20-lead TSSOP (143°C/W) on a JEDEC standard 4-layer
board. θJA values are approximate.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 102030405060708090100
07532-016
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
16-LEAD QSOP
20-LEAD TSSOP
Figure 2. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
ESD CAUTION
ADA4420-6
Rev. A | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADA4420-6
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
INSD2
INSD3
VCC
INHD2
INHD1
DIS
INSD1
OUTSD2
OUTSD3
GND
OUTHD2
INHD3 OUTHD3
OUTHD1
GND
OUTSD1
07532-002
Figure 3. 16-Lead QSOP Pin Configuration
Table 4. 16-Pin QSOP Pin Function Descriptions
Pin No. Mnemonic Description
1 INSD1 Standard Definition Input 1
2 INSD2 Standard Definition Input 2
3 INSD3 Standard Definition Input 3
4 VCC Power Supply
5 DIS Disable/Power-Down Input
6 INHD1 High Definition Input 1
7 INHD2 High Definition Input 2
8 INHD3 High Definition Input 3
9 OUTHD3 High Definition Output 3
10 OUTHD2 High Definition Output 2
11 OUTHD1 High Definition Output 1
12 GND Ground
13 GND Ground
14 OUTSD3 Standard Definition Output 3
15 OUTSD2 Standard Definition Output 2
16 OUTSD1 Standard Definition Output 1
ADA4420-6
Rev. A | Page 6 of 16
NC = NO CONNECT.
DO NOT CONNECT TO THIS PIN.
1
2
3
4
5
6
7
8
9
10
INSD2
INSD3
NC
INHD1
DIS
VCC
INSD1
NC
INHD3
INHD2
20
19
18
17
16
15
14
13
12
11
OUTSD2
OUTSD3
GND
OUTHD1
NC
GND
NC
OUTHD3
OUTHD2
OUTSD1
ADA4420-6
TOP VIEW
(Not to Scale)
0
7532-003
Figure 4. 20-Lead TSSOP Pin Configuration
Table 5. 20-lead TSSOP Pin Function Descriptions
Pin No. Mnemonic Description
1 INSD1 Standard Definition Input 1.
2 INSD2 Standard Definition Input 2.
3 INSD3 Standard Definition Input 3.
4 NC Do not connect to this pin.
5 VCC Power Supply.
6 DIS Disable/Power Down Input.
7 INHD1 High Definition Input 1.
8 INHD2 High Definition Input 2.
9 INHD3 High Definition Input 3.
10 NC Do not connect to this pin.
11 NC Do not connect to this pin.
12 OUTHD3 High Definition Output 3.
13 OUTHD2 High Definition Output 2.
14 OUTHD1 High Definition Output 1.
15 NC No Connection.
16 GND Ground.
17 GND Ground.
18 OUTSD3 Standard Definition Output 3.
19 OUTSD2 Standard Definition Output 2.
20 OUTSD1 Standard Definition Output 1.
ADA4420-6
Rev. A | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25°C, VO = 2.0 V p-p, RL = 150 Ω, dc-coupled inputs, ac-coupled outputs, unless otherwise noted. See Figure 18, Figure 19,
and Figure 20 for the test circuits.
HD CHANNELS,
R
L
= 75Ω
HD CHANNELS,
R
L
= 150Ω
–80
–70
–60
–50
–40
–30
–20
–10
0
10
1 10 100
07532-004
FREQUENCY (MHz)
GAIN (dB)
SD CHANNELS,
R
L
= 75Ω
SD CHANNELS,
R
L
= 150Ω
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1 10 100
07532-007
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
HD CHANNELS,
R
L
= 75Ω
HD CHANNELS,
R
L
= 150Ω
SD CHANNELS,
R
L
= 150Ω
SD CHANNELS,
R
L
= 75Ω
Figure 5. Frequency Response vs. Load (RL)
Figure 8. Flatness vs. Load (RL)
–80
–70
–60
–50
–40
–30
–20
–10
0
10
11010
07532-005
FREQUENCY (MHz)
GAIN (dB)
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1 10 100
07532-008
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
HD –40°C
HD +25°C
HD +85°C
SD –40°C
SD +25°C
SD +85°C
0
HD –40°C
HD +25°C
HD +85°C
SD –40°C
SD +25°C
SD +85°C
Figure 6. Frequency Response vs. Temperature
Figure 9. Flatness vs. Temperature
07532-017
FREQUENCY (MHz)
GAIN (dB)
HD AC-COUPLED
–80
–70
–60
–50
–40
–30
–20
–10
0
10
110100
SD AC-COUPLED
SD DC-COUPLED
HD DC-COUPLED
–80
–70
–60
–50
–40
–30
–20
–10
0
10
11010
07532-006
FREQUENCY (MHz)
GAIN (dB)
0
SD V
O
= 100mV p-p
SD V
O
= 2.0V p-p
HD V
O
= 100mV p-p
HD V
O
= 2.0V p-p
Figure 10. Frequency Response vs. Output Coupling
Figure 7. Frequency Response vs. Amplitude
ADA4420-6
Rev. A | Page 8 of 16
0
10
20
30
40
50
60
70
80
90
100
HD CHANNELS
0.1 1 10 100
07532-009
FREQUENCY (MHz)
GROUP DELAY (ns)
SD CHANNELS
Figure 11. Group Delay vs. Frequency
DIS = 0
10
100
1k
10k
0.1 1 10 100
0
7532-011
FREQUENCY (MHz)
OUTPUT IMPEDANCE (Ω)
Figure 12. Output Impedance vs. Frequency
HD CHANNELS
SD CHANNELS
–1
0
1
2
3
4
5
6
–600 –400 –200 0 200 400 600 800 1000 1200
07532-012
TIME (ns)
DIS VOLTAGE (V)
Figure 13. Enable Time
28
29
30
31
32
33
34
35
36
–60 –40 –20 0 20 40 60 80 100
0
7532-013
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
Figure 14. Supply Current vs. Temperature
ADA4420-6
Rev. A | Page 9 of 16
4.50
4.52
4.54
4.56
4.58
4.60
4.62
4.64
4.66
4.68
4.70
–60 –40 –20 0 20 40 60 80 100
07532-010
TEMPERATURE (°C)
OUTPUT SATURATION VOLTAGE (V)
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0.1 1 10 100 1000
HD CHANNELS
SD CHANNELS
07532-014
FREQUENCY (MHz)
CROSSTALK (dB)
Figure 17. Output Saturation Voltage vs. Temperature
Figure 15. Crosstalk vs. Frequency
–200 –160 –120 –80 –40 0 40 80 120 160 200
HD CHANNELS
SD CHANNELS
–1
0
1
2
3
4
5
6
07532-015
TIME (ns)
DIS VOLTAGE (V)
Figure 16. Disable Time
ADA4420-6
Rev. A | Page 10 of 16
TEST CIRCUITS
07532-018
V
CC
0.1µF
118Ω
86.6Ω
V
IN
VOUT
DIS
ADA4420-6
GND
220µF
49.9Ω
10µF
Figure 18. DC-Coupled Input, AC-Coupled Output
07532-019
0.1µF
118Ω
86.6Ω
V
IN
V
OUT
ADA4420-6
GND
49.9Ω
10µF
0.1µF
V
CC
DIS
Figure 19. AC-Coupled Input, DC-Coupled Output
07532-020
AGILENT E3631A POWER SUPPLY
±25V
COM –+
+6V
–+
VCC GND DIS
AGILENT 8753D VECTOR NETWORK ANALYZER
PORT 1 PORT 2
BIAS
CONNECT
PORT 1
50Ω
INxDx OUTxDx
ADA4420-6
TEST CIRCUIT
(SEE FIGURE 18)
Figure 20. Test Circuit for Frequency Response and Group Delay
ADA4420-6
Rev. A | Page 11 of 16
APPLICATIONS INFORMATION
OVERVIEW
With its high impedance inputs and high output drive, the
ADA4420-6 is ideally suited to video reconstruction and anti-
alias filtering applications. The high impedance inputs give
designers flexibility with regard to how the input signals are
terminated. Devices with DAC current source outputs that feed
the ADA4420-6 can be loaded in whatever resistance provides
the best performance, and devices with voltage outputs can be
optimally terminated as well. The ADA4420-6 outputs can each
drive up to two source-terminated, 75 loads and; therefore, can
directly drive the outputs from set-top boxes and DVDs without
the need for a separate output buffer.
DISABLE
The ADA4420-6 includes a disable feature that can be used to
save power when a particular device is not in use. When disabled,
the ADA4420-6 typically draws only 7 µA from the supply. The
disable feature is asserted by pulling the DIS pin low.
Tabl e 6 summarizes the operation of the disable feature.
Table 6. Disable Function
DIS Pin Connection Status
VCC or Floating Enabled
GND Disabled
INPUT AND OUTPUT COUPLING
Inputs to the ADA4420-6 can be ac- or dc-coupled. For dc-coupled
inputs, the signal must be completely contained within the input
range of 0 V to 2.1 V. When using ac-coupled inputs, the lowest
point of the signal is clamped to approximately 0 V. The ADA4420-6
outputs can be either ac- or dc-coupled.
When driving single ac-coupled loads in standard 75 Ω video
distribution systems, a minimum capacitance of 220 µF is
recommended to avoid line and field droop. There are two ac
coupling options when driving two loads from one output. One
option simply uses the same value capacitor on the second load,
while the other option uses a common coupling capacitor that
is at least twice the value used for the single load (see Figure 21
and Figure 22).
When driving two parallel 150 Ω loads (75 Ω effective load), the
3 dB bandwidth of the filters typically varies from that of the filters
with a single 150 Ω load (see Figure 5).
75Ω
75Ω
75Ω
CABLE
75Ω
CABLE
220µF
ADA4420-6
220µF
75Ω
75Ω
0
7532-022
Figure 21. Driving Two AC-Coupled Loads with Two Coupling Capacitors
ADA4420-6
75Ω
CABLE
75Ω
CABLE
75Ω
75Ω
75Ω
75Ω
470µF
0
7532-023
Figure 22. Driving Two AC-Coupled Loads with One Common Coupling Capacitor
PRINTED CIRCUIT BOARD (PCB) LAYOUT
As with all high speed applications, attention to the PCB layout
is of paramount importance. When designing with the ADA4420-6,
adhere to standard high speed layout practices. A solid ground
plane is recommended, and surface-mount, ceramic power supply
decoupling capacitors should be placed as close as possible to the
supply pins. Connect all of the ADA4420-6 GND pins to the
ground plane with traces that are as short as possible. Controlled
impedance traces of the shortest length possible should be used
to connect to the signal I/O pins and should not pass over any
voids in the ground plane. A 75 Ω impedance level is typically
used in video applications. When driving transmission lines,
include series termination resistors on the signal outputs of the
ADA4420-6.
When the ADA4420-6 receives its inputs from a device with
current outputs, the required load resistor value for the output
current is often different from the characteristic impedance of
the signal traces. In this case, if the interconnections are short
(<< 0.1 wavelength), the trace does not have to be terminated in
its characteristic impedance. Traces of 75 Ω can be used in this
instance, provided their lengths are an inch or two at most. This
is easily achieved because the ADA4420-6 and the device feeding it
are usually adjacent to each other, and connections can be made
that are less than one inch in length.
VIDEO ENCODER RECONSTRUCTION FILTER
The ADA4420-6 is easily applied as a reconstruction filter at the
DAC outputs of a video encoder. Figure 23 illustrates how to use
the ADA4420-6 in this type of application following an ADV734x
series video encoder, with a single-supply and ac-coupled outputs.
ADA4420-6
Rev. A | Page 12 of 16
Y
ADA4420-6
DIS
INSD1
SD
SD
SD
INSD3
INSD2
INHD1 ×1 ×2
HD
HD
HD
INHD2
INHD3
OUTHD1
OUTHD2
OUTHD3
ADV734x
MULTIFORMAT
VIDEO ENCODER DAC 1
DAC 2
DAC 3
DAC 4
DAC 5
DAC 6
4.12kΩ
R
SET2
R
SET1
CVBS
S-VIDEO
Pr
Pb
75Ω
220μF
07532-021
300Ω
4.12kΩ
300Ω
300Ω
300Ω
300Ω
300Ω
+
×1 ×2
75Ω
220μF
+
×1 ×2
75Ω
220μF
+
×1 ×2
75Ω
220μF
+
×1 ×2
75Ω
220μF
+
×1 ×2
75Ω
220μF
+
OUTSD1
OUTSD2
OUTSD3
Figure 23. The ADA4420-6 Applied as a Reconstruction Filter Following an ADV734x Series Video Encoder
ADA4420-6
Rev. A | Page 13 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-137-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
16 9
8
1
SEATING
PLANE
0.010 (0.25)
0.004 (0.10)
0.012 (0.30)
0.008 (0.20)
0.025 (0.64)
BSC
0.041 (1.04)
REF
0.010 (0.25)
0.006 (0.15)
0.050 (1.27)
0.016 (0.41)
0.020 (0.51)
0.010 (0.25)
8°
0°
COPLANARITY
0.004 (0.10)
0.065 (1.65)
0.049 (1.25)
0.069 (1.75)
0.053 (1.35)
0.197 (5.00)
0.193 (4.90)
0.189 (4.80)
0.158 (4.01)
0.154 (3.91)
0.150 (3.81) 0.244 (6.20)
0.236 (5.99)
0.228 (5.79)
01-28-2008-A
Figure 24. 16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches and (millimeters)
COMPLIANT TO JEDEC STANDARDS MO-153-AC
20
1
11
10
6.40 BSC
4.50
4.40
4.30
PIN 1
6.60
6.50
6.40
SEATING
PLANE
0.15
0.05
0.30
0.19
0.65
BSC
1.20 MAX 0.20
0.09 0.75
0.60
0.45
8°
0°
COPLANARIT
Y
0.10
Figure 25. 20-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-20)
Dimensions shown in millimeters
ADA4420-6
Rev. A | Page 14 of 16
ORDERING GUIDE
Model1
Temperature
Range Package Description Package Option Ordering Quantity
ADA4420-6ARQZ −40°C to +85°C 16-Lead Shrink Small Outline Package (QSOP) RQ-16 Tube (98)
ADA4420-6ARQZ-R7 −40°C to +85°C 16-Lead Shrink Small Outline Package (QSOP) RQ-16 1,000
ADA4420-6ARQZ-RL −40°C to +85°C 16-Lead Shrink Small Outline Package (QSOP) RQ-16 2,500
ADA4420-6ARUZ −40°C to +85°C 20-Lead Thin Shrink Small Outline Package (TSSOP) RU-20 Tube (75)
ADA4420-6ARUZ-R7 −40°C to +85°C 20-Lead Thin Shrink Small Outline Package (TSSOP) RU-20 1,000
ADA4420-6ARUZ-RL −40°C to +85°C 20-Lead Thin Shrink Small Outline Package (TSSOP) RU-20 2,500
1 Z = RoHS Compliant Part.
ADA4420-6
Rev. A | Page 15 of 16
NOTES
ADA4420-6
Rev. A | Page 16 of 16
NOTES
©2008–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07532-0-5/11(A)
