01/04/10
www.irf.com 1
AFL50XXS SERIES
The AFL Series of DC-DC converters feature high
power density with no derating over the full military
temperature range. This series is offered as part of a
complete family of converters providing single and dual
output voltages and operating from nominal +28V, +50V,
+120V or +270V inputs with output power ranging from
80W to 120W. For applications requiring higher output
power, individual converters can be operated in parallel.
The internal current sharing circuits assure equal current
distribution among the paralleled converters. This series
incorporates International Rectifier’s proprietary
magnetic pulse feedback technology providing
optimum dynamic line and load regulation response.
This feedback system samples the output voltage at
the pulse width modulator fixed clock frequency,
nominally 550KHz. Multiple converters can be
synchronized to a system clock in the 500KHz to 700
KHz range or to the synchronization output of one
converter. Undervoltage lockout, primary and secondary
referenced inhibit, soft-start and load fault protection
are provided on all models.
Description
n30V To 80V Input Range
n5V, 8V, 9V, 12V, 15V and 28V Outputs Available
nHigh Power Density - up to 84 W/in3
nUp To 120W Output Power
nParallel Operation with Stress and Current
Sharing
nLow Profile (0.380") Seam Welded Package
nCeramic Feedthru Copper Core Pins
nHigh Efficiency - to 85%
nFull Military Temperature Range
nContinuous Short Circuit and Overload
Protection
nRemote Sensing Terminals
nPrimary and Secondary Referenced
Inhibit Functions
nLine Rejection > 40dB - DC to 50KHz
nExternal Synchronization Port
nFault Tolerant Design
nDual Output Versions Available
nStandard Microcircuit Drawings Available
Features
AFL
50V Input, Single Output
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are fabricated utilizing DSCC
qualified processes. For available screening options,
refer to device screening table in the data sheet.
Variations in electrical, mechanical and screening can
be accommodated. Contact IR San Jose for special
requirements.
HYBRID-HIGH RELIABILITY
DC-DC CONVERTER
These converters are hermetically packaged in two
enclosure variations, utilizing copper core pins to
minimize resistive DC losses. Three lead styles are
available, each fabricated with International Rectifier’s
rugged ceramic lead-to-package seal assuring long
term hermeticity in the most harsh environments.
PD-94457C
2www.irf.com
AFL50XXS Series
Specifications
Static Characteristics -55°C < TCASE < +125°C, 30V< VIN < 80V unless otherwise specified.
For Notes to Specifications, refer to page 4
Input voltage -0.5V to +100VDC
Soldering temperature 300°C for 10 seconds
Operating case temperature -5C to +125°C
Storage case temperature -65°C to +135°C
Absolute Maximum Ratings
Parameter
Group A
Subgroups
Test Conditions
Min
Nom
Max
Unit
INPUT VOLTAGE Note 6 30 50 80 V
OUTPUT VOLTAGE
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
1
1
1
1
1
1
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
VIN = 50 Volts, 100% Load
4.95
7.92
8.91
11.88
14.85
27.72
4.90
7.84
8.82
11.76
14.70
27.44
5.00
8.00
9.00
12.00
15.00
28.00
5.05
8.08
9.09
12.12
15.15
28.28
5.10
8.16
9.18
12.24
15.30
28.56
V
OUTPUT CURRENT
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
V
IN = 30, 50, 80 Volts - Note 6
16.0
10.0
10.0
9.0
8.0
4.0
A
OUTPUT POWER
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
Note 6
80
80
90
108
120
112
W
MAXIMUM CAPACITIVE LOAD Note 1 10,000 µF
OUTPUT VOLTAGE
TEMPERATURE COEFFICIENT
V
IN = 50 Volts, 100% Load - Note 1, 6 -0.015 +0.015 %/°C
OUTPUT VOLTAGE REGULATION
AFL5028S Line
All Others Line
Load
1, 2, 3
1, 2, 3
1, 2, 3
No Load, 50% Load, 100% Load
VIN = 30, 50, 80 Volts
-70.0
-20.0
-1.0
+70.0
+20.0
+1.0
mV
mV
%
OUTPUT RIPPLE VOLTAGE
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
VIN = 30, 50, 80 Volts, 100% Load,
BW = 10MHz
30
40
40
45
50
100
mVpp
www.irf.com 3
AFL50XXS Series
Static Characteristics (Continued)
For Notes to Specifications, refer to page 4
Parameter
Group A
Subgroups
Test Conditions
Min
Nom
Max
Unit
INPUT CURRENT
No Load
No Load
Inhibit 1
Inhibit 2
1
2, 3
1
2, 3
1, 2, 3
1, 2, 3
VIN = 50 Volts
IOUT = 0 (All models except AFL5015S)
IOUT = 0 (AFL5015S)
Pin 4 Shorted to Pin 2
Pin 12 Shorted to Pin 8
50
60
60
65
5.0
5.0
mA
INPUT RIPPLE CURRENT
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
VIN = 50 Volts, 100% Load, BW = 10MHz
60
60
60
60
60
60
mApp
CURRENT LIMIT POINT
As a percentage of full rated load
1
2
3
VOUT = 90% VNOM , VIN = 50 Volts
Note 5
115
105
125
125
115
140
%
LOAD FAULT POWER DISSIPATION
Overload or Short Circuit
1, 2, 3
VIN = 50 Volts
32
W
EFFICIENCY
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
VIN = 50 Volts, 100% Load
78
79
80
81
82
82
81
82
83
84
85
84
%
ENABLE INPUTS (Inhibit Function)
Converter Off
Sink Current
Converter On
Sink Current
1, 2, 3
1, 2, 3
Logical Low on Pin 4 or Pin 12
Note 1
Logical High on Pin 4 and Pin 12 - Note 9
Note 1
-0.5
2.0
0.8
100
50
100
V
µA
V
µA
SWITCHING FREQUENCY 1, 2, 3 500 550 600 KHz
SYNCHRONIZATION INPUT
Frequency Range
Pulse Amplitude, Hi
Pulse Amplitude, Lo
Pulse Rise Time
Pulse Duty Cycle
1, 2, 3
1, 2, 3
1, 2, 3
Note 1
Note 1
500
2.0
-0.5
20
700
10
0.8
100
80
KHz
V
V
ns
%
ISOLATION 1 Input to Output or Any Pin to Case
(except Pin 3). Test @ 500VDC
100 M
DEVICE WEIGHT Slight Variations with Case Style 85 g
MTBF MIL-HDBK-217F, AIF @ TC = 40°C 300 KHrs
4www.irf.com
AFL50XXS Series
Dynamic Characteristics -55°C < TCASE < +125°C, VIN=50V unless otherwise specified.
Parameter
Group A
Subgroups
Test Conditions
Min
Nom
Max
Unit
LOAD TRANSIENT RESPONSE
AFL5005S Amplitude
Recovery
Amplitude
Recovery
AFL5008S Amplitude
Recovery
Amplitude
Recovery
AFL5009S Amplitude
Recovery
Amplitude
Recovery
AFL5012S Amplitude
Recovery
Amplitude
Recovery
AFL5015S Amplitude
Recovery
Amplitude
Recovery
AFL5028S Amplitude
Recovery
Amplitude
Recovery
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
Note 2, 8
Load Step 50% 100%
Load Step 10% 50%
Load Step 50% 100%
Load Step 10% 50%
Load Step 50% 100%
Load Step 10% 50%
Load Step 50% 100%
Load Step 10% 50%
Load Step 50% 100%
Load Step 10% 50%
Load Step 50% 100%
Load Step 10% 50%
-450
-450
-500
-500
-600
-600
-750
-750
-750
-750
-1200
-1200
450
200
450
300
500
200
500
300
600
200
600
300
750
200
750
300
750
200
750
300
1200
200
1200
300
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
LINE TRANSIENT RESPONSE
Amplitude
Recovery
Note 1, 2, 3
VIN Step = 30 80 Volts
-500
500
500
mV
µs
TURN-ON CHARACTERISTICS
Overshoot
Delay
4, 5, 6
4, 5, 6
VIN = 30, 50, 80 Volts. Note 4
Enable 1, 2 on. (Pins 4, 12 high or
open)
50
75
250
120
mV
ms
LOAD FAULT RECOVERY Same as Turn On Characteristics.
LINE REJECTION MIL-STD-461D, CS101, 30Hz to 50KHz
Note 1
40 50 dB
Notes to Specifications:
1. Parameters not 100% tested but are guaranteed to the limits specified in the table.
2. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1.0% of
VOUT at 50% load.
3. Line transient transition time 100µs.
4. Turn-on delay is measured with an input voltage rise time of between 100V and 500V per millisecond.
5. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.
6. Parameter verified as part of another test.
7. All electrical tests are performed with the remote sense leads connected to the output leads at the load.
8. Load transient transition time 10µs.
9. Enable inputs internally pulled high. Nominal open circuit voltage 4.0VDC.
www.irf.com 5
AFL50XXS Series
Block Diagram
Figure I. AFL Single Output
Figure II. Enable Input Equivalent Circuit
Circuit Operation and Application Information
Inhibiting Converter Output (Enable)
As an alternative to application and removal of the DC voltage
to the input, the user can control the converter output by
providing TTL compatible, positive logic signals to either of
two enable pins (pin 4 or 12). The distinction between these
two signal ports is that enable 1 (pin 4) is referenced to the
input return (pin 2) while enable 2 (pin 12) is referenced to
the output return (pin 8). Thus, the user has access to an
inhibit function on either side of the isolation barrier. Each
port is internally pulled “high” so that when not used, an
open connection on both enable pins permits normal
converter operation. When their use is desired, a logical
“low” on either port will shut the converter down.
The AFL series of converters employ a forward switched
mode converter topology. (refer to Figure I.) Operation of
the device is initiated when a DC voltage whose magnitude
is within the specified input limits is applied between pins 1
and 2. If pin 4 is enabled (at a logical 1 or open) the primary
bias supply will begin generating a regulated housekeeping
voltage bringing the circuitry on the primary side of the
converter to life. A power MOSFET is used to chop the DC
input voltage into a high frequency square wave, applying
this chopped voltage to the power transformer at the nominal
converter switching frequency. Maintaining a DC voltage
within the specified operating range at the input assures
continuous generation of the primary bias voltage.
The switched voltage impressed on the secondary output
transformer winding is rectified and filtered to generate the
converter DC output voltage. An error amplifier on the
secondary side compares the output voltage to a precision
reference and generates an error signal proportional to the
difference. This error signal is magnetically coupled through
the feedback transformer into the controller section of the
converter varying the pulse width of the square wave signal
driving the MOSFET, narrowing the width if the output voltage
is too high and widening it if it is too low, thereby regulating
the output voltage.
Remote Sensing
Connection of the + and - sense leads at a remotely located
load permits compensation for excessive resistance
between the converter output and the load when their
physical separation could cause undesirable voltage drop.
This connection allows regulation to the placard voltage at
of application. When the remote sensing feature is not used,
the sense lead should be connected to their respective
output terminals at the converter. Figure III. illustrates a
typical remotely sensed application.
Disable
100K
290K
180K
1N4148
2N3904
+5.6 V
Pin 4 or
Pin 12
Pin 2 or
Pin 8
1
+ In
p
u
t
Enable 1 4
Sync Output 5
6
Sync Input
Case 3
2 Input Return
Input
Filter
Primary
Bias Su
pp
l
y
Control
FB
Output
Filter
Current
Sense
Error
Amp
& Ref
Share
Am
p
lifier
Sense
Am
p
lifier
7 +Output
10
+Sense
11 Share
12
Enable 2
9 Return Sense
8 Output Return
6www.irf.com
AFL50XXS Series
Figure III. Preferred Connection for Parallel Operation
Synchronization of Multiple Converters
Parallel Operation-Current and Stress Sharing
Internally, these ports differ slightly in their function. In use,
a low on Enable 1 completely shuts down all circuits in the
converter, while a low on Enable 2 shuts down the secondary
side while altering the controller duty cycle to near zero.
Externally, the use of either port is transparent to the user
save for minor differences in idle current. (See specification table).
When operating multiple converters, system requirements
often dictate operation of the converters at a common
frequency. To accommodate this requirement, the AFL
series converters provide both a synchronization input
and output.
The sync input port permits synchronization of an AFL
converter to any compatible external frequency source
oper- ating between 500KHz and 700KHz. This input signal
should be referenced to the input return and have a 10%
to 90% duty cycle. Compatibility requires transition times
less than 100ns, maximum low level of +0.8V and a minimum
high level of +2.0V. The sync output of another converter
which has been designated as the master oscillator provides
a convenient frequency source for this mode of operation.
When external synchronization is not required, the sync in
pin should be left open (unconnected )thereby permitting
the converter to operate at its’ own internally set frequency.
The sync output signal is a continuous pulse train set at
550 ± 50KHz, with a duty cycle of 15 ± 5.0%. This signal is
referenced to the input return and has been tailored to be
compatible with the AFL sync input port. Transition times
are less than 100ns and the low level output impedance is
less than 50. This signal is active when the DC input
voltage is within the specified operating range and the
converter is not inhibited. This output has adequate drive
reserve to synchronize at least five additional converters.
A typical connection is illustrated in Figure III.
Figure III. illustrates the preferred connection scheme for
operation of a set of AFL converters with outputs operating
in parallel. Use of this connection permits equal sharing
among the members of a set whose load current exceeds
the capacity of an individual AFL. An important feaure of the
AFL series operating in the parallel mode is that in addition
to sharing the current, the stress induced by temperature
will also be shared. Thus if one member of a paralleled set
is operating at a higher case temperature, the current it
provides to the load will be reduced as compensation for
the temperature induced stress on that device.
Optional
Synchronization
Connection
Power
Input
(Other Converters)
Share Bus
1
6
AFL
7
12
- Sense
Enable 2
+ Vout
Return
+ Sense
Share
Vin
Rtn
Case
Enable 1
Sync Out
Sync In
1
6
AFL
7
12
- Sense
Enable 2
+ Vout
Return
+ Sense
Share
Vin
Rtn
Case
Enable 1
Sync Out
Sync In
1
6
AFL
7
12
- Sense
Enable 2
+ Vout
Return
+ Sense
Share
Vin
Rtn
Case
Enable 1
Sync Out
Sync In
to Load
www.irf.com 7
AFL50XXS Series
A conservative aid to estimating the total heat sink surface
area (AHEAT SINK) required to set the maximum case temp-
erature rise (T) above ambient temperature is given by
the following expression:
A HEAT SINK
T
P80 30
085
143
.
.
.
where
T
PP
Eff
OUT
=
==
Case temperature rise above ambient
Device dissipation in Watts 11
T = 85 - 25 = 60°C
and the required heat sink area is
If the worst case full load efficiency for this device is 83%;
then the power dissipation at full load is given by
Because of the incorporation of many innovative
technological concepts, the AFL series of converters is
capable of providing very high output power from a package
of very small volume. These magnitudes of power density
can only be obtained by combining high circuit efficiency
with effective methods of heat removal from the die junctions.
This requirement has been effectively addressed inside the
device; but when operating at maximum loads, a significant
amount of heat will be generated and this heat must be
conducted away from the case. To maintain the case
temperature at or below the specified maximum of 125°C,
this heat must be transferred by conduction to an
appropriate heat dissipater held in intimate contact with the
converter base-plate.
When operating in the shared mode, it is important that
symmetry of connection be maintained as an assurance of
optimum load sharing performance. Thus, converter outputs
should be connected to the load with equal lengths of wire of
the same gauge and sense leads from each converter should
be connected to a common physical point, preferably at the
load along with the converter output and return leads. All
converters in a paralleled set must have their share pins
connected together. This arrangement is diagrammatically
illustrated in Figure III. showing the outputs and return pins
connected at a star point which is located close as possible to
the load.
As a consequence of the topology utilized in the current
sharing circuit, the share pin may be used for other functions.
In applications requiring only a single converter, the voltage
appearing on the share pin may be used as a “current
monitor”. The share pin open circuit voltage is nominally
+1.00V at no load and increases linearly with increasing
output current to +2.20V at full load.
1Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN
Thermal Considerations
Since the effectiveness of this heat transfer is dependent
on the intimacy of the baseplate/heatsink interface, it is
strongly recommended that a high thermal conductivity heat
transferring medium is inserted between the baseplate and
heatsink. The material most frequently utilized at the factory
during all testing and burn-in processes is sold under the
trade name of Sil-Pad® 4001. This particular product is an
insulator but electrically conductive versions are also
available. Use of these materials assures maximum surface
contact with the heat dissipater thereby compensating for
any minor surface variations. While other available types of
heat conductive materials and thermal compounds provide
similar effectiveness, these alternatives are often less
convenient and can be somewhat messy to use.
As an example, it is desired to maintain the case temperature
of an AFL5015S at +85°C while operating in an open area
whose ambient temperature is held at a constant +25°C;
then
Thus, a total heat sink surface area (including fins, if any) of
71 in2 in this example, would limit case rise to 60°C above
ambient. A flat aluminum plate, 0.25" thick and of
approximate dimension 4" by 9" (36 in2 per side) would
suffice for this application in a still air environment. Note
that to meet the criteria in this example, both sides of the
plate require unrestricted exposure to the ambient air.
()
P=•
=• =120 1
83 1 120 0 205 24 6
...W
A = 60
80 24.6 inHEAT SINK 0.85
−=
143
2
30 71
.
.
8www.irf.com
AFL50XXS Series
Input Filter
Undervoltage Lockout
The AFL50XXS series converters incorporate a LC input
filter whose elements dominate the input load impedance
characteristic at turn-on. The input circuit is as shown in
Figure IV.
Figure IV. Input Filter Circuit
Output Voltage Adjust
In addition to permitting close voltage regulation of remotely
located loads, it is possible to utilize the converter sense
pins to incrementally increase the output voltage over a
limited range. The adjustments made possible by this method
are intended as a means to “trim” the output to a voltage
setting for some particular application, but are not intended
to create an adjustable output converter. These output
voltage setting variations are obtained by connecting an
appropriate resistor value between the +sense and -sense
pins while connecting the -sense pin to the output return pin
as shown in Figure V. below. The range of adjustment and
corresponding range of resistance values can be determined
by use of the following equation.
R = 100 - -.025
adj
NOM
OUT NOM
V
VV
Where VNOM = device nominal output voltage, and
VOUT = desired output voltage
Figure V. Connection for VOUT Adjustment
Finding a resistor value for a particular output voltage, is
simply a matter of substituting the desired output voltage
and the nominal device voltage into the equation and solving
for the corresponding resistor value.
Note: Radj must be set 500
Attempts to adjust the output voltage to a value greater than
120% of nominal should be avoided because of the potential
of exceeding internal component stress ratings and
subsequent operation to failure. Under no circumstance
should the external setting resistor be made less than 500W.
By remaining within this specified range of values, completely
safe operation fully within normal component derating limits
is assured.
Enable 2
Share
+ Sense
- Sense
Return
+ V
out
To Load
R
ADJ
AFL50xxS
Examination of the equation relating output voltage and
resistor value reveals a special benefit of the circuit topology
utilized for remote sensing of output voltage in the AFL50XXS
series of converters. It is apparent that as the resistance
increases, the output voltage approaches the nominal set
value of the device. In fact the calculated limiting value of
output voltage as the adjusting resistor becomes very large
is 25mV above nominal device voltage.
The consequence is that if the +sense connection is
unintentionally broken, an AFL50XXS has a fail-safe output
voltage of Vout + 25mV, where the 25mV is independent of
the nominal output voltage. It can be further demonstrated
that in the event of both the + and - sense connections
being broken, the output will be limited to Vout + 440mV.
This 440mV is also essentially constant independent of the
nominal output voltage.
0.75µH
Pin 1
Pin 2
2.7µfd
A minimum voltage is required at the input of the converter
to initiate operation. This voltage is set to 26.5 ± 1.5V. To
preclude the possibility of noise or other variations at the
input falsely initiating and halting converter operation, a
hysteresis of approximately 2.0V is incorporated in this
circuit. Thus if the input voltage droops to 24.5 ± 1.5V, the
converter will shut down and remain inoperative until the
input voltage returns to 25V.
www.irf.com 9
AFL50XXS Series
General Application Information Table 1. Nominal Resistance of Cu Wire
The AFL50XXS series of converters are capable of
providing large transient currents to user loads on demand.
Because the nominal input voltage range in this series is
relatively low, the resulting input current demands will be
correspondingly large. It is important therefore, that the line
impedance be kept very low to prevent steady state and
transient input currents from degrading the supply voltage
between the voltage source and the converter input. In
applications requiring high static currents and large
transients, it is recommended that the input leads be made
of adequate size to minimize resistive losses, and that a
good quality capacitor of approximately 100µF be connected
directly across the input terminals to assure an adequately
low impedance at the input terminals. Table I relates nominal
resistance values and selected wire sizes.
Wire Size, AWG Resistance per ft
24 Ga 25.7 m
22 Ga 16.2 m
20 Ga 10.1 m
18 Ga 6.4 m
16 Ga 4.0 m
14 Ga 2.5 m
12 Ga 1.6 m
Incorporation of a 100µF capacitor at the input terminals is
recommended as compensation for the dynamic effects
of the parasitic resistance of the input cable reacting with
the complex impedance of the converter input, and to
provide an energy reservoir for transient input current
requirements.
Figure VI. Problems of Parasitic Resistance in input Leads
Vin
Rtn
Case
Enable 1
Sync Out
Sync In
R
p
R
p
I
Rtn
I
in
e
source
System Ground
e
Rtn
100
µfd
(See text)
10 www.irf.com
AFL50XXS Series
Mechanical Outlines
Case X
Case W
Pin Variation of Case Y
1.260 1.500
2.500
2.760
3.000
ø 0.128
0.250
1.000
Ref 0.200 Typ
Non-cum
0.050
0.220
Pin
ø 0.040
0.238 max
0.380
Max
2.975 max
16
712
0.050
0.220
0.250
1.000
Pin
ø 0.040
0.525
0.380
Max
2.800
0.42
Case Y Case Z
Pin Variation of Case Y
1.500 1.750
2.500
0.25 typ
1.150
0.050
0.220
16
712
1.750 0.375
2.00
0.250
1.000
Ref 0.200 Typ
Non-cum
Pin
ø 0.040
0.300
ø 0.140
0.238 max
0.380
Max
2.975 max
0.050
0.220
0.250
1.000
Ref
Pin
ø 0.040
0.525
0.380
Max
2.800
0.36
BERYLLIA WARNING: These converters are hermetically sealed; however they contain BeO substrates and should not be ground or subjected to any other
operations including exposure to acids, which may produce Beryllium dust or fumes containing Beryllium
Tolerances, unless otherwise specified: .XX = ±0.010
.XXX = ±0.005
www.irf.com 11
AFL50XXS Series
Pin Designation
Standard Microcircuit Drawing Equivalence Table
Pin # Designation
1 + Input
2 Input Return
3 Case Ground
4 Enable 1
5 Sync Output
6 Sync Input
7 + Output
8 Output Return
9 Return Sense
10 + Sense
11 Share
12 Enable 2
Standard Microcircuit IR Standard
Drawing Number Part Number
5962-02557 AFL5005S
5962-02558 AFL5008S
5962-02559 AFL5009S
5962-02560 AFL5012S
5962-02561 AFL5015S
5962-02562 AFL5028S
12 www.irf.com
AFL50XXS Series
Part Numbering
Notes:
Best commercial practice
Sample tests at low and high temperatures
-55°C to +105°C for AHE, ATO, ATW
Device Screening
Requirement MIL-STD-883 Method No Suffix ES
d
HB CH
Temperature Range -2C to +8C -5C to +125°C
e
-5C to +125°C -5C to +125°C
Element Evaluation MIL-PRF-38534 N/A N/A N/A Class H
Non-Destructive
Bond Pull
Internal Visual 2017
c
Yes Yes Yes
Temperature Cycle 1010 N/A Cond B Cond C Cond C
Constant Acceleration 2001, Y1 Axis N/A 500 Gs 3000 Gs 3000 Gs
PIND 2020 N/A N/A N/A N/A
Burn-In 1015 N/A 48 hrs@hi temp 160 hrs@12C 160 hrs@12C
Final Electrical MIL-PRF-38534 25°C 25°C
d
-55°C, +25°C, -55°C, +25°C,
( Group A ) & Specification +125°C +12C
PDA MIL-PRF-38534 N/A N/A N/A 10%
Seal, Fine and Gross 1014 Cond A Cond A, C Cond A, C Cond A, C
Radiographic 2012 N/A N/A N/A N/A
External Visual 2009
c
Yes Yes Yes
N/A N/A2023 N/A N/A
AFL 50 05 S X /CH
Model
Input Voltage
28 = 28V
50 = 50V
120 = 120V
270 = 270V
Output Voltage
05 = 5V, 06 = 6V
07 = 7V, 08 = 8V
09 = 9V, 12 = 12V
15 = 15V, 28 = 28V
Output
S = Single
Case Style
W, X, Y, Z
Screening Level
(Please refer to Screening Table)
No suffix, ES, HB, CH
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
IR SAN JOSE: 2520Junction Avenue, San Jose, California 95134, Tel: (408) 434-5000
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 01/2011