Quad, 235 MHz, DC-Coupled VGA
and Differential Output Amplifier
AD8264
Rev. A
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FEATURES
Low noise
Voltage noise: 2.3 nV/√Hz
Current noise: 2 pA/√Hz
Wide bandwidth
Small signal: 235 MHz (VGAx); 80 MHz (differential output
amplifier)
Large signal: 80 MHz (1 V p-p)
Gain range
0 to 24 dB (input to VGA output)
6 to 30 dB (input to differential output)
Gain scaling: 20 dB/V
DC-coupled
Single-ended input and differential output
Supplies: ±2.5 V to ±5 V
Low power: 140 mW per channel @ ±3.3 V
APPLICATIONS
Multichannel data acquisition
Positron emission tomography
Gain trim
Industrial and medical ultrasound
Radar receivers
FUNCTIONAL BLOCK DIAGRAM
VOCM
VPOS
IPP1
GNH1
IPN1
ATTENUATOR
–24dB TO 0dB
VOH1
VOL1
IPP3
GNH3
IPN3 VOH3
VOL3
6dB
IPP4
GNH4
IPN4
+
–
PrA
6dB
+
–
PrA
6dB
+
–
PrA
6dB
+
–
PrA
6dB
VOH4
VOL4
6dB
IPP2
GNH2
IPN2
ATTENUATOR
–24dB TO 0dB
ATTENUATOR
–24dB TO 0dB
ATTENUATOR
–24dB TO 0dB
VOH2
VOL2
OPP2
GNLO
OPP3
OPP4
18dB
18dB
18dB
18dB
OFS2
OFS1
OFS3
OFS4
VNEG
VGA1
VGA2
VGA3
COMM
OPP1
VGA4
+
–
+
–
+
–
+
–
CH1 GAIN
CONTROL
CH2 GAIN
CONTROL
CH3 GAIN
CONTROL
CH4 GAIN
CONTROL
6dB
6dB
07736-001
Figure 1.
GENERAL DESCRIPTION
The AD8264 is a 4-channel, linear-in-dB, general-purpose
variable gain amplifier (VGA) with a preamplifier (preamp),
and a flexible differential output buffer. Intended for a broad
range of applications, dc coupling combined with wide band-
width makes this amplifier a very good pulse processor.
Each channel includes a single-ended input preamp/VGA
section to preserve the wide bandwidth and fast slew rate for low-
distortion pulse applications. A 6 dB differential output buffer
with common-mode and offset adjustments enable direct coupling
to most modern high speed analog-to-digital converters (ADCs),
using the converter reference output for perfect dc matching levels.
The −3 dB bandwidth of the preamp/VGA is dc to 235 MHz,
and the bandwidth of the differential driver is 80 MHz. The
floating gain control interface provides a precise linear-in-dB scale
of 20 dB/V and is easy to interface to a variety of external circuits.
The gain of each channel is adjusted independently, and all
channels are referenced to a single pin, GNLO. Combined with
a multi-output, digital-to-analog converter (DAC), each section
of the AD8264 can be used for active calibration or as a trim
amplifier.
The gain range of the VGA section is 24 dB. Operation from
a dual polarity power supply enables amplification of negative
voltage pulses that are generated by current-sinking pulses into
a grounded load, such as is typical of photodiodes or photo-
multiplier tubes (PMT). Delay-free processing of wide-band
video signals is also possible. The differential output amplifier
permits convenient level shifting and interfacing to single-
supply ADCs using the VOCM and OFSx pins.
The AD8264 is available in a 40-lead, 6 mm × 6 mm LFCSP
with an operating temperature range of −40°C to +105°C.
AD8264
Rev. A | Page 2 of 40
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
Maximum Power Dissipation ..................................................... 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Test Circuits ..................................................................................... 20
Theory of Operation ...................................................................... 28
Overview ..................................................................................... 28
Preamp ......................................................................................... 28
VGA ............................................................................................. 28
Post Amplifier ............................................................................. 29
Noise ............................................................................................ 29
Applications Information .............................................................. 30
A Low Channel Count Application Concept Using a Discrete
Reference ..................................................................................... 30
A DC Connected Concept Example ........................................ 31
Evaluation Board ............................................................................ 34
Connecting and Using the AD8264-E VA L Z .......................... 34
Outline Dimensions ....................................................................... 37
Ordering Guide .......................................................................... 37
REVISION HISTORY
1/11—Rev. 0 to Rev. A
Changes to Figure 1 .......................................................................... 1
Changes to Connecting and Using the AD8264-EVALZ Section
and Figure 117 ................................................................................. 34
Changes to Figure 118 .................................................................... 35
5/09—Revision 0: Initial Version
AD8264
Rev. A | Page 3 of 40
SPECIFICATIONS
VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V,
VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
Table 1.
Parameter Conditions Min Typ Max Unit
GENERAL PERFORMANCE
–3 dB Small Signal Bandwidth (VGAx) VOUT = 10 mV p-p 235 MHz
–3 dB Large Signal Bandwidth (VGAx) VOUT = 1 V p-p 150 MHz
–3 dB Small Signal Bandwidth (Differential Output)1VOUT = 100 mV p-p 80 MHz
–3 dB Large Signal Bandwidth (Differential Output)1 V
OUT
= 2 V p-p 80 MHz
Slew Rate VGAx, VOUT = 2 V p-p 380 V/µs
VGAx, VOUT = 1 V p-p 290 V/µs
Differential output, VOUT = 2 V p-p 470 V/µs
Differential output, VOUT = 1 V p-p 220 V/µs
Input Bias Current Pins IPPx −8 −5 −3 µA
Input Resistance Pins IPPx at dc; ΔVIN/ΔIBIAS 4.2 MΩ
Input Capacitance Pins IPPx 2 pF
Input Impedance Pins IPPx at 10 MHz 7.9 kΩ
Input Voltage Noise 2.3 nV/√Hz
Input Current Noise 2 pA/√Hz
Noise Figure (Differential Output) V
GAIN
= 0.7 V, R
S
= 50 Ω, unterminated 9 dB
Output-Referred Noise (Differential Output) VGAIN = 0.7 V (Gain = 30 dB) 72 nV/√Hz
VGAIN = −0.7 V (Gain = 6 dB) 45 nV/√Hz
Output Impedance VGAx, dc to 10 MHz 3.5 Ω
Differential output, dc to 10 MHz <1 Ω
Output Signal Range Preamp |VS| − 1.3 V
VGAx, R
L
≥ 500 Ω |V
S
| − 1.3 V
Differential amplifier, RL ≥ 500 Ω per side |VS| − 0.5 V
Output Offset Voltage Preamp offset −6 |<1| +6 mV
VGAx offset, VGAIN = 0.7 V −18 |<5| +18 mV
Differential output offset, VGAIN = 0.7 V −38 |<10| +38 mV
DYNAMIC PERFORMANCE
Harmonic Distortion VGAx = 1 V p-p, differential
output = 2 V p-p (measured at VGAx)
HD2 f = 1 MHz −73 dBc
HD3 −68 dBc
HD2 f = 10 MHz −71 dBc
HD3 −61 dBc
HD2 f = 35 MHz −60 dBc
HD3 −53 dBc
VGAx = 1 V p-p, differential output = 2 V p-p
(measured at differential output)
HD2 f = 1 MHz −78 dBc
HD3 −66 dBc
HD2 f = 10 MHz −71 dBc
HD3 −43 dBc
HD2 f = 35 MHz −56 dBc
HD3 −20 dBc
Input 1 dB Compression Point VGAIN = −0.7 V, f = 10 MHz 7 dBm2
VGAIN = +0.7 V, f = 10 MHz −9.6 dBm
AD8264
Rev. A | Page 4 of 40
Parameter Conditions Min Typ Max Unit
Two-Tone Intermodulation Distortion (IMD3) VGAx = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz −68 dBc
VGAx = 1 V p-p, f1 = 35 MHz, f2 = 36 MHz −51 dBc
VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz −49 dBc
VOUT = 2 V p-p, f1 = 35 MHz, f2 = 36 MHz −34 dBc
Output Third-Order Intercept VGAx = 1 V p-p, f = 10 MHz 32 dBm
19 dBVRMS
VGAx = 1 V p-p, f = 35 MHz 23 dBm
10 dBVRMS
V
OUT
= 2 V p-p, f = 10 MHz 30 dBm
17 dBVRMS
VOUT = 2 V p-p, f = 35 MHz 21 dBm
8 dBVRMS
Overload Recovery VGAIN = 0.7 V, VIN stepped from
0.1 V p-p to 1 V p-p
25
ns
Group Delay Variation 1 MHz < f < 100 MHz, full gain range ±1 ns
ACCURACY
Absolute Gain Error3 −0.7 V < VGAIN < −0.6 V 0 0.2 to 2 3 dB
−0.6 V < V
GAIN
< −0.5 V −1.25 ±0.35 +1.25 dB
−0.5 V < VGAIN < +0.5 V −1 ±0.25 +1 dB
0.5 V < VGAIN < 0.6 V −1.25 ±0.35 +1.25 dB
0.6 V < VGAIN < 0.7 V −3 −0.2 to −2 0 dB
Gain Law Conformance4 −0.5 V < VGAIN < +0.5 V, ±2.5 V ≤ VS ≤ ±5 V ±0.2 dB
−0.5 V < V
GAIN
< +0.5 V, −40°C ≤ T
A
≤ +105°C ±0.3 dB
Channel-to-Channel Matching Single IC, −0.5 V < V
GAIN < +0.5 V,
−40°C ≤ TA ≤ +105°C
−0.5 ±0.1 to ±0.25 +0.5
dB
Multiple ICs, −0.5 V < VGAIN < +0.5 V,
−40°C ≤ TA ≤ +105°C
±0.25
dB
GAIN CONTROL INTERFACE
Gain Scaling Factor −0.5 V < VGAIN < +0.5 V 19.5 20.0 20.5 dB/V
Over Temperature −40°C ≤ TA ≤ +105°C 20 ± 0.5 dB/V
Gain Range 24 dB
Gain Intercept to VGAx 11.5 11.9 12.2 dB
Over Temperature −40°C ≤ TA ≤ +105°C 11.9 ± 0.4 dB
Gain Intercept to Differential Output 17.5 17.9 18.2 dB
Over Temperature −40°C ≤ TA ≤ +105°C 17.9 ± 0.4 dB
GNHx Input Voltage Range GNLO = 0 V, no gain foldover −VS +VS V
Input Resistance ΔVIN/ΔIBIAS, −0.7 V < VGAIN < +0.7 V 70 MΩ
GNHx Input Bias Current −0.7 V < VGAIN < 0.7 V −0.9 −0.4 0 µA
Over Temperature −0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C −0.4 ± +0.2 µA
GNLO Input Bias Current −0.7 V < VGAIN < 0.7 V −1.2 µA
Over Temperature −0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C −1.2 ± +0.4 µA
Response Time 24 dB gain change 200 ns
OUTPUT BUFFER
VOCM Input Bias Current 0.3 1.5 2.5 nA
Over Temperature −40°C ≤ T
A
≤ +105°C 1.5 ± 0.3 nA
VOCM Input Voltage Range OFSx = 0 V, VGAx = 0 V −1.4 +1.4 V
Gain (VGAx to Differential Output) 5.75 6 6.25 dB
Over Temperature −40°C ≤ TA ≤ +105°C 6 ± 0.5 dB
AD8264
Rev. A | Page 5 of 40
Parameter Conditions Min Typ Max Unit
POWER SUPPLY
Supply Voltage ±2.5 ±5 V
Power Consumption
Quiescent Current
VS = ± 2.5 V 65 79 88 mA
VS = ± 2.5 V, −40°C ≤ TA ≤ +105°C 79 ± 25 mA
VS = ± 3.3 V 70 85 95 mA
VS = ± 3.3 V, −40°C ≤ TA ≤ +105°C 85 ± 30 mA
V
S
= ± 5 V 81 99 110 mA
VS = ± 5 V, −40°C ≤ TA ≤ +85°C5 99 ± 30 mA
Power Dissipation VS = ± 2.5 V 395 mW
VS = ±3.3 V 560 mW
VS = ±5 V 990 mW
PSRR From VPOS to differential output, VGAIN = 0.7 V −15 dB
From VNEG to differential output, V
GAIN
= 0.7 V −15 dB
1 Differential Output = (VOHx − VOLx).
2 All dBm values are calculated with 50 Ω reference, unless otherwise noted.
3 Conformance to theoretical gain expression (see Equation 1 in the Theory of Operation section).
4 Conformance to best-fit dB linear curve.
5 For supplies greater than ±3.3 V, the operating temperature range is limited to −40°C ≤ TA ≤ +85°C.
AD8264
Rev. A | Page 6 of 40
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Voltage
Supply Voltage (VPOS, VNEG) ±6 V
Input Voltage (INPx) VPOS, VNEG
Gain Voltage (GNHx, GNLO) VPOS, VNEG
Power Dissipation 2.5 W
Temperature
Operating Temperature Range −40°C to +105°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
Package Glass Transition Temperature (TG) 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. The θJA
values in Table 3 assume a 4-layer JEDEC standard board with
zero airflow.
Table 3. Thermal Resistance
Package Type θJA θJC Unit
40-Lead LFCSP1 31.0 2.3 °C/W
1 4-Layer JEDEC board (2S2P).
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8264 is limited
by the associated rise in junction temperature (TJ) on the die. At
approximately 150°C, which is the glass transition temperature,
the properties of the plastic change. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the amplifiers. Exceeding a temperature of 150°C for an
extended period can cause changes in silicon devices, potentially
resulting in a loss of functionality.
ESD CAUTION
AD8264
Rev. A | Page 7 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IPP2
OPP3
IPN3
IPP3
8
7
6
5
1
4
3
229
30
3132
28
34 33
27
COMM
IPP1
IPN2
IPN1
OPP1
OPP2
GNH1
GNH2
1413 171211 18
VOH3
VGA3
VOL3
15 16 20
37 35
19
VOH1
VNEG
GNLO
VOH2
21
22
23
24
VGA2
VOL2
VOL1
OFS1
PIN1
INDICATOR
AD8264
TOP VI EW
(No t t o Scal e)
VPOS
IPN4
OPP4 10
9
3839
OFS3
VOL4
VOH4
3640
25
26
OFS2
VGA1
VGA4
OFS4
VNEG
VPOS
VOCM
GNH3
GNH4
COMM
IPP4
NOTES
1. E X P OSED P ADDLE ( P IN 0) NEE DS AN E LECT RICAL
CONNE CTION T O GROUND. FO R P ROPER RF G ROUNDING
AND INCRE AS E D RE LIABIL ITY , THE P AD M US T BE
CONNE CTED T O T HE GROUND P LANE.
07736-003
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
0 (EP), 12, 39 COMM Ground. Exposed paddle (EP, Pin 0) needs an electrical connection to ground. For proper RF grounding
and increased reliability, the pad must be connected to the ground plane.
1, 4, 7, 10 IPN1, IPN2,
IPN3, IPN4
Negative Preamp Inputs for Channel 1 Through Channel 4. Normally, no external connection is needed.
2, 3, 8, 9 OPP1, OPP2,
OPP3, OPP4
Preamp Output for Channel 1 Through Channel 4. This pin is internally connected to the attenuator
(VGA) input, and normally, no external connection is needed.
5, 6, 11, 40 IPP1, IPP2,
IPP3, IPP4
Positive Preamp Input for Channel 1 Through Channel 4. High impedance.
13, 14, 37, 38 GNH1, GNH2,
GNH3, GNH4
Positive Gain Control Voltage Input for Channel 1 Through Channel 4. This pin is referenced to GNLO (Pin 36).
15 VOCM This pin sets the differential output amplifier (VOHx and VOLx) common-mode voltage.
16, 35 VPOS Positive Supply (Internally Tied Together).
17, 34 VNEG Negative Supply (Internally Tied Together).
18, 19, 32, 33 OFS1, OFS2,
OFS3, OFS4
Voltage sets the differential output offset for Channel 1 through Channel 4. This is the noninverting input
to the differential amplifier, and it has the same bandwidth as the inverting input (VGAx).
20, 25, 26, 31 VGA4, VGA3
VGA2, VGA1
VGA Output for Channel 1 Through Channel 4.
21, 24, 27, 30 VOL1, VOL2
VOL3, VOL4
Negative Differential Amplifier Output for Channel 1 Through Channel 4.
22, 23, 28, 29 VOH1, VOH2,
VOH3, VOH4
Positive Differential Amplifier Output for Channel 1 Through Channel 4.
36 GNLO Negative Gain Control Input (Reference for GNHx Pins).
AD8264
Rev. A | Page 8 of 40
TYPICAL PERFORMANCE CHARACTERISTICS
VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, R L = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V,
VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
–6
0
6
12
18
24
30
36
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
GAIN (d B)
V
GAIN
(V)
–40°C
–40°C
+25°C
+25°C
+85°C
+85°C
+105°C
+105°C
07736-004
VGA
DIFFERENTIAL
OUTPUT
Figure 3. Gain vs. VGAIN vs. Temperature
Figure 4. Gain Error vs. VGAIN vs. Temperature
–4
–3
–2
–1
0
1
2
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
GAIN ERRO R ( dB)
1MHz
10MHz
70MHz
100MHz
150MHz
07736-006
VGAIN (V)
Figure 5. Gain Error vs. VGAIN at Various Frequencies to VGAx
07736-007
HITS
140
120
100
80
60
40
20
0
–0.6 –0.4 –0.2 00.2 0.4
GAIN ERRO R ( dB)
MEAN: –0.1dB
SD: 0.05dB
V
GAIN
= 0V
Figure 6. VGA Absolute Gain Error Histogram
07736-008
HITS
180
150
120
90
60
30
0
19.0 19.5 20.0 20.5 21.0
GAIN SCALING (dB/V)
MEAN: 20.1dB
SD: 0.09dB
Figure 7. Gain Scale Factor Histogram (−0.4 V < VGAIN < +0.4 V)
07736-009
HITS
80
60
40
20
0
11.7 11.8 11.9 12.0 12.1
GAIN INTERCEP T (dB)
MEAN: 11.9dB
SD: 0.08dB
Figure 8. VGA Gain Intercept Histogram
AD8264
Rev. A | Page 9 of 40
07736-028
HITS
–0.5 –0.4 –0.3 –0.2 –0.1 00.2 0.50.40.30.1
GAIN ERRO R M ATCHING ( dB)
0
100
200
300
400
500
600
700
CH 1 TO CH 2
CH 1 TO CH 3
CH 1 TO CH 4
VGAIN = 0V
Figure 9. Channel-to-Channel Gain Match Histogram
–18
–12
–6
0
6
12
18
24
30
100k 1M 10M 100M
GAIN (d B)
FREQUENCY (Hz)
V
GAIN
= +0. 7V
P
IN
= –28dBm
V
GAIN
= +0. 5V
V
GAIN
= +0. 2V
V
GAIN
= 0V
V
GAIN
= –0.2V
V
GAIN
= –0.5V
V
GAIN
= –0.7V
07736-010
Figure 10. Frequency Response vs. Gain to VGAx for
Various Values of VGAIN
–40
–30
–20
–10
0
10
20
30
40
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M
V
GAIN
= +0. 7V
V
GAIN
= +0. 5V
V
GAIN
= +0. 2V
V
GAIN
= 0V
V
GAIN
= –0.2V
V
GAIN
= –0.5V
V
GAIN
= –0.7V
07736-011
P
IN
= –44dBm
Figure 11. Frequency Response vs. Gain to Differential Output for
Various Values of VGAIN
–40
–30
–20
–10
0
10
20
30
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
CL = 0pF
CL = 10pF
CL = 22pF
07736-012
VOUT = 0. 1V p-p
Figure 12. Frequency Response to Differential Output for
Various Capacitive Loads
–30
–20
–10
0
10
20
30
GAIN (d B)
–40
FREQUENCY (Hz)
100k 1M 10M 100M
07736-013
V
OUT
= 0.1V p-p
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
Figure 13. Frequency Response to Differential Output for
Various Capacitive Loads with Series R = 10 Ω
–30
–20
–10
0
10
20
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
C
L
= 47pF
07736-014
V
OUT
= 0.1V p-p
Figure 14. Small Signal Frequency Response to VGAx for
Various Capacitive Loads
AD8264
Rev. A | Page 10 of 40
–30
–20
–10
0
10
20
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
CL = 47pF
CL = 22pF
CL = 9pF
CL = 0pF
07736-015
PIN = –10dBm
Figure 15. Large Signal Frequency Response to VGAx for
Various Capacitive Loads
–30
–20
–10
0
10
20
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
C
L
= 47pF
07736-016
P
IN
= –28dBm
Figure 16. Small Signal Frequency Response to VGAx for
Various Capacitive Loads with Series R = 10 Ω
–30
–20
–10
0
10
20
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
C
L
= 47pF
C
L
= 22pF
C
L
= 10pF
C
L
= 0pF
07736-017
P
IN
= –8dBm
Figure 17. Large Signal Frequency Response to VGAx for
Various Capacitive Loads with Series R = 10 Ω
GAIN (d B)
FREQUENCY (Hz)
–18
–12
–6
0
6
12
18
24
30
100k 1M 10M 100M 500M
07736-018
VOUT = 0. 1V p-p VGAIN = + 0.7V
VGAIN = 0V
VGAIN = –0.7V
VS = ±5V
VS = ±3. 3V
VS = ±2. 5V
Figure 18. Small Signal Frequency Response vs. Gain to VGAx for
Various Supply Voltages
–40
–30
–20
–10
0
10
20
30
40
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
07736-019
VOUT = 0. 1V p-p VGAIN = + 0.7V
VGAIN = 0V
VGAIN = –0.7V
VS = ±5V
VS = ±3. 3V
VS = ±2. 5V
Figure 19. Small Signal Frequency Response vs. Gain to Differential Output
for Various Supply Voltages
–6
0
6
12
18
24
30
36
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
V
S
= ±5V
V
S
= ±3. 3V
V
S
= ±2. 5V
V
S
= ±5V
V
S
= ±3. 3V
V
S
= ±2. 5V
07736-020
V
OUT
= 0.1V p-p
V
GAIN
= 0.7V
VGA
DIFFERENTIAL
OUTPUT
Figure 20. Large Signal Frequency Response to VGAx and
Differential Output for Various Supply Voltages
AD8264
Rev. A | Page 11 of 40
GAIN (d B)
–3
–2
–1
0
1
FREQUENCY (Hz)
100k 1M 10M 100M
VS = ±2. 5V , VO Hx
VS = ±3. 3V , VO Hx
VS = ±5V, VO Hx
VS = ±2.5V, VOLx
VS = ±3.3V, VOLx
VS = ±5V, VOLx
07736-021
PIN = –16dBm
Figure 21. Frequency Response from VOCM to VOHx and VOLx for
Various Supplies
–21
–15
–9
–3
3
9
GAIN (d B)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
VS = ±5V
VS = ±3. 3V
VS = ±2. 5V
07736-022
VOUT = 0. 1V p-p
Figure 22. Frequency Response from OFSx to Differential Output for
Various Supply Voltages
–12
–6
0
6
12
100k 1M 10M 100M 1G
GAIN (d B)
FREQUENCY (Hz)
VS = ±2. 5V
VS = ±3. 3V
VS = ±5V
07736-023
PIN = –22dBm
Figure 23. Preamp Frequency Response to OPPx
0
1
2
3
4
5
1M 10M 100M
DELAY (ns)
FRE QUENCY ( Hz )
VGAIN = –0.7V
VGAIN = + 0.7V
VGAIN = 0V
07736-024
Figure 24. Group Delay vs. Frequency to VGAx
2
3
4
5
6
7
8
1M 10M 100M
DELAY (ns)
FREQUENCY (Hz)
VGAIN = –0.7V
VGAIN = + 0.7V VGAIN = 0V
07736-025
Figure 25. Group Delay vs. Frequency to Differential Output
OFFSET VOLTAGE RTO (mV)
–10
0
10
–5
15
5
0.70.50.30.1
V
GAIN
(V)
–0.1–0.3–0.5–0.7
T
A
= +105°C
T
A
= +25°C
T
A
= –40° C
MAX
MIN
07736-026
Figure 26. Differential Output Offset Voltage vs. VGAIN vs. Temperature
AD8264
Rev. A | Page 12 of 40
OFFSET VOLTAGE RTO (mV)
VGAIN (V)
–10
0
–5
10
5
0.70.50.30.1–0.1–0.3–0.5–0.7
07736-027
MAX
MIN
T
A
= +105°C
T
A
= +25°C
T
A
= –40° C
Figure 27. VGAx Output Offset Voltage vs. VGAIN vs. Temperature
07736-029
HITS
0
–30 –20 –10 010 3020
OUTPUT OFFSET VOLTAGE (mV)
3000
2500
2000
1500
1000
500
V
GAIN
= –0.4V
V
GAIN
= 0V
V
GAIN
= +0. 4V
Figure 28. Output Offset Histogram to VGAx
07736-095
HITS
–30 –20 –10 010 3020
OUTPUT OFFSET VOLTAGE (mV)
V
GAIN
= –0.4V
V
GAIN
= 0V
V
GAIN
= +0. 4V
0
100
200
300
400
500
600
700
800
Figure 29. Output Offset Histogram to Differential Output
0.1
1
10
100
0.1 110 100
OUTPUT RESISTANCE (Ω)
FREQUENCY (MHz)
VS = ±2. 5V
VS = ±5V
07736-030
Figure 30. Output Resistance (VOHx, VOLx) vs. Frequency
0.1 110 100
FREQUENCY (MHz)
1
10
OUTPUT RESISTANCE (Ω)
V
S
= ±5V
V
S
= ±2. 5V
07736-031
Figure 31. Output Resistance (VGAx) vs. Frequency
0
20
40
60
80
100
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
V
GAIN
(V)
OUTPUT NOISE (nV/√Hz)
VGAx
DIFFERENTIAL OUTPUT
07736-032
Figure 32. Output Referred Noise to VGAx and Differential Output vs. VGAIN
AD8264
Rev. A | Page 13 of 40
1
10
100
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
INP UT REF E RRE D NOI S E (n V/√Hz)
V
GAIN
(V)
DIFFERENTIAL OUTPUT
VGAx
07736-033
Figure 33. Input Referred Noise from VGAx and Differential Output vs. VGAIN
1
10
100
100k
FREQUENCY (Hz)
1M 10M 100M10k1k1001
INPUT REFERRED NOISE (nV/√Hz)
07736-034
VGAx
DIFFERENTIAL OUTPUT
Figure 34. Input Referred Noise vs. Frequency at Maximum Gain
110 100 1k 10k
1
10
100
INPUT REFERRED NOISE (nV/√Hz)
RSOURCE (Ω)
07736-035
DIFFERENTIAL OUTPUT
VGAx
Figure 35. Input Referred Noise vs. RSOURCE
Figure 36. Noise Figure vs. VGAIN
–70
–60
–50
–40
–30
–20
–10
0.1 110 100
CMRR (dB)
FREQUENCY (MHz)
07736-037
Figure 37. VOCM Common-Mode Rejection Ratio vs. Frequency
−90
−60
−50
−80
−70
HD (d Bc)
−30
−40
HD2, VS = ±2. 5V
HD3, VS = ±2. 5V
HD2, VS = ±5V
HD3, VS = ±5V
0400 800 1200 20001600
RLOAD (Ω)
07736-038
Figure 38. Harmonic Distortion to VGAx vs. RLOAD and Various Supplies
AD8264
Rev. A | Page 14 of 40
−90
−60
−50
−80
−70
HD (d Bc)
−30
−40
HD2, V
S
= ±2. 5V
HD3, VS = ±2. 5V
HD2, VS = ±5V
HD3, VS = ±5V
010 20 30 5040
CLOAD (pF)
07736-039
Figure 39. Harmonic Distortion to VGAx vs. CLOAD
−90
−60
−50
−80
−70
HD (d Bc)
−30
−40
RLOAD (Ω)
HD2, VS = ±2. 5V
HD3, VS = ±2. 5V
HD2, VS = ±5V
HD3, VS = ±5V
0400 800 1200 20001600
07736-040
Figure 40. Harmonic Distortion to Differential Output vs.
RLOAD and Various Supplies
−90
−60
−50
−80
−70
HD (d Bc)
−30
−40
C
LOAD
(pF)
50403020100
HD2, V
S
= ±2. 5V
HD3, V
S
= ±2. 5V
07736-041
Figure 41. Harmonic Distortion to Differential Output vs. CLOAD
–90
–60
–50
–80
–70
HD2 (d Bc)
–30
–40
V
GAIN
(V)
0.70.50.30.1–0.1–0.3–0.5–0.7
1MHz
10MHz
35MHz
100MHz
07736-042
Figure 42. HD2 vs. VGAIN vs. Frequency to VGAx
−90
−60
−50
−80
−70
HD3 (d Bc)
−20
−30
−40
V
GAIN
(V)
0.70.50.30.1–0.1–0.3–0.5–0.7
1MHz
10MHz
35MHz
100MHz
07736-043
Figure 43. HD3 vs. VGAIN vs. Frequency to VGAx
−90
−60
−50
−80
−70
HD2 (d Bc)
−30
−40
V
GAIN
(V)
0.70.50.30.1–0.1–0.3–0.5–0.7
VG Ax = 0.5Vp-p
VG Ax = 1V p-p
VG Ax = 2V p-p
07736-044
INPUT LIMITED
Figure 44. HD2 vs. Amplitude to VGAx
AD8264
Rev. A | Page 15 of 40
−90
−60
−50
−80
−70
HD3 (d Bc)
−30
−40
V
GAIN
(V)
0.70.50.30.1–0.1–0.3–0.5–0.7
VG Ax = 0.5V p-p
VG Ax = 1V p-p
VG Ax = 2V p-p
07736-045
INPUT LIMITED
Figure 45. HD3 vs. Amplitude to VGAx
−90
−60
−50
−80
−70
HD2 (d Bc)
−30
−40
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7
1MHz
10MHz
35MHz
07736-046
Figure 46. HD2 vs. VGAIN vs. Frequency to Differential Output
Figure 47. HD3 vs. VGAIN vs. Frequency to Differential Output
Figure 48. HD2 vs. Amplitude to Differential Output
−90
−60
−50
−80
−70
VOUT = 0. 5V p-p
VOUT = 1V p-p
VOUT = 2V p-p
HD3 (d Bc)
−30
−40
V
GAIN
(V)
0.70.50.30.1–0.1–0.3–0.5–0.7
07736-049
Figure 49. HD3 vs. Amplitude to Differential Output
0
10M
FREQUENCY (Hz)
1M 100M
IM D3 ( dBc)
LOW TONE , f – 50kHz
HIGH TONE, f + 50kHz
−20
−40
−60
−80
−100
07736-050
V
OUT
= 1V p-p
Figure 50. IMD3 vs. Frequency to VGAx
AD8264
Rev. A | Page 16 of 40
Figure 51. OIP3 vs. VGAIN vs. Frequency to VGAx
0
10M
FREQUENCY (Hz)
1M 100M
IM D3 ( dBc)
HIGH TONE, f + 50kHz
LOW TONE , f – 50kHz
−20
−40
−60
−80
−100
07736-052
VOUT = 1V p-p
Figure 52. IMD3 vs. Frequency to Differential Output
0
20
40
10
50
30
OIP3 (dBm)
0.70.50.30.1–0.1–0.3–0.5–0.7
f = 1MHz, OIP3L
f = 1MHz, OIP3H
f = 10MHz , O IP3L
f = 10MHz , O IP3H
f = 35MHz , O IP3L
f = 35MHz , O IP3H
V
GAIN
(V)
07736-053
Figure 53. OIP3 vs. Frequency to Differential Output
Figure 54. Input P1dB vs. VGAIN
–0.10
–0.05
0
0.05
0.10
–40 –20 020 40 60 80 100
VOLTAGE (V)
TIME (n s)
07736-055
VGAIN = 0.7V
Figure 55. Small Signal Pulse Response to VGAx
–40 –20 020 40 60 80 100
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
VOLT AGE (V)
TIME (n s)
07736-056
V
GAIN
= 0.7V
Figure 56. Small Signal Pulse Response to Differential Output
AD8264
Rev. A | Page 17 of 40
–40 –20 020 40 60 80 100
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
VOLTAGE (V)
TIME (n s)
1V p-p
2V p-p
07736-057
V
GAIN
= 0.7V
Figure 57. Large Signal Pulse Response to VGAx
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
VOLTAGE (V)
TIME (n s)
1V p-p
2V p-p
07736-058
–40 –20 020 40 60 80 100
V
GAIN
= 0.7V
Figure 58. Large Signal Pulse Response to Differential Output
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
020 40 60 80 100 120 140 160
VOLTAGE (V)
TIME (n s)
2V p-p (V
OL
)
2V p-p (V
OH
)
1V p-p (V
OL
)
1V p-p (V
OH
)
07736-059
Figure 59. VOCM Large Signal Pulse Response
Figure 60. OFSx Large Signal Pulse Response
TIME (n s)
–1.0
–0.5
0
0.5
1.0
VOLTAGE (V)
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
07736-061
–40 –20 020 40 60 80 100
V
GAIN
= 0.7V
Figure 61. Large Signal Pulse Response to VGAx for Various Capacitive Loads
VOLTAGE (V)
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
TIME (n s)
C
L
= 0pF
C
L
= 10pF
C
L
= 22pF
07736-062
–40 –20 020 40 60 80 100
Figure 62. Large Signal Pulse Response to Differential Output for
Various Capacitive Loads
AD8264
Rev. A | Page 18 of 40
07736-096
–40 –20 100806040200
TIME (ns)
–1.5
–1.5
–1.0
–1.0
–0.5
–0.5
0
–2.0
–2.0
VOLTAGE (V)
CL = 0pF
CL = 10pF
CL = 22pF
VGAIN = 0.7V
Figure 63. Large Signal Pulse Response to Differential Output for
Various Capacitive Loads with Series R = 10 Ω
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0400 800 1200 1600 2000
VOTL AGE (V)
TIME (n s)
V
GAIN
PULSE
GAIN
RESPONSE
07736-064
Figure 64. VGAx Response to Change in VGAIN
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0400 800 1200 1600 2000
VOTL AGE (V)
TIME (n s)
07736-065
V
GAIN
PULSE
GAIN
RESPONSE
Figure 65. Differential Output Response to Change in VGAIN
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0200 400 600 800 1000 1200
VOTL AGE (V)
TIME (n s)
07736-066
Figure 66. Preamp Overdrive Recovery
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0200 400 600 800 1000 1200
VOTL AGE (V)
TIME (n s)
07736-067
Figure 67. VGA Overdrive Recovery
100k 1M 10M 100M
PSRR ( dB)
FREQUENCY (Hz)
–10
–20
–30
–40
–50
–60
0
VG Ax ( V
GAIN
= −0.7V)
DIFF OUT (V
GAIN
= −0.7V)
VG Ax ( V
GAIN
= +0. 7V )
DIFF OUT (V
GAIN
= +0. 7V )
07736-068
Figure 68. Power Supply Rejection vs. Frequency (VPOS)
AD8264
Rev. A | Page 19 of 40
100k 1M 10M 100M
PSRR ( dB)
FREQUENCY (Hz)
–5
–15
–25
–35
–45
–55
5
VG Ax ( V
GAIN
= −0.7V)
DIFF OUT (V
GAIN
= −0.7V)
VG Ax ( V
GAIN
= +0. 7V )
DIFF OUT (V
GAIN
= +0. 7V )
07736-069
Figure 69. Power Supply Rejection vs. Frequency (VNEG)
55
65
75
85
95
105
115
125
135
–40 –15 10 35 60 85 110
SUPP LY CURRENT (mA)
TEMPERATURE (°C)
±2.5V
±5V
±3.3V
07736-070
Figure 70. Quiescent Supply Current vs. Temperature
AD8264
Rev. A | Page 20 of 40
TEST CIRCUITS
VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V,
VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
50Ω PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
OVEN
GNLO
DC
METER
500Ω
500Ω
500Ω
VGAIN
DC
METER
07736-119
Figure 71. Gain vs. VGAIN vs. Temperature (See Figure 3 and Figure 4)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE DIFFERENTIAL
PROBE
V
GAIN
CH1 CH2
50Ω 50Ω
50Ω
500Ω
OUT SIGNAL
GENERATOR
OSCILLOSCOPE
07736-100
Figure 72. Gain Error vs. VGAIN at Various Frequencies to VGAx (See Figure 5)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
V
GAIN
CH1 CH2
50Ω 50Ω
500Ω
NET WORK ANALYZ E R
07736-072
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 73. Frequency Response vs. Gain to VGAx for Various Values of VGAIN,
VGAIN = GNHx – GNLO (See Figure 10)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
V
GAIN
CH1 CH2
50Ω 50Ω
NET WORK ANALYZER
500Ω
500Ω
07736-101
Figure 74. Frequency Response vs. Gain to Differential Output for Various
Values of VGAIN (See Figure 11)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH1 CH2
50Ω 50Ω
500Ω
500Ω
NETWORK ANALYZ ER
C
L
C
L
07736-102
Figure 75. Frequency Response to Differential Output for
Various Capacitive Loads (See Figure 12)
AD8264
Rev. A | Page 21 of 40
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH1 CH2
50Ω 50Ω
500Ω
500Ω
10Ω
10Ω
NETWORK ANALYZ ER
CL
CL
07736-103
Figure 76. Frequency Response to Differential Output for Various Capacitive
Loads with Series R = 10 Ω (See Figure 13)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
V
GAIN
CH1 CH2
50Ω 50Ω
500Ω C
L
NET WORK ANALYZ E R
07736-076
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 77. Frequency Response to VGAx for Various Capacitive Loads
(See Figure 14)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
V
GAIN
CH1 CH2
50Ω 50Ω
500Ω
10Ω
C
L
NET WORK ANALYZ E R
07736-077
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 78. Frequency Response to VGAx for Various Capacitive Loads with
Series R =10 Ω (See Figure 16)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
V
GAIN
CH1 CH2
50Ω 50Ω
NET WORK ANALYZ E R
V
S
V
SUPPLY
07736-078
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 79. Frequency Response vs. Gain to VGAx for
Various Supply Voltages (See Figure 18)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
V
GAIN
CH1 CH2
50Ω 50Ω
V
S
V
SUPPLY
NET WORK ANALYZER
500Ω
500Ω
07736-104
Figure 80. Frequency Response vs. Gain to Differential Output for
Various Supply Voltages (See Figure 19)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH1 CH2
50Ω 50Ω
V
S
V
SUPPLY
NET WORK ANALYZER
500Ω
500Ω
07736-105
Figure 81. VOCM Frequency Response to Differential Output (See Figure 21)
AD8264
Rev. A | Page 22 of 40
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH1 CH2
50Ω 50Ω
V
S
V
SUPPLY
NET WORK ANALYZ E R
500Ω
500Ω
07736-106
Figure 82. OFSx Frequency Response to Differential Output (See Figure 22)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
OVEN
GNLO
DC
METER
500Ω
500Ω
500Ω
V
GAIN
07736-110
Figure 83. Output Offset Voltage vs. VGAIN vs. Temperature
(See Figure 26 and Figure 27)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
CH2
CH1
50Ω 50Ω
NET WORK ANALYZ E R
VS
V
SUPPLY
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
07736-111
Figure 84. Output Resistance vs. Frequency
(See Figure 30 and Figure 31)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
CH2
CH1
50Ω 50Ω
SPECTRUM ANAL YZE R
V
GAIN
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx AD8129
10×
AD8129
10×
07736-112
Figure 85. Output Referred Noise vs. VGAIN (See Figure 32)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
CH2
CH1
50Ω 50Ω
220Ω
SPECTRUM ANAL YZE R
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
AD8129
10×
AD8129
10×
50Ω
07736-113
Figure 86. Input Referred Noise vs. Frequency (See Figure 34)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
IPPx
NOISE
SOURCE
NOISE METER
50Ω
50Ω
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
V
GAIN
07736-115
Figure 87. Noise Figure vs. VGAIN (See Figure 36)
AD8264
Rev. A | Page 23 of 40
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
CH2
CH1
50Ω 50Ω
220Ω
SPE CTRUM ANAL Y ZER
IPPx
R
S
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx AD8129
10×
AD8129
10×
50Ω
50Ω 0.1µF
50Ω 0.1µF
1kΩ 1kΩ
0.1µF
50Ω
07736-114
Figure 88. Input Referred Noise vs. RSOURCE (See Figure 35)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH1 CH2
50Ω 50Ω
NET WORK ANALYZ E R
500Ω
500Ω
07736-116
Figure 89. VOCM Common-Mode Rejection vs. Frequency (See Figure 37)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
CH1
50Ω
50Ω
500Ω
V
S
V
SUPPLY
OUT
SIGNAL
GENERATOR
LPF
07736-117
SPE CTRUM ANAL Y ZER
Figure 90. Test Circuit Harmonic Distortion to VGAx vs.
RLOAD and Various Supplies (See Figure 38)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
CH1
C
L
50Ω
50Ω
10Ω
OUT
SIGNAL
GENERATOR
SPE CTRUM ANAL Y ZER
LPF
07736-118
Figure 91. Harmonic Distortion to VGAx vs. CLOAD (Figure 39)
R
L
R
L
07736-128
AD8130
1×
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
CH1
50Ω
50Ω
450Ω
OUT SIGNAL
GENERATOR
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPECTRUM ANAL YZE R
LPF
V
SUPPLY
V
S
Figure 92. Harmonic Distortion to Differential Output vs. RLOAD and Various
Supplies (See Figure 40)
AD8264
Rev. A | Page 24 of 40
07736-129
AD8130
1×
10Ω
C
L
C
L
10Ω
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
CH1
50Ω
50Ω
450Ω
OUT SIGNAL
GENERATOR
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPECTRUM ANAL YZE R
LPF
Figure 93. Harmonic Distortion to Differential Output vs.
CLOAD (See Figure 41)
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
V
GAIN
CH1
50Ω
50Ω
450Ω
OUT SIGNAL
GENERATOR
07736-130
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPE CTRUM ANAL Y ZER
LPF
Figure 94. HD2 and HD3 to VGAx (See Figure 42 Through Figure 45)
07736-131
AD8130
1×
PrA
6dB
+
–6dB
+
–
VOCM
AD8264
GNLO
50Ω
CH1
50Ω
50Ω
350Ω
OUT SIGNAL
GENERATOR
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPECTRUM ANAL YZE R
LPF
V
GAIN
VS
Figure 95. HD2 and HD3 to Differential Output (See Figure 46 through Figure 49)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
50Ω
50Ω
SIGNAL
GENERATOR
OUT
50Ω
SIGNAL
GENERATOR
07736-132
CH1
50Ω
450Ω
SPECTRUM ANAL YZE R
V
GAIN
Figure 96. IMD3 and OIP3 to VGAx (See Figure 50 and Figure 51)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
50Ω
50Ω
SIGNAL
GENERATOR
OUT
50Ω
SIGNAL
GENERATOR
07736-133
500Ω500Ω
AD8130
1×
CH1
50Ω
10Ω
10Ω
450Ω
SPE CTRUM ANAL Y ZER
Figure 97. IMD3 and OIP3 to Differential Output (See Figure 52 and Figure 53)
AD8264
Rev. A | Page 25 of 40
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH2
CH3
50Ω 50Ω
CH1
50Ω
NET WORK ANALYZER
07736-134
500Ω
500Ω
V
GAIN
500Ω
Figure 98. Input P1dB vs. VGAIN (See Figure 54)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE DIFFERENTIAL
PROBE
CH1 CH2
50Ω 50Ω
50Ω
500Ω
OUT PULSE
GENERATOR
OSCILLOSCOPE
07736-135
Figure 99. Pulse Response to VGAx, VGAIN = 0.7 V (See Figure 55 and Figure 57)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE DIFFERENTIAL
PROBE
CH1 CH2
50Ω 50Ω
50Ω
OUT PULSE
GENERATOR
OSCILLOSCOPE
07736-136
500Ω
500Ω
Figure 100. Pulse Response to Differential Outputs, VGAIN = 0.7 V
(See Figure 56 and Figure 58)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH1
50Ω
OSCILLOSCOPE
500Ω
500Ω
50Ω
PULSE
GENERATOR
50Ω
07736-120
Figure 101. VOCM Pulse Response (See Figure 59)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH1
50Ω
OSCILLOSCOPE
50Ω
PULSE
GENERATOR
50Ω
07736-121
Figure 102. OFSx Pulse Response (See Figure 60)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
CH1
C
L
50Ω
50Ω
OUT
PULSE
GENERATOR
500Ω
OSCILLOSCOPE
DIFFERENTIAL
PROBE
07736-122
Figure 103. Pulse Response to VGAx for Various Capacitive Loads,
VGAIN = 0.7 V (See Figure 61)
AD8264
Rev. A | Page 26 of 40
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
CH1
C
L
50Ω
50Ω
OUT
PULSE
GENERATOR
500Ω
OSCILLOSCOPE
DIFFERENTIAL
PROBE
C
L
500Ω
07736-123
Figure 104. Pulse Response to Differential Output for Various Capacitive
Loads, VGAIN = 0.7 V (See Figure 62)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
CH1
C
L
50Ω
50Ω
OUT
PULSE
GENERATOR
500Ω
10Ω
OSCILLOSCOPE
DIFFERENTIAL
PROBE
C
L
500Ω
10Ω
07736-124
Figure 105. Pulse Response to Differential Output for Various Capacitive
Loads with Series R = 10 Ω, VGAIN = 0.7 V (See Figure 63)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSx
VOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
CH2
CH1
50Ω
50Ω
OSCILLOSCOPE
500Ω
500Ω
500Ω
50Ω
50Ω
OUT SIGNAL
GENERATOR
PULSE
GENERATOR
07736-125
Figure 106. Gain Response to VGAx or Differential Output
(See Figure 64 and Figure 65)
PrA
6dB
+
–6dB
+
–
IPPx
OPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
DIFFERENTIAL
PROBE
CH1
50Ω
OSCILLOSCOPE
50Ω
50Ω
OUT SIGNAL
GENERATOR
07736-126
Figure 107. Preamp Overdrive Recovery (See Figure 66)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
DIFFERENTIAL
PROBE
CH1
50Ω
OSCILLOSCOPE
50Ω
50Ω
OUT SIGNAL
GENERATOR
07736-127
Figure 108. VGA Overdrive Recovery, VGAIN = 0.7 V (See Figure 67)
AD8264
Rev. A | Page 27 of 40
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
AD8264
GNLO
50Ω
DIFFERENTIAL
PROBE
V
GAIN
CH1 CH3
CH2
50Ω 50Ω
50Ω
V
S
V
SUPPLY
OSCILLOSCOPE
500Ω
500Ω
500Ω
07736-108
Figure 109. PSRR (See Figure 68 and Figure 69)
PrA
6dB
+
–6dB
+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VOCM
VGAx
VNEG
VPOS AD8264
GNLO
50Ω
DMM
(–1)
DMM
(+1)
07736-109
Figure 110. Quiescent Supply Current (See Figure 70)
AD8264
Rev. A | Page 28 of 40
THEORY OF OPERATION
OVERVIEW
The AD8264 is a dc-coupled quad channel VGA with a fixed
gain-of-2 (6 dB) preamplifier and a single-ended-to-differential
output amplifier with level shift capability that can be used as an
ADC driver. Figure 111 shows a representative block diagram of
a single channel; all four channels are identical. The supply can
operate from ±2.5 V to ±5 V. The primary application is as a
pulse processor for medical positron emission tomography
(PET) imaging; however, the part is useful for any dc-coupled
application that can benefit from variable gain.
The signal chain consists of three fundamental stages: the
preamplifier, the variable gain amplifier, and the differential
output buffer amplifier. The preamplifier has an internally fixed
gain-of-2 (6 dB). The VGA comprises an attenuator that
provides 0 dB to 24 dB of attenuation, followed by a fixed gain
18 dB (8×) amplifier. The single-ended VGA output is connected
directly to the noninverting input of the differential output
(post) amplifier, which has a differential fixed gain-of-2 (6 dB).
The gain range from the preamp input to the VGA output is
0 dB to 24 dB. The aggregate gain range from preamp input to
the differential postamplifier output is 6 dB to 30 dB.
The ideal gain equation for the gain from the single-ended
input to the output is
VGAIN = VGNHx − VGNLO (1)
ICPTVGain
GAIN
+×=
V
dB
20
(2)
The ideal value for ICPT, or the intercept, is defined at VGAIN = 0 V.
The ICPT for the VGA output and differential amplifier outputs
equals 12.1 dB and 18.1 dB, respectively. The actual intercept
varies with any additional gain or loss along the signal path.
The measured values are both approximately 0.2 dB low.
PREAMP
The preamplifier is a current feedback amplifier, designed to
drive the internal 100 Ω gain setting resistors and the resistive
attenuator, which together result in a nominal load to the
preamplifier of about 113 Ω. Normally, the negative preamp
input, IPNx, is not connected externally. The positive input
IPPx is the high impedance input of the current feedback amp.
Note that, at the largest supply voltage of ±5 V, the input signal
can become so large that the preamplifier output cannot deliver
the required current to drive the 113 Ω load and, therefore, limits
at 6 V p-p. This means that the input limits at 3 V p-p.
The short-circuit input referred noise at maximum VGA gain is
about 2.3 nV/√Hz, and this accounts for all of the amplifiers and
gain setting resistors. When measuring the input referred noise
from the VGA output, the number is slightly lower at 2.1 nV/√Hz
because the noise of the postamplifier is not included in the
noise calculation.
VGA
The VGA has a voltage feedback architecture and uses analog
control to vary the gain. Its low gain range helps to maintain
low offset and is intended for gain trim applications. The offset
of the preamp and the VGA are trimmed; therefore, the maximum
input referred offset is <0.5 mV over temperature (see Figure 26).
Keeping the gain of each stage relatively low also allows the
bandwidth to stay high.
The gain of the VGA is adjusted using the fully differential
control inputs, GNHx and GNLO. The GNLO pin is internally
connected to all four channels and must be biased externally.
Under typical conditions, the GNLO pin is grounded. The gain
high control pins (GNHx) are independent for each channel.
The gain slope is nominally 2 0 d B / V. With GNLO connected to
ground, each GNHx input can have a voltage applied from VNEG
to VPOS without gain foldover.
To make use of the full gain range of the VGA, the nominal gain
control voltage needed at GNHx is ±0.65 V relative to the voltage
applied to GNLO. At the lowest supply voltage of ±2.5 V, the pin
GNLO should always be grounded. With increasing supply, the
common-mode range of the gain control interface increases.
This means that GNLO can be anywhere within ±1.2 V at
±3.3 V supplies and ±2.8 V at ±5 V supplies.
Table 5. Gain Control Input Range
Supply Voltage (V) GNLO Voltage Range (V) VGAIN Range (V)
±5 ±2.8 ±0.65
±3.3 ±1.2 ±0.65
±2.5 0 ±0.65
For example, at ±3.3 V supplies, the outputs of a single-supply
unipolar DAC, such as the 10-bit, 4-channel AD5314, can be
used to drive the GNHx pins directly, in conjunction with using
the ADR318 1.8 V reference to bias the GNLO pin at VREF/2 = 0.9.
Because the GNLO pin sources only about 1.2 µA for the four
channels (~300 nA per channel, the same as for the GNHx pins), a
simple resistive divider is generally adequate to set the voltage at
the GNLO input.
AD8264
Rev. A | Page 29 of 40
IPPx
VPOS
IPNx
VOLx
VOHx
INTERPOLATOR
PREAMP
6dB ( 2×)
OFSx
OPPx
GAIN
INTERFACE
100Ω747Ω
107Ω
100Ω
+
–
VOCMCOMM GNHx GNLO
BIAS
VNEG
NONINVERTING
AMPLIFIER INPUT
INVERTING AMPLIFIER
INP UT (NO T USE D)
POWER
SUPPLIES
VGAx SINGL E - E NDE D HS
VG A OUTP UT
DIFFERENTIAL
VG A OUTP UT
OFFSET
ADJUST
OUTPUT COMMON-MODE
VO LTAGE ADJUS TMENT
DIFFERENTIAL GAIN
CONTROL INPUTS
1.2V p-p M AX @ ±2.5V
2V p - p MAX @ ±3.5V TO ± 3.3V
3V p-p MAX@ ±5V (PREAMP
DRIVE LIMITED)
2.3nV/√Hz
DIFFERENTIAL OUTPUT NEVER LIMITS
BECAUSE VGA LIMITS FIRST.
DIFFERENTIAL OUTPUT SWING = 2x VGA OUT
5.2V p-p M AX @ ±2.5V
8V p - p MAX @ ±3.5V TO ± 3.3V
15V p - p MAX @ ±5V
73nV/√Hz
PREAMP OUTPUT
(NO T USED)
2.6V p-p M AX @ ±2.5V
4V p - p MAX @ ±3.5V TO ± 3.3V
7.5V p-p M AX @ ±5V
34nV/√Hz
COMPOSITE GAIN IS +6dB TO +30dB
ATTENUATOR
–24dB TO 0dB
FIXED GAIN VGA
AMPLIFIER
18dB ( 8×)
DIFFERENTIAL OUTPUT
AMPLIFI E R 6dB (2×)
1kΩ2kΩ
1kΩ
2kΩ
1
1
2
2 3
3
07736-081
Figure 111. Single-Channel Block Diagram
POST AMPLIFIER
From the preamp input to the VGA output (VGAx), the gain
is noninverting. As can be seen in Figure 111, the VGAx pins
drive the positive input of the differential amplifier. The gain
is inverting from the input of the preamp to the output pin at
VOLx, and the gain is noninverting to the output VOHx.
Other than the input from VGAx, each differential amplifier
has two additional inputs: VOCM and OFSx. A common
VOCM pin is shared among all four postamplifiers, while
separate OFSx pins are provided for each channel.
VOCM Pin
The VOCM pin sets the common-mode voltage of the differential
output and must be biased by an external voltage. When driving
a dc-coupled ADC, the voltage typically comes from the ADC
reference, as shown in the Applications Information section.
If dc level shift is not necessary, the VOCM pin is connected
to ground.
OFSx Pins
The OFSx pins are the inverting inputs of the differential post
amplifiers and can be used to prebias a differential dc offset at
the output. This is very useful when the input is a unipolar pulse
because the user can set up the gain and the offset in such a way
as to optimally map a unipolar pulse into the full-scale input of
an ADC, while dc coupling throughout.
If dc offset is not desired, then the OFSx pins should be connected
to ground. However, the OFSx pins can also be used as separate
inputs if the user wants this function.
NOISE
At maximum gain, the preamplifier is the primary contributor
of noise and results in a differential output referred noise of
roughly 73 nV/√Hz. The noise at the VGAx outputs is 34 nV/√Hz,
and because of the gain-of-2, the VGA output noise is amplified
by 6 dB to 68 nV/√Hz. The differential amplifier, including the
gain setting resistors, contributes another 26 nV/√Hz, and the
rms sum results in a total noise of 73 nV/√Hz. At the lowest
gain, the noise at the VGA output is approximately 19 nV/√Hz, and
when multiplied by two, it results in 38 nV/√Hz at the differential
output; again, rms summing this with the 26 nV/√Hz of the
differential amplifier causes the total output referred noise to
be approximately 46 nV/√Hz.
The input referred noise to the preamplifier at maximum gain
is 2.3 nV/√Hz and increases with decreasing gain. Note that all
noise numbers include the necessary gain setting resistors.
AD8264
Rev. A | Page 30 of 40
APPLICATIONS INFORMATION
A LOW CHANNEL COUNT APPLICATION CONCEPT
USING A DISCRETE REFERENCE
The AD8264 is particularly well suited for use in the analog
front end of medical PET imaging systems. Figure 112 shows
how the AD8264 may be used with the AD5314 (a 4-channel,
10-bit DAC) and the AD9222/AD9228 (an octal or quad, 12-bit
ADC, respectively). The DAC sets the gain of the AD8264. Note
that the full gain span of 24 dB is achieved with this setup because
the gain control input range of the AD8264 is very close to 1.25 V.
The GNLO pin must offset by 1.25/2 = 625 mV because the
gain control input is bipolar around the voltage applied at GNLO.
This is done with two 1 kΩ, 1% resistors. The approximately 1 µA
of bias current flowing from the GNLO pin does not contribute
a significant error because the basic gain error of the AD8264 is
the limiting factor.
The ADR127 1.25 V precision reference with an input of 3.3 V
can supply −2 mA to +5 mA from −40°C to +125°C, which is
sufficient to drive both the resistive divider and the REFIN pin
of the AD5314. The AD5314 is based on the string DAC concept,
which means that the REFIN pin looks like a resistor that is
nominally 45 kΩ; this results in a current draw of 1.25V/45 kΩ =
28 µA. Even at the lowest specified resistance of 37 kΩ, this is
still only a current of 34 µA. Therefore, the total current draw from
the ADR127 is the 625 µA of the resistive divider plus ~30 µA,
which equals ~655 µA, well below the 5 mA maximum current.
Figure 112 also includes the DAC output equation, which
indicates that the output can vary between 0 V and VREF = 1.25 V.
The output of the AD8264 is ideal to drive an ADC like the 1.8 V
quad-channel AD9228. If eight channels are needed, two AD8264s
with the octal AD9222 ADC achieve the same thing. The same
resistive divider can be used for two AD8264s because the bias
current flowing is now ~2 µA, but this still only introduces an
error of 1 mV with ideally matched resistors. With 20 dB/V gain
scaling, this is a gain error of only 0.02 dB, which is much
smaller than the fundamental gain error of the AD8264
(typically ~0.2 dB).
The single-ended-to-differential amplifier of the AD8264
amplifies the VGA output signal by 6 dB and can provide the
required dc bias of the AD9222/AD9228, as shown in Figure 112.
The ADC is connected with the default internal reference because
the SENSE pin is grounded. With this connection, the AD9222/
AD9228 VREF pin is an output that provides 1 V; this is then
connected to the VOCM input of the AD8264, which sets the
output common-mode voltage of the VOHx and VOLx pins to
1 V. This voltage is very close to the recommended optimal value of
VDD/2 = 0.9 V. With this configuration, the ADC inputs are set
to a full-scale (FS) of 2 V p-p.
Note that the ADC VREF should not drive many loads; therefore,
for multiple AD8264s, the VREF should be buffered.
+3.3V
–3.3V
0.1µF
NC 6
NC 5
V
OUT
4
1
2
3
NC
GND
V
IN
ADR127
REFIN V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
DAC
AD5314
GND
V
REFIN
× D
V
OUT
2
N
=
10µF
10µF
1kΩ
1%
1kΩ
1%
1.25V
625mV
GNH1
GNH2
GNH3
GNH4
AD8264
GNLO
V
OUT
RANGE = 0V TO 1.25V
EACH
VOCM VOHx VOLx
V
DD
R
FILT
R
FILT
C
FILT
ADC
AD9222/
AD9228
VREF
VDD
+1.8V
SENSE
GND
V
IN
– x
V
IN
+ x
SENS E GROUNDE D: V RE F = 1V
VNEG
VPOS
IPPx
R
S
R
TERM
OFSx
~250nA E ACH
VGAx VGA OUTPUTS TO OTHER
SI GNAL P ROCES S ING
OUTPUT COMMON-MODE VOLTAGE = 1V
VOHx = 1V, VOLx = 1V; VOFS = 0V
FS = 2V p-p
625µA
1µF
0.1µF
0.1µF
~1µA
+3.3V
+3.3V
07736-082
Figure 112. Application Concept of the AD8264 with the AD5314 10-Bit DAC and the AD9222/AD9228 12-Bit ADC
AD8264
Rev. A | Page 31 of 40
A DC CONNECTED CONCEPT EXAMPLE
The dc connected concept example in Figure 113 is an application
with the 40-channel AD5381, 3 V, 12-bit DAC. The main difference
between this example and Figure 112 is that, for the same ADR127
1.25 V reference, the full-scale output of the DAC is from
0 V to 2 × VREFIN = 2.5 V. Two options for gain control
include the following:
• Use the same circuit as in Figure 112 but use only half the
DAC output voltage from 0 V to 1.25 V. This is the simplest
solution, requiring the fewest extra components. Note that
the overall gain resolution increases by one bit to 11 bits
over the 10-bit AD5314.
• Ground GNLO and scale the DAC output so that the
GNHx inputs vary from −0.652 V to +0.625 V. Figure 113
shows a possible circuit implementation using a divider
between the DAC output and a −1.25 V reference.
GNLO cannot simply be increased to 1.25 V because, for a
given supply voltage, GNLO has a limited voltage range to
achieve the full gain span (see Table 5).
However, a third possibility is to use another voltage that is
between 1.2 V and 625 mV on GNLO, such as 1 V. I n this case,
the DAC must vary from 0.375 V to 1.625 V to achieve the fully
specified gain range.
Note the gain limits when the differential gain control exceeds
±0.625 V, either to 6 dB or to 30 dB. If the differential gain
control input voltage is exceeded, no gain foldover occurs.
Figure 113 shows how the AD8264 is connected in a PET
application. The PMT generates a negative-going current pulse
that results in a voltage pulse at the preamplifier input and a
differential output pulse on VOLx and VOHx.
To fully appreciate the advantages of the AD8264, note the
common-mode and polarity conversion afforded. The AD9228,
as with most modern ADCs, is a low voltage, single-polarity
device. Recall that the PMT is a high voltage device that yields a
negative pulse. To map the pulse to the input range of the ADC,
the pulse must be inverted, shifted, and amplified to the full
input range of the ADC. This is done by using the gain control,
signal offset, and common-mode features of the AD8264.
The full-scale input of the converter is 0 V to 2 V, with a common-
mode of 1 V. Match the VOCM voltage of the AD8264 to the
ADC common mode (VREF = 1 V), and the two devices can be
connected directly using an appropriate level of the antialiasing
filter. The PMT signal is 0 V to −0.1 V. With a gain of 20× (26 dB),
the AD8264 output signal range is 2 V p-p. Prebias the signal
negative by −0.5 V using the AD8264 OFSx inputs, which sets
VOHx = 1.5 V and VOLx = 0.5 V for VOCM = 1 V. The output
is perfectly matched to the input of the ADC.
Note that, by connecting VOLx to the positive ADC input and
VOHx to the negative ADC input, the negative input pulse is
inverted automatically. The VGAx output is still a negative
pulse, amplified by 20 dB for this example.
+3.3V
–3.3V
0.1µF
NC 6
NC 5
VOUT 4
1
2
3
NC
GND
VIN
ADR127
REFIN
DAC
AD5381
GND
2 × V
REFIN
× D
V
OUT
= 2
N
10µF
VREF = 1.25V
GNH1
GNH2
GNH3
GNH4
AD8264
GNLO
V
OUT
RANGE = 0V TO 1.25V
EACH
VOCM VOHx VOLx
V
DD
R
FILT
R
FILT
C
FILT
ADC
AD9222/
AD9228
VREF
VDD
+1.8V
SENSE
GND
V
IN
+ x
V
IN
– x
SENSE G ROUNDED: V REF = 1V
VNEG
VPOS
IPPx
100Ω
OFSx
~2 50 n A EACH
VGAx V GA O UT PUTS T O O T HER
SIGNAL P ROCESSING
OUT PUT COMM ON- MO DE VOLT AGE = 1 V
VOHx = 1. 5V, VO Lx = 0. 5V; VOFx = –0. 5V
FS = 2V p - p
1µF
0.1µF10µF
+3.3V
+3.3V
PMT
0V
–0.1V
EXAMPLE
VOFS = –0. 5V
SCALE
CIRCUIT
VOUT0
VOUT1
VOUT2
VOUT4
VOUT39
TO 9 O THER
AD8264s
SCALE CI RCUIT
SCALE CI RCUIT
SCALE CI RCUIT
SCALE CI RCUIT
+3.3V
–3.3V
VOL TAGE F ROM DAC AD53 8 1 = 0 TO 2 .5V
VARIE S FROM
12.5 TO 32. 5µ A
~250nA
VREF = 1.25V
AD8663
49.9kΩ
1%
V
OUT
0 V
OUT
39
GNH1
SCALE CI RCUIT
–1.25V
GNH4
–625mV
TO
+625mV 49.9kΩ
1%
49.9kΩ
1%
0.1µF
0.1µF
49.9kΩ
1%
49.9kΩ
1% 0.1µF
10µF
49.9kΩ
1%
07736-083
Figure 113. Concept Application of AD8264 with 40-Channel AD5381 12-Bit, 3 V DAC and AD9222/AD9228 12-Bit ADC
AD8264
Rev. A | Page 32 of 40
INx
AGNDx
AVDDxDVDD
DGND
GNH1
GNH2
GNH3
GNH4
VNEG
VOCM
VOHx
VOLx
GNLO
VPOS
IPPx
OFSx VGAx
ADC
AD9228
EVAL KIT
VPOS
VREF
PULSE
GENERATOR
VOLTAGE (V)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0 050 100 150
SAMPLES
200 250 300
PARALLEL
INTERFACE
TO PC
CONTROL
REFIN
(O N BOARD)
INPUT EXAM PLES
USB 2. 0 TO PC
ADI VISUAL
ANALOG
ANALYSIS
SOFTWARE
–INx
+INx
TO
SWITCHING
POWER
SUPPLY
+3.3V +3.3V +3.3V –3.3V
+2.5V
VOUT0
VOUT1
VOUT3
VOUT4
VOUT39
V
OUT
RANGE = 0V TO 1.25V
EACH
AD8264
VGA
EVAL BOARD
DAC
AD5381
EVAL BOARD
TO 9
OTHER
AD8264s
GNLO = 625mV VO CM = 1.0VOFSx = −0.5V
+1.0V
VGA
OUTPUTSTO
OTHER
SIGNAL
PROCESSING
0V
–0.1V
07736-084
Figure 114. Evaluation Setup for DC-Coupled Analog Front-End Pulse Processing Application Using the AD8264
07736-085
Figure 115. AD5381 Evaluation Software
A convenient method of verifying and customizing the signal
chains shown in Figure 112 or Figure 113 is by ordering the
corresponding evaluation boards available on www.analog.com.
The AD8264-EVALZ is a platform through which the user can
quickly become familiar with the features and performance
capabilities of the AD8264. See the Evaluation Board section for
more information.
The E VA L -AD5381EB (40-channel DAC) includes a parallel PC
interface and software evaluation program to control the DAC.
The AD5381evaluation software allows the user to configure
and program such DAC parameters as input codes, offset level,
and output range based on a 2.5 V or 1.25 V reference. For
example, as shown in Figure 114, the reference can be set to 1.25 V,
with a 0 V to 1.25 V output range to drive the GNHx inputs.
The ADC evaluation kit includes the AD9228-65EBZ board and
HSC-ADC-FIFO5 board to decode the ADC output. It also
leverages the capabilities of VisualAnalog®, powerful simulation
and data analysis software that enables the user to run FFTs and
to do real-time capture of the output levels.
AD8264
Rev. A | Page 33 of 40
INx
AGNDx
AVDDx
DVDD
DGND
GNH1
GNH2
GNH3
GNH4
VNEG
VOCM
VOHx
VOLx
GNLO
VPOS
IPPx
OFSx VGAx
ADC
AD9228
EVAL KIT
VPOS
VREF
AC
SOURCE
–15
0
–30
–45
–60
–75
–90
–105
–120
–135
–150 1.5M 3.0M 4.5M 6.0M 7.5M 9.0M 10.5M
PARALLEL
INTERFACE
TO PC
CONTROL
REFIN
(O N BOARD)
INPUT EXAM PLES
USB 2. 0 TO PC
ADI VISUAL
ANALOG
ANALYSIS
SOFTWARE
–INx
+INx
TO
SWITCHING
POWER
SUPPLY
+3.3V +3.3V +3.3V –3.3V
+2.5V
V
OUT0
V
OUT1
V
OUT3
V
OUT4
V
OUT39
V
OUT
RANGE = 0V TO 1.25V
EACH
AD8264
VGA
EVAL BOARD
DAC
AD5381
EVAL BOARD
TO 9
OTHER
AD8264S
GNLO = 625mV VOCM = 1.0V
+1.0V
VGA
OUTPUTSTO
OTHER
SIGNAL
PROCESSING
4
2
+3
07736-086
Figure 116. Evaluation Setup for AC Signal Processing Application Using the AD8264
AD8264
Rev. A | Page 34 of 40
EVALUATION BOARD
Analog Devices, Inc. provides evaluation boards to customers as
a support service so that the circuit designer can become
familiar with the device in the most efficient way possible. The
AD8264 evaluation board provides a fast, easy, and convenient
means to assess the performance of the AD8264 before going
through the hassle and expense of design and layout of a custom
board. The board is shipped fully assembled and tested, and it
provides basic functionality as shipped. Standard connectors
enable the user to attach standard lab test equipment without
having to wait for the rest of the design to be completed. Figure 117
shows a digital image of the top view, and Figure 118 shows the
schematic diagram of the AD8264 evaluation board.
The printed circuit board (PCB) artwork for all conductor and silk-
screen layers is shown in Figure 119 to Figure 124. A description of
a typical test setup can be found in the Applications Information
section. The PCB artwork can be used as a guide for circuit
layout and placement of parts. This is particularly useful for
multiple function circuits with many pins, requiring multiple
passive components.
CONNECTING AND USING THE AD8264-EVALZ
The AD8264 operates with bipolar power supplies from ±2.5 V dc
to ±5 V dc. Make sure the current capacity is ≥400 mA. Connect a
ground reference from the supplies to any of the black test loops,
the positive supply to the red test loop (+V), and the negative
supply to the blue test loop (−V).
Notice that the board is shipped with jumpers installed on
the 2-pin headers marked GN1_2, GN3_4, OFS_12, OFS_34,
GNLO, and VOCM. If these jumpers are missing, the offset and
common-mode functions float high, substantially increasing
the quiescent current of the board.
Apply input signals to any of the preamps at the SMA connectors,
IN1 through IN4. These connectors are terminated with 50 Ω to
accommodate typical signal generator analyzer voltage source
impedances. The gain of the AD8264 preamps is fixed at 6 dB (2×)
and can be monitored at the SMA connectors, OP1_2 and OP3_4,
if desired. Note that there are output selector switches for each pair
of preamps and 453 Ω resistors in series with the preamp outputs.
07736-087
Figure 117. Digital Image of the AD8264-EVALZ (Top View)
AD8264
Rev. A | Page 35 of 40
+V
+V
IPN1
OPP1
OPP2
IPN2
IPP2
IPP3
IPN3
OPP3
IPP4
COMM
GNH4
GNH3
VOCM
VPOS
VNEG
OFS4
IPP1
COMM
GNH1
GNH2
GNLO
VPOS
VNEG
OFS1
VOL1
VOH1
VOH2
VOL2
VGA2
VGA3
VOL3
VOH3
OPP4 VOH4
IPN4 VOL4
OFS3
VGA4
OFS2
VGA1
–V
–V
OFS12
OFS34
GNLO
VOCM
GN1_2
PIN 0
EXPOSED PADDLE
IN3
OP1_2
12
C23
0.1µF
15 20191817161413
R17
DNI
R16
DNI
R28
DNI
L3
FB L4
FB
IN4
11
L1
FB
VPOS
21
30
29
28
27
26
25
24
23
22
VGA2
VGA3
VGA4
VGA1
39 36 31323334353738
40
R11
49.9Ω
R10
DNI
++
R9
DNI
OP3_4
10
1
2
3
4
5
6
7
8
9
R19
DNI
R29
DNI
IN2
R73
0Ω R23
DNI
R31
DNI
OPP12
OPP34
VO_CM
VOUT_3
VOUT_4
VOUT_2
VOUT_1
OFS_12
GN1_2
GND2 GND3 GND4 GND5 GND6GND1
+V –V
IN_4
IN_3
IN_2
OP34
OP12
GN3_4
GN34
VGA_4
VGA3
VGA2
VGA_1
C19
0.1µF
C20
0.1µF
C34
10µF C33
10µF
L2
FB
OPP_3
OPP_4
OPP_2
OPP_1
C24
0.1µF
OFS_34
R32
DNI
R49
0Ω R86
0Ω
R47
0Ω R48
0Ω
R51
0Ω
IN_1
R1
453Ω
IN1
R7
453Ω
R22
DNI
R45
49.9Ω
R46
49.9Ω
R6
453Ω
R25
DNI
R20
DNI
R78
0Ω
R72
0Ω
R17
49.9Ω
C22
0.1µF C21
0.1µF
R80
0Ω R79
0Ω R70
0Ω R71
0Ω R8
453Ω
R64
0Ω
R63
0Ω
R65
0Ω
R66
0Ω
R67
453Ω
R69
453Ω
R57
0Ω
R58
0Ω
R56
0Ω
R55
0Ω
07736-088
PIN 0: EXPOSED PADDLE
R24
DNI
Figure 118. AD8264-EVALZ Schematic
The SMA connectors, VGA1 through VGA4, enable signal
monitoring at these nodes, with 453 Ω resistors for protecting
the device. These resistors can be shorted at the discretion of
the user if wide bandwidth is desired. The differential outputs
are provided with 0.1” spacing 2-pin headers, which fit the low
capacitance Tektronix differential scope probe P6045 model.
Note that the gain control input of the AD8264 is differential.
Each channel has its own gain control pin (GNHx); however,
pairs of pins are connected together on the evaluation board
and connected to a test loop. The 2-pin headers are provided for
jumpers to connect the gain pins to ground, preventing the
quiescent gain control voltage at the GNHx pins from floating
high. The low sides of the gain controls for each channel are
internally connected in the AD8264, and a 2-pin header with
jumper is provided to connect this pin (GNLO) to ground as well.
A similar arrangement of 2-pin headers is provided for the output
offset voltage. As shipped, the offset pins are connected to ground,
preventing the pins from floating high.
For connecting to an ADC, remove the jumpers at the OF1_2
and OF3_4 headers and connect the appropriate offset voltage
at the test loops, OF12 and OF34. If the VOCM pin is buffered,
it can be connected to the reference of the ADC.
AD8264
Rev. A | Page 36 of 40
07736-089
Figure 119. Component Side Assembly
07736-090
Figure 120. Component Side Copper
07736-091
Figure 121. Component Side Silk Screen
07736-092
Figure 122. Secondary Side Copper
07736-093
Figure 123. Ground Plane
07736-094
Figure 124. Power Plane
AD8264
Rev. A | Page 37 of 40
OUTLINE DIMENSIONS
1
40
10
11
31
30
21
20
4.25
4.10 S Q
3.95
TOP
VIEW
6.00
BSC SQ
PI N 1
INDICATOR 5.75
BSC SQ
12° M AX
0.30
0.23
0.18 0.20 REF
SEATING
PLANE
1.00
0.85
0.80
0.05 M AX
0.02 NOM
COPLANARITY
0.08
0.80 M AX
0.65 TYP
4.50
REF
0.50
0.40
0.30
0.50
BSC
PI N 1
INDICATOR
0.60 M AX
0.60 M AX
0.25 M IN
EXPOSED
PAD
(BOT TOM VIEW)
COMPLIANT TO JEDE C S TANDARDS MO-220- V JJD- 2
072108-A
FOR PRO P E R CONNECT IO N OF
THE EXPOSED PAD, REFER TO
THE P IN CONFIGURAT ION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
Figure 125. 40-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
6 mm × 6 mm Body, Very Thin Quad
(CP-40-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
AD8264ACPZ −40°C to +85°C 40-Lead LFCSP_VQ CP-40-1 H1V
AD8264ACPZ-R7 −40°C to +85°C 40-Lead LFCSP_VQ, 7” Tape and Reel CP-40-1 H1V
AD8264ACPZ-RL −40°C to +85°C 40-Lead LFCSP_VQ, 13” Tape and Reel CP-40-1 H1V
AD8264-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
AD8264
Rev. A | Page 38 of 40
NOTES
AD8264
Rev. A | Page 39 of 40
NOTES
AD8264
Rev. A | Page 40 of 40
NOTES
©2009–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07736-0-1/11(A)
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Analog Devices Inc.:
AD8264ACPZ AD8264-EVALZ AD8264ACPZ-R7 AD8264ACPZ-RL