TPIC43T02DAR - Texas Instruments - Datasheet.Directory

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TPIC43T01 Application Brief

TPIC43T01 and TPIC1310

Chipset Considerations

The TPIC43T01 is an integrated

motor controller designed to

provide precision RPM (revolution-

per-minute) control to a 3-phase

brushless dc motor. The

TPIC43T01 outputs are pre-

drivers for six external power

NMOS FETs or an integrated

power array such as the

TPIC1310. The TPIC1310 Power+

Application Brief

Array can be used with motors of

15 W or less provided the system

thermal impedance is minimized.

Figure 1 illustrates a typical

application using the TPIC43T01

and TPIC1310. Note the 0.1 µF

capacitor connected from

TPIC1310 VDD pins to ground.

This capacitor is needed to filter

fast current spikes which can occur

in the half-H drive stages of the

TPIC1310 power array. These

narrow current spikes are the

Figure 1. Connections for TPIC43T01 and TPIC1310 Chipset

result of trr in the low-side LDMOS

drain-body diode during rising

voltage transitions at OUTx pin.

Since TPIC43T01 implements

PWM (pulsed-width-modulation)

switching in the high-side, the

current spike will occur every PWM

cycle. Use of the 0.1 µF filter

capacitor prevents trr current from

falsely being detected as motor

winding current by the RSENSE

resistor.

Pre-FET

Drivers

(34) PHA

(33) UGA

(32) LGA

(31) UGB

(30) PHB

(29) LGB

(27) UGC

(26) PHC

(28) LGC

3-Phase

OUTA (2)

UGA (3)

LGA (4)

UGB (5)

OUTB (8)

LGB (11)

UGC (13)

OUTC (14)

LGC (12)

VDD (15)

SOURCE

(9)

VDD (1)

(20) VCC

(25) SENSE

VCP

(22)

CP2

(24)

CP1

(23)

TPIC1310

Power+

Array

BLM

MSUB/GND

(10)

0.01 µF 0.1 µF

47 µF

0.1 µF

TPIC43T01

RSENSE

Power+ Array is a trademark of Texas Instruments

The discrete power NMOS drive

stage also requires 0.1 µF, or high-

er, capacitance connected from

the drains of high-side NMOS tran-

sistors to ground. This capacitance

is needed to filter fast current

spikes which can occur in the

half-H drive stage.

TPIC43T01 Discrete NMOS

Considerations

For motors greater than approxi-

mately 15 W, the TPIC43T01 de-

vice can be connected to control

six power NMOS FETs configured

as a three-half-H bridge. Figure 2

illustrates a typical application us-

ing the TPIC43T01 and discrete

power FETs.

RSENSE Component Selection

An external sense resistor,

RSENSE, in the current limit detec-

tion circuitry of the TPIC43T01,

translates the current level to volt-

age VSENSE, and that voltage is

then compared to internal voltage

thresholds. Once VSENSE reaches

VIT(lim) threshold of 0.5 V , the inter-

nally controlled on-time of the PWM

cycle is shortened, or duty-cycle

reduced, implementing a cycle-by-

cycle peak current control loop.

Selection of RSENSE value is:

It is advisable to select a resistor

type for RSENSE with minimal

inductance. This will minimize

possible noise problems from

inductive ringing which could occur

by switching motor current on and

off through this resistor at the PWM

rate.

Power rating is also a concern for

RSENSE which can be calculated

by:

Figure 2. Connections for TPIC43T01 and Discrete Power NMOS FETs

RSENSE

0.5 V

Ipeak

Power

(0.5 V)2

RSENSE

FG Considerations

Frequency Generator Description

The TPIC43T01 controller is de-

signed to work with a variable re-

luctance speed pickup commonly

Pre-FET

Drivers

(34) PHA

(33) UGA

(32) LGA

(31) UGB

(30) PHB

(29) LGB

(27) UGC

(26) PHC

(28) LGC

(20) VCC

(25) SENSE

VCP

(22)

CP2

(24)

CP1

(23)

0.01 µF 0.1 µF47 µF

0.1 µF

TPIC43T01

VCC

3-Phase

BLM

RSENSE

set at 1/4 to 1/5 of the output PWM

frequency. Refer to Figure 4.

Figure 3. FG Signal Conditioning Functional Block Diagram

referred to as FG, or frequency

generator. The ac signal from this

FG circuit provides motor RPM

feedback to close the phase-lock-

loop (PLL). Physically , the FG sys-

tem consists of two parts:

1. A winding which is typically a

serpentine trace on the motor

module printed circuit board

(PCB)

2. A multiple-pole ring magnet

attached to the rotor which

rotates in close proximity to the

serpentine winding on the PCB

The ring magnet pole-pairs cutting

the serpentine PCB traces induce

a variable reluctance ac signal in

the FG winding with some integer

number of cycles per rotor revolu-

tion. This integer count is called the

FG count, which is determined by

the number of serpentines in the

PCB trace, and plays a role in de-

termining the actual RPM based

Winding

FGS Buffer

FGOut

FGIn–

FGSOut

FGIn+

FG Amp

–

on the internal reference frequen-

cy to the PLL.

When used with the TPIC43T01

controller, the FG winding is elec-

trically biased to a common-mode

dc level and the ac output signal is

connected differentially to an am-

plifier to gain up the signal level.

This amplified signal is then fed to

a comparator circuit with zero-

crossing detection and one-sided

hysteresis (see Figure 3). Selec-

tion of the external gain setting

resistors and a filter capacitor are

important to achieving low RPM

ripple.

An external filter must be included

in the FG feedback circuit to atten-

uate noise picked up by the speed

sense traces. The filter compo-

nents should be selected such that

FGOut frequency (fSPEED) is cen-

tered in the pass band of the filter.

The zero crossing point should be

FG Winding Design

Choosing the number of FG wind-

ings is required in setting the

motor’s RPM. The TPIC43T01

support software provides a func-

tion which allows the user to enter

three parameters and the desired

motor RPM is calculated. Those

three parameters are:

1. Crystal oscillator frequency,

fCRYSTAL

2. Selected internal divide-down

to set PLL reference frequency

3. An FG winding count or

number of FG cycles per

motor revolution, FG#

The formula for RPM calculation is:

MotorRPM

ƒCRYSTAL ×60

PLLdivider ×FG#(RPM)

+ 180mV

Band-Gap

1/2 VDD

Op-Amp +

–

Comp

–

Comp

–

Buffer

FG COMPARATOR

Hall-Effect Input

Considerations

The TPIC43T01 controller will ac-

commodate differential signals

from naked Hall-effect position

sensors. These sensors are elec-

trically equivalent to a resistor

Alternative Tachometer

Input

If the motor system has a tachome-

ter capable of 5 V digital levels, the

FG amplifier can be configured

such that the output is a current

source that can be overdriven by

Figure 5. FG Winding Layout Example

Figure 6. Tachometer Control of FG Interface

GAIN

FREQUENCY

fZERO fSPEED fPOLE ~1/5*fPWM fPWM

Gain =

R1/R2

Figure 4. FG Signal Conditioning Input Filter Response

+ 180mV

Band-Gap

1/2 VDD

FGS Buffer

FGOut

FGIn–

FGSOut

FGIn+

FG Amp

Op-Amp +

–

Comp

–

Comp

–

–Buffer

Tachometer

200 µA

Figure 5 illustrates layout of a

typical FG winding showing the

serpentine traces.

the tachometer output. Figure 6

shows the schematic hookup for

this configuration.

FG COMPARATOR

bridge with a differential output

voltage source having a magni-

tude proportional to the level of

magnetic flux or gauss.

To ensure proper operation, the

Hall-effect sensors must be biased

such that their common-mode out-

put voltage, shown in Figure 7 as

Vcm, is within the TPIC43T01 input

operating range for the Hall signal

conditioning circuit. As shown in

Figure 7. Naked Hall-Effect Sensor Interface

The Hall sensor-to-output control

commutation sequence is pres-

ented in Table 1. The direction of

motor rotation is determined by the

F/R input. A low level input to this

pin will sequence the motor in a

clockwise direction, and a high

level in a counter-clockwise direc-

tion. Refer to Figures 8 and 9 for

illustrations of the Hall-effect input

signals and their associated com-

mutation steps. Oscilloscope trace

1 is IN1+, trace 2 is IN2+, and trace

3 is IN3+.

In higher power motor applica-

tions, noise generated from PWM

switching motor phase currents

can couple into the output imped-

ance of the naked Hall sensors.

Therefore, precautions should be

the schematic, the bias nodes of

the Hall sensors can be connected

in parallel with the Rbias resistor.

The value of the series resistor,

Rbias, can be chosen based on the

parallel resistance of the three Hall

sensors.

TPIC43T01

GND

OUT+OUT–

GND

OUT+OUT–

GND

OUT+OUT–

IN1+

(37)

IN1–

(38)

IN2–

(2)

IN2+

(1)

IN3–

(4)

IN3+

(3)

Ccm

Vcm

Hall Decode

Logic

Naked Hall

Sensor

Naked Hall

Sensor

Naked Hall

Sensor

Rbias

Figure 8. Hall-Effect Commutation Sequence for Clockwise Rotation

Vsupply

taken during PCB layout to avoid

routing phase drive traces in close

proximity to any of the six Hall sig-

nals. A common-mode capacitor,

typically 0.01 µF, can be placed

between each of the Hall differen-

tial signals to reduce noise.

Table 1. Hall Position Sensor Input Gray-Code Logic

COMMUTATION F/R = LOW F/R HIGH PHASE A PHASE B PHASE C

STEP IN1 IN2 IN3 IN1 IN2 IN3 UPPER LOWER UPPER LOWER UPPER LOWER

A L L H H H L PWM Note 1 ON

B L H H H L L PWM Note 1 ON

C L H L H L H PWM Note 1 ON

D H H L L L H ON PWM Note 1

E H L L L H H ON PWM Note 1

F H L H L H L ON PWM Note 1

Illegal L L L L L L all OFF

Illegal H H H H H H all OFF

NOTE: Refer to the TPIC43T01 datasheet.

Figure 9. Hall-Effect Commutation Sequence for Counter-Clockwise Rotation

Using Digital Hall-Effect

Position Sensors

The TPIC43T01 position sensor

inputs can be configured to ac-

commodate use of digital Hall-

effect position sensors. Figure 10

shows one possible configuration.

Figure 10. Digital Hall-Effect Sensor Interface

Resistor values for the 2.5 V volt-

age divider shown in the schematic

are non-critical. The RPULLUP re-

sistor for the Hall sensor outputs

assume the sensors selected have

open collector outputs. The value

for RPULLUP should be per the

Hall device specification. If the 5 V

supply for this alternate Hall sen-

sor implementation is from the

TPIC43T01 VDD pin, care must be

taken not to exceed the specified

current.

IN1+

(37)

2.5V

TPIC43T01

GND

OUT

GND

OUT

IN1–

(38)

IN2–

(2)

IN2+

(1)

IN3–

(4)

IN3+

(3)

Digital Hall

Sensor

Digital Hall

Sensor

Digital Hall

Sensor

RPULLUP

0.01 µF

20 kΩ

Hall Decode

Logic

VCC

SLIT117

Printed in U.S.A.

3/98

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