CGS2535TV,CGS2535V
CGS2535V/CGS2535TV Commercial Quad 1 to 4 Clock Drivers/Industrial Quad 1
to 4 Clock Drivers
Literature Number: SNOS708B
CGS2535V/CGS2535TV
OBSOLETE
September 21, 2011
Commercial Quad 1 to 4 Clock Drivers/Industrial Quad
1 to 4 Clock Drivers
General Description
These Clock Generation and Support clock drivers are specif-
ically designed for driving memory arrays requiring large
fanouts while operating at high speeds.
The CGS2535 is a non-inverting 4 to 16 driver with CMOS I/
O structures. The CGS2535 specification guarantees part-to-
part skew variation.
Features
Guaranteed:
1.0 ns rise and fall times while driving 12 inches of
50Ω microstrip terminated with 25 pF
350 ps pin-to-pin skew (tOSLH and tOSHL)
650 ps part-to-part variation on positive or negative
transition @ 5V VCC
Operates with either 3.3V or 5.0V supply
Inputs 5V tolerant with VCC in 3.3V range
Symmetric output current drive: 24 mA IOH/IOL
Industrial temperature range −40°C to +85°C
Symmetric package orientation
Large fanout for memory driving applications
Guaranteed 2 kV ESD protection
Implemented on National's ABT family process
28-pin PLCC for optimum skew performance
Ordering Information
Order Number Package Number Package Description
CGS2535V
CGS2535TV
V28A 28-Lead Molded Plastic Leaded Chip Carrier
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the order number.
Connection Diagrams
Pin Assignment for 28-Pin PLCC
1195405
CGS2535
1195402
Truth Table
Input Output
In (0–3) ABCD Out (0–3)
© 2011 National Semiconductor Corporation 11954 www.national.com
11954 Version 9 Revision 3 Print Date/Time: 2011/09/21 13:06:00
CGS2535V Commercial Quad 1 to 4 Clock Drivers/CGS2535TV Industrial Quad 1 to 4 Clock
Drivers
Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC)7.0V
Input Voltage (VI)7.0V
Input Current −30 mA
Current Applied to Output
(High/Low) Twice the Rated IOH/IOL
Operating Temp. Industrial grade −40°C to +85°C
Comm. grade 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Airflow Typical θJA
0 LFM 62°C/W
225 LFM 43°C/W
500 LFM 34°C/W
900 LFM 27°C/W
Recommended Operating
Conditions
Supply Voltage VCC 4.75V to 5.25V
VCC 3.0V to 3.6V
Maximum Input Rise/Fall Time
(0.8V to 2.0V) 5 ns
Free Air Operating Temperature
Commercial 0°C to + 70°C
Industrial −40°C to + 85°C
Note 1: The Absolute Maximum Ratings are those values beyond which the
safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the DC and AC
Electrical Characteristics tables are not guaranteed at the absolute
maximum ratings. The Recommended Operating Conditions will define the
conditions for actual device operation.
DC Electrical Characteristics
Over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.
Symbol Parameter Conditions VCC (V) Min Typ Max Units
VIH Input High Level Voltage 3.0 2.1 V
4.5 3.15
5.5 3.85
VIL Input Low Level Voltage 3.0 0.9 V
4.5 1.35
5.5 1.65
VIK Input Clamp Voltage II = −18 mA 4.5 −1.2 V
VOH High Level Output Voltage IOH = −50 μA3.0 2.9 V
4.5 4.4
5.5 5.4
IOH = −24 mA 3.0 2.46 V
4.5 3.76
5.5 4.76
VOL Low Level Output Voltage IOL = 50 μA3.0 0.1 V
4.5 0.1
5.5 0.1
IOL = 24 mA 3.0 0.44 V
4.5 0.44
5.5 0.44
IIInput Current @ Max Input Voltage VIH = 7V 5.5 7 μA
VIH = VCC 3.6 1
IIH High Level Input Current VIH = VCC 5.5 5 μA
IIL Low Level Input Current VIL = 0V 5.5 −5 μA
IOLD Minimum Dynamic Output Current
(Note 2)
VOLD = 1.65V (max) 5.5 75 mA
VOLD = 0.9V (max) 3.0 (Note 3) 36
IOHD Minimum Dynamic Output Current
(Note 2)
VOHD = 3.85V (min) 5.5 −75 mA
VOHD = 2.1V (min) 3.0 (Note 3) −25
ICC Supply Current 3.6 75 μA
5.5 235
CIN Input Capacitance 5.0 5 pF
Note 2: Maximum test duration 2.0 ms, one output loaded at a time.
Note 3: At VCC = 3.3V, IOLD = 55 mA min; @ VCC = 3.6V, IOLD = 64 mA min
At VCC = 3.3V, IOHD = −58 mA min; @ VCC = 3.6V, IOHD = −66 mA min
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11954 Version 9 Revision 3 Print Date/Time: 2011/09/21 13:06:00
CGS2535V/CGS2535TV
AC Electrical Characteristics (Note 4, Note 5, Note 6)
Over recommended operating free air temperature specified. All typical values are measured at VCC = 5V, TA = 25°C.
Symbol Parameter
CGS2535
Units
VCC TA = +25°C TA = −40°C to +85°C
(V) CL = 50 pF, RL = 500Ω (Note 7)
(Note 11) CL = 50 pF, RL = 500Ω
Min Typ Max Min Typ Max
fmax Frequency Maximum 3.0 100 MHz
5.0 125
tPLH Low-to-High Propagation Delay 3.3 4.5 2.5 4.5 ns
CK to On @ 1 MHz (Note 13) 5.0 3.5 2.0 3.5
tPHL High-to-Low Propagation Delay 3.3 4.5 2.5 4.5 ns
CK to On @ 1 MHz (Note 13) 5.0 3.5 2.0 3.5
tPLH Low-to-High Propagation Delay 3.3 5.0 2.5 5.0 ns
CK to On @ 66.67 MHz (Note 13, Note 14) 5.0 4.5 2.0 4.5
tPHL High-to-Low Propagation Delay 3.3 5.0 2.5 5.0 ns
CK to On @ 66.67 MHz (Note 13, Note 14) 5.0 4.5 2.0 4.5
tOSLH Maximum Skew Common Edge 3.3 150 350 300 350 ps
Output-to-Output Variation 5.0 150 350 300 350
(Note 4, Note 6)
tOSHL Maximum Skew Common Edge 3.3 150 350 300 350 ps
Output-to-Output Variation 5.0 150 350 300 350
(Note 4, Note 6)
trise, Rise/Fall Time 3.3 3.5 3.5 ns
tfall (from 0.8V/2.0V to 2.0V/0.8V) (Note 8) 5.0 3.0 3.0
trise, Rise/Fall Time 3.3 0.8 1.0 ns
tfall (from 0.8V/2.0V to 2.0V/0.8V) (Note 9, Note
14)
5.0 0.4 0.6
trise, Rise/Fall Time 3.3 1.0 1.0 ns
tfall (from 0.8V/2.0V to 2.0V/0.8V) (Note 10, Note
14)
5.0 0.7 0.9
tHigh Pulse Width Duration High 3.3 4.0 4.0 ns
(Note 5, Note 6, Note 14) 5.0 4.0 4.0
tLow Pulse Width Duration Low 3.3 4.0 4.0
(Note 5, Note 6, Note 14) 5.0 4.0 4.0
tPVLH Part-to-Part Variation of 3.3 650 1.0 ns
Low-to-High Transitions 5.0 650 650 ps
@ 1 MHz (Note 13)
tPVHL Part-to-Part Variation of 3.3 650 1.0 ns
High-to-Low Transitions 5.0 650 650 ps
@ 1 MHz (Note 13)
tPVLH Part-to-Part Variation of 3.3 1.0 1.0
ns
Low-to-High Transitions 5.0 1.0 1.0
@ 66.67 MHz (Note 13, Note 14)
tPVHL Part-to-Part Variation of 3.3 1.0 1.0
High-to-Low Transitions 5.0 1.0 1.0
@ 66.67 MHz (Note 13, Note 14)
Note 4: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged
device and output bank. The specifications apply to any outputs switching in the same direction either LOW to HIGH (tOSLH) or HIGH to LOW (tOSHL).
Note 5: Time high is measured with outputs at 2.0V or above. Time low is measured with outputs at 0.8V or below. Input waveform characteristics for tHigh, tLow
measurement: f = 66.67 MHz, duty cycle = 50%.
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11954 Version 9 Revision 3 Print Date/Time: 2011/09/21 13:06:00
CGS2535V/CGS2535TV
Note 6: The input waveform has a rise and fall time transition time of 2.5 ns (10% to 90%).
Note 7: Industrial range (−40°C to +85°C) limits apply to the commercial temperature range (0°C to +70°C).
Note 8: These Rise and Fall times are measured with CL = 50 pF, RL = 500Ω (see Figure 1).
Note 9: These Rise and Fall times are measured with CL = 25 pF, RL = 500Ω (see Figure 1), and are guaranteed by design.
Note 10: These Rise and Fall times are measured driving 12 inches of 50Ω microstrip terminated with equivalent CL = 25 pF (see Figure 2), and are guaranteed
by design.
Note 11: Voltage Range 5.0 is 5.0V ± 0.25V, 3.3 is 3.3V ± 0.3V.
Note 12: For increased output drive, output pins may be connected together when the corresponding input pins are connected together.
Note 13: All 16 outputs switching simultaneously.
Note 14: Guaranteed by design.
Timing Information
1195407
1195409
FIGURE 1. A.C. Load (Note 8, Note 9)
CL = Total Load Including Probes
1195410
FIGURE 2. A.C. Load (Note 10)
CL = Total Load Including Probes
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11954 Version 9 Revision 3 Print Date/Time: 2011/09/21 13:06:00
CGS2535V/CGS2535TV
CGS2534/35/36/37
MEMORY ARRAY DRIVING
In order to minimize the total load on the address bus, quite
often memory arrays are driven by buffers while having the
inputs of the buffers tied together. Although this practice was
feasible in the conventional memory designs, in today's high
speed, large buswidth designs which require address fetching
at higher speeds, this technique produces many undesired
results such as cross-talk and over/undershoot.
CGS2534/35/36/37 Quad 1 to 4 clock drivers were designed
specifically to address these application issues on high
speed, large memory arrays systems.
These drivers are optimized to drive large loads, with 3.5 ns
propagation delays. These drivers produce less noise while
reducing the total capacitive loading on the address bus by
having only four inputs tied together (see the diagram below,
point A). This helps to minimize the overshoot and undershoot
by having only four outputs being switched simultaneously.
Also this larger fan-out helps to save board space since for
every one of these drivers, two conventional buffers were typ-
ically being used.
Another feature associated with these clock drivers is a
350 ps pin-to-pin skew specification. The minimum skew
specification allows high speed memory system designers to
optimize the performance of their memory sub-system by op-
erating at higher frequencies without having concerns about
output-to-output (bank-to-bank) synchronization problems
which are associated with driving high capacitive loads (Point
B).
The diagram below depicts a “2534/35/36/37” a memory sub-
system operating at high speed with large memory capacity.
The address bus is common to both the memory and the CPU
and I/Os.
These drivers can operate beyond 125 MHz, and are also
available in 3V–5V TTL/CMOS versions with large current
drive .
1195408
Device VCC I/O Output Configuration
2534 5 TTL Inverting quad 1–4
2535 3 or 5 CMOS Non-inverting quad 1–4
2536 3 or 5 CMOS Inverting, Non-inverting, ÷2
2537 5 TTL Inverting quad 1–4 with series 8Ω output resistors
5 www.national.com
11954 Version 9 Revision 3 Print Date/Time: 2011/09/21 13:06:00
CGS2535V/CGS2535TV
Part Numbering Information
1195411
www.national.com 6
11954 Version 9 Revision 3 Print Date/Time: 2011/09/21 13:06:00
CGS2535V/CGS2535TV
Physical Dimensions inches (millimeters) unless otherwise noted
28-Lead Molded Plastic Leaded Chip Carrier
NS Package Number V28A
7 www.national.com
11954 Version 9 Revision 3 Print Date/Time: 2011/09/21 13:06:00
CGS2535V/CGS2535TV
Notes
CGS2535V Commercial Quad 1 to 4 Clock Drivers/CGS2535TV Industrial Quad 1 to 4 Clock
Drivers
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