FP31QF 2-Watt HFET Mobile Infrastructure CATV / DBS W-LAN / ISM RFID Defense / Homeland Security Fixed Wireless Saturated Drain Current, Idss Transconductance, Gm Pinch Off Voltage, Vp (1) RF Parameter (2) Operational Bandwidth Test Frequency Small Signal Gain Maximum Stable Gain Output P1dB Output IP3 (3) Noise Figure GND GND GND GND GND GND 25 24 23 22 21 GND 20 GND 19 DRAIN / RF OUT 8 9 10 11 12 Function Gate / RF Input Drain / RF Output Ground 13 14 GND 15 GND GND 16 GND GND 7 GND 17 GND GND 6 GND 18 GND GND 5 GND GND 4 Pin No. 3 19 All other pins & backside copper Recommended Replacement Part: TQP7M9104 Units Min mA mS V Units Min MHz MHz dB dB dBm dBm dB 50 Typ 1170 590 -2.0 Typ Max Max 4000 800 18 24 +34 +46 3.5 Rating Typical Performance (4) Parameter Absolute Maximum Rating Storage Temperature DC Power RF Input Power (continuous) Drain to Gate Voltage, Vdg Thermal Resistance, Rth Junction Temperature 26 GATE / 3 RF IN The device conforms to WJ Communications' long history of producing high reliability and quality components. The FP31QF has an associated MTTF of a minimum of 100 years at a mounting temperature of 85C. All devices are 100% RF & DC tested. 1. Pinch-off voltage is measured when Ids = 4.8 mA. 2. Test conditions unless otherwise noted: T = 25 C, VDS = 9 V, IDQ = 450 mA, in a tuned application circuit with ZL = ZLOPT, ZS = ZSOPT (optimized for output power). 3. 3OIP measured with two tones at an output power of +18 dBm/tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule. Parameter 27 GND 2 Not Recommended for New Designs Specifications DC Parameter 28 GND 1 The product is targeted for use as driver amplifiers for wireless infrastructure where high performance and high efficiency are required. Applications * * * * * * The FP31QF is a high performance 2-Watt HFET (Heterostructure FET) in a low-cost lead-free/RoHScompliant 28-pin 6x6 mm QFN (Quad Flatpack, NoLead) surface-mount package. This device works optimally at a drain bias of +9 V and 450 mA to achieve +46 dBm output IP3 performance and an output power of +34 dBm at 1-dB compression. GND 50 - 4000 MHz 18 dB Gain @ 900 MHz +34 dBm P1dB +46 dBm Output IP3 High Drain Efficiency Single Voltage Supply Robust 1000V ESD, Class IC Lead free/green/RoHS-compliant 6mm 28-pin QFN package Functional Diagram GND * * * * * * * * Product Description GND Product Features -55 to +125 C 7.5 W 6 dB above Input P1dB +16 V 18C/W +160C Frequency Gain S11 S22 Output P1dB Output IP3 (3) Noise Figure IS-95 Channel Power @ -45 dBc ACPR W-CDMA Ch. Power @ -45 dBc ACLR (5) Drain Voltage Drain Current (5) Units MHz dB dB dB dBm dBm dB 915 18 -20 -12 +34 +46 3.5 dBm +27.8 Typical 1960 2140 2450 13.5 13 12 -20 -18 -18 -11 -24 -15 +33.8 +33.2 +33.5 +46.8 +46.6 +46.8 4.5 4.6 4.6 +27.3 dBm V mA +25 +9 450 4. Typical parameters represent performance in an application circuit. 5. Empirical measurements showed optimal power performance at a drain voltage = 9 volts at 450 mA. Because the FP31QF is a discrete device, users can choose their own bias configuration. Performance may vary from the data shown depending on the biasing conditions. To achieve a minimum 1 million hours MTTF rating, the biasing condition should maintain a junction temperature below 160 C over all operating temperatures. This can be approximated by (drain voltage) x (drain current) x 17.5 C/W + (maximum operating temperature). Ordering Information Part No. FP31QF-F Description 2-Watt HFET (lead-free/RoHS-compliant 6mm QFN package) Standard tape / reel size = 500 pieces on a 7" reel Operation of this device above any of these parameters may cause permanent damage. Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. - 1 of 12- Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET Typical Device Data S-Parameters (VDS = +9 V, IDS = 450 mA, T = 25 C, calibrated to device leads) 1.0 2. 0 Swp Min 0.01GHz .0 -2 Swp Min 0.01GHz Note: Measurements were made on the packaged device in a test fixture with 50 ohm input and output lines. The S-parameters shown are the de-embedded data down to the device leads and represents typical performance of the device. Freq (MHz) 50 250 500 750 1000 1250 1500 1750 2000 2250 2500 2750 3000 3250 3500 3750 4000 10.0 4.0 5.0 3.0 2.0 1.0 0.8 0.6 0.4 0.2 .4 -0 -1.0 3 1 -0 .6 2.5 2 2 -0. .0 -2 2 -1.0 1.5 Frequency (GHz) -0.8 1 -0 .6 0.5 10.0 -3 .0 .4 -0 0 4.0 5.0 -0.8 DB(MSG) 0 0 10.0 1 -4 .0 -5. 0 DB(|S[2,1]|) -10.0 2 -0. 0.8 2. 0 4.0 5.0 2.0 3.0 1.0 0.6 0.8 0.4 0.2 10.0 10 6 5 4 3 0 3. -3 .0 3 2 6 0. 1.0 0 4. 5.0 -4. 0 -5. 0 6 0. 0.8 0 3. -10.0 0.2 0 6 Swp Max 6GHz 0.2 0. 4 20 5 Swp Max 6GHz 0. 4 4 S21, MSG (dB) S22 S11 S21, Maximum Stable Gain vs. Frequency 30 S11 (mag) S11 (ang) S21 (mag) S21 (ang) S12 (mag) S12 (ang) S22 (mag) 0.985 -21.82 24.458 166.25 0.006 76.01 0.096 0.936 -88.63 17.968 128.52 0.020 43.34 0.329 0.913 -128.61 11.520 104.42 0.025 22.03 0.431 0.899 -148.43 8.132 90.03 0.026 10.75 0.465 0.900 -160.54 6.225 79.35 0.026 4.56 0.490 0.900 -169.15 4.988 70.50 0.025 0.35 0.514 0.900 -176.01 4.125 62.56 0.025 -2.975 0.532 0.905 178.53 3.504 55.28 0.024 -4.91 0.560 0.909 172.99 3.046 47.93 0.023 -5.54 0.587 0.910 168.27 2.656 41.65 0.022 -4.44 0.606 0.914 164.14 2.349 34.95 0.021 -1.12 0.629 0.914 160.09 2.117 28.98 0.021 5.24 0.656 0.915 156.76 1.897 23.31 0.022 12.75 0.671 0.922 153.22 1.721 17.69 0.026 23.36 0.695 0.926 149.22 1.563 11.97 0.034 32.54 0.720 0.941 144.67 1.433 6.20 0.058 34.08 0.734 0.943 140.45 1.318 0.98 0.102 23.74 0.768 Device S-parameters are available for download from the website at: http://www.wj.com S22 (ang) -110.34 -135.13 -151.01 -158.3 -162.14 -163.92 -166.86 -168.72 -170.95 -172.86 -175.13 -177.13 -179.41 177.36 175.05 171.21 165.82 Load-Pull Data at 1.96 and 2.14 GHz (Vds = 8 V, Ids = 500 mA, 25 C, ZS = 50 , calibrated to device pins) Gain (dB) 18.5 18.0 P1dB Swp Max 1.96GHz 2. 0 6 0. 1.0 0.8 6 0. Output IP3 1.96 GHz r 8 Ohm x -2 Ohm Swp Max 1.96GHz PAE (%) 49 50 0. 4 1.96 GHz r 8 Ohm x -2 Ohm P1dB (dBm) OIP3 (dBm) +34 +48 +34 +48 2. 0 ZL () 8 - j2 8 - j3 1.0 ZS () 5 + j0 5 - j2 0.8 Freq (GHz) 1.96 2.14 0. 4 0 3. 0 4. 5.0 0 3. 0 4. 5.0 0.2 0.2 45 43 42 41 .0 -2 -1.0 -0.8 -0 .6 Swp Min 1e-009GHz P1dB max (1.96 GHz) = +34 dBm at ZL = 8 - j2 10.0 4.0 5.0 3.0 2.0 1.0 0.8 44 .4 -0 .0 -2 -1.0 -0.8 0.6 0.4 0.2 0 10.0 3.0 4.0 5.0 2.0 0.8 0.4 1.0 27 -3 .0 28 .4 -0 -0 .6 46 2 -0. -4 .0 -5. 0 0.2 0.6 30 29 Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. 47 -3 .0 2 -0. 31 48 -10.0 32 -4 .0 -5. 0 33 10.0 -10.0 0 10.0 Swp Min 1e-009GHz OIP3 max (1.96 GHz) = +48 dBm at ZL = 8 - j2 - 2 of 12- Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET Application Circuit: 870 - 960 MHz The application circuit is matched for output power. Typical RF Performance Drain Bias = +9 V, Ids = 450 mA, 25 C Frequency S21 - Gain S11 - Input Return Loss S22 - Output Return Loss Output P1dB Output IP3 (+18 dBm / tone, 1 MHz spacing) Noise Figure IS-95 Channel Power @ -45 dBc ACPR MHz dB dB dB dBm 870 18.3 -15 -9.3 +33.9 915 18 -20 -12 +34 dBm dB 960 17.7 -16 -16 +33.7 +46 3.4 3.5 dBm 3.5 +27.8 ID=C8 C=100 pF ID=C7 C=1000 pF -Vgg Vds=9V @ 450 mA ID=C12 C=1e5 pF ID=R2 R=51 Ohm ID=C11 C=1000 pF ID=C10 C=100 pF ID=C1 C=100 pF TLINP ID=TL1 Z0=50 Ohm L=500 mil Eeff=3.46 Loss=0 F0=0 MHz ID=L3 L=3.3 nH NET="FP31QF" ID=L1 L=27 nH 2 ID=L2 L=27 nH ID=C4 C=100 pF 1 ID=R1 R=10 Ohm ID=C2 C=4.7 pF Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. - 3 of 12- TLINP ID=TL2 Z0=50 Ohm L=520 mil Eeff=3.46 Loss=0 F0=0 MHz ID=C3 C=4.7 pF Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET 870 - 960MHz Application Circuit Performance Plots -10 -15 -20 18 17 -25 16 -30 860 15 860 880 36 900 920 940 960 -40c 880 900 -40c -30 860 960 Frequency (MHz) 6 920 ACPR (dBc) NF (dB) 2 940 -40c freq = 915 MHz 960 880 900 44 freq = 915, 916 MHz +18 dBm / tone 40 60 -60 IMD_High 16 28 14 24 20 Output Power 16 10 4 8 12 Input Power (dBm) Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. 16 20 Gain (dB) 18 Output Power (dBm) 32 8 12 16 20 Output Power (dBm) 24 Gain 27 28 29 40 35 28 4 36 20 32 18 28 14 24 12 20 Output Power 10 16 -4 26 0 4 8 12 Input Power (dBm) - 4 of 12- 16 8 12 16 20 Output Power (dBm) 24 28 Output Power / Gain vs. Input Power frequency = 915 MHz, Temp = +25 C 16 25 30 4 20 24 45 Output Power / Gain vs. Input Power Gain 0 23 OIP3 vs. Output Power IMD_Low -80 36 +85 C fundamental frequency = 915 MHz, 916 MHz; Temp = +25 C 50 -100 85 +25 C Output Channel Power (dBm) 20 Gain (dB) 35 frequency = 915 MHz, Temp = -40 C -4 22 960 fundamental frequency = 915 MHz, 916 MHz; Temp = +25 C Output Power / Gain vs. Input Power 12 940 -40 Temperature (C) 18 920 OIP3 (dBm) IMD products (dBm) 46 20 -40 C +85c IMD products vs. Output Power 48 10 -60 Frequency (MHz) -20 -15 +25c -50 -70 0 860 Output Power (dBm) 900 3 1 +85c +25c 4 960 IS-95, 9 Ch. Forward, 885 kHz offset, 30 kHz Meas BW -40 OIP3 vs. Temperature -40 940 ACPR vs. Channel Power Frequency (MHz) 42 920 Frequency (MHz) -40c 50 900 Noise Figure vs. Frequency 30 880 880 +85c +25c Frequency (MHz) 32 26 860 OIP3 (dBm) 940 -20 5 28 Gain (dB) 920 -15 -25 +85c +25c -10 P1dB vs. Frequency 34 P1dB (dBm) -5 19 S21 (dB) S11 (dB) +85c +25c S22 vs. Frequency 0 S22 (dB) -40c -5 S21 vs. Frequency 20 frequency = 915 MHz, Temp = +85 C 36 32 Gain 16 28 24 14 12 20 Output Power Output Power (dBm) S11 vs. Frequency 0 16 10 -4 0 4 8 12 Input Power (dBm) 16 20 Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET Application Circuit: 1930 - 1990 MHz The application circuit is matched for output power. Typical RF Performance Drain Bias = +9 V, Ids = 450 mA, 25 C Frequency S21 - Gain S11 - Input Return Loss S22 - Output Return Loss Output P1dB Output IP3 MHz dB dB dB dBm 1930 14 -17 -11 +33.5 1960 13.8 -21 -11 +33.8 dBm (+18 dBm / tone, 1 MHz spacing) Noise Figure IS-95 Channel Power dB +46.8 4.3 4.5 dBm @ -45 dBc ACPR ID=C8 C=22 pF 1990 13.8 -27 -13 +33.8 4.4 +27.3 ID=C7 C=1000 pF -Vgg Vds=9V @ 450 mA ID=C12 C=1e5 pF ID=R2 R=51 Ohm ID=C11 C=1000 pF ID=C10 C=22 pF ID=C1 C=22 pF ID=L3 L=4.7 nH TLINP ID=TL1 Z0=50 Ohm L=190 mil Eeff=3.46 Loss=0 F0=0 MHz NET="FP31QF" ID=L1 L=12 nH 2 ID=L2 L=12 nH ID=C4 C=22 pF 1 ID=R1 R=5.1 Ohm ID=C2 C=2.2 pF Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. - 5 of 12- TLINP ID=TL2 Z0=50 Ohm L=200 mil Eeff=3.46 Loss=0 F0=0 MHz ID=C3 C=2 pF Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET 1930 - 1990MHz Application Circuit Performance Plots -10 -15 -20 14 13 -25 12 -30 1930 11 1930 1950 36 1970 1990 -40C 1950 Frequency (MHz) 6 ACPR (dBc) NF (dB) 1970 4 3 2 -40c 0 1930 1990 1950 44 freq = 1960, 1961 MHz +18 dBm / tone 40 60 28 10 24 20 Output Power 6 16 6 10 14 18 Input Power (dBm) Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. 22 8 12 16 20 Output Power (dBm) 24 26 Gain 28 29 35 4 36 16 32 14 28 24 10 8 20 Output Power 16 6 2 27 6 10 14 18 Input Power (dBm) - 6 of 12- 22 8 12 16 20 Output Power (dBm) 24 28 Output Power / Gain vs. Input Power frequency = 1960 MHz, Temp = +25 C 12 26 40 28 26 Gain (dB) 14 Gain (dB) 32 Output Power (dBm) Gain 16 25 30 4 36 24 45 Output Power / Gain vs. Input Power frequency = 1960 MHz, Temp = -40 C 2 IMD_High -100 85 Output Power / Gain vs. Input Power 8 23 OIP3 vs. Output Power IMD_Low -80 +85 C fundamental frequency = 1960, 1961 MHz; Temp = +25 C 50 Output Power (dBm) 35 -60 +25 C Output Channel Power (dBm) -40 Temperature (C) 12 22 1990 OIP3 (dBm) IMD products (dBm) 46 14 -65 IMD products vs. Output Power 48 16 -55 -75 fundamental frequency = 1960, 1961 MHz; Temp = +25 C -20 10 -45 -40 C +85c 1970 freq = 1960 MHz Frequency (MHz) OIP3 vs. Temperature -15 +25c 1990 IS-95, 9 Ch. Forward, 885 kHz offset, 30 kHz Meas BW -35 1 +85c +25c 1950 -40 1970 ACPR vs. Channel Power -40c 42 1950 Frequency (MHz) Frequency (MHz) OIP3 (dBm) 1990 +85C +25C Noise Figure vs. Frequency 30 50 -40C Frequency (MHz) 32 26 1930 -20 -30 1930 5 28 Gain (dB) 1970 -15 -25 +85C +25C -10 P1dB vs. Frequency 34 P1dB (dBm) -5 15 S21 (dB) S11 (dB) +85C +25C S22 vs. Frequency 0 S22 (dB) -40C -5 S21 vs. Frequency 16 frequency = 1960 MHz, Temp = +85 C 36 32 12 28 Gain 24 10 8 20 Output Power Output Power (dBm) S11 vs. Frequency 0 16 6 2 6 10 14 18 Input Power (dBm) 22 26 Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET Application Circuit: 2110 - 2170 MHz The application circuit is matched for output power. Typical RF Performance Drain Bias = +9 V, Ids = 450 mA, 25 C Frequency S21 - Gain S11 - Input Return Loss S22 - Output Return Loss Output P1dB Output IP3 MHz dB dB dB dBm 2110 13.2 -17 -14 +33.6 2140 13.3 -19 -24 +33.2 dBm (+18 dBm / tone, 1 MHz spacing) Noise Figure IS-95 Channel Power dB +46.6 4.7 4.6 dBm @ -45 dBc ACPR ID=C8 C=22 pF 2170 13.1 -16 -18 +33.3 4.9 +25 ID=C7 C=1000 pF -Vgg Vds=9V @ 450 mA ID=C12 C=1e5 pF ID=R2 R=51 Ohm ID=C11 C=1000 pF ID=C10 C=22 pF ID=C1 C=22 pF ID=L3 L=4.7 nH TLINP ID=TL1 Z0=50 Ohm L=150 mil Eeff=3.46 Loss=0 F0=0 MHz NET="FP31QF" ID=L1 L=12 nH 2 ID=L2 L=12 nH ID=C4 C=22 pF 1 ID=R1 R=5.1 Ohm ID=C2 C=2 pF Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. - 7 of 12- TLINP ID=TL2 Z0=50 Ohm L=180 mil Eeff=3.46 Loss=0 F0=0 MHz ID=C3 C=2 pF Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET 2110 - 2170MHz Application Circuit Performance Plots +85c -5 14 -10 S21 (dB) -15 -20 13 12 -25 11 -30 2110 10 2110 2130 2150 2170 -40c 2130 Frequency (MHz) 30 2150 4 3 2 -40C 0 2110 2170 freq = 2140, 2141 MHz +18 dBm / tone 40 -15 10 2130 35 60 -80 12 28 8 24 20 Output Power 4 16 10 14 18 Input Power (dBm) Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. 22 26 Gain (dB) 32 Output Power (dBm) 14 10 6 22 23 25 26 27 OIP3 vs. Output Power fundamental frequency = 2140, 2141 MHz; Temp = +25 C 50 45 40 35 30 6 9 12 15 Output Power (dBm) 18 21 3 Gain 36 14 32 12 10 28 8 24 6 20 Output Power 16 4 6 10 14 18 Input Power (dBm) - 8 of 12- 22 6 9 12 15 Output Power (dBm) 18 21 Output Power / Gain vs. Input Power frequency = 2140 MHz, Temp = +25 C 2 24 +85 C Output Channel Power (dBm) IMD_High 3 36 +25 C -40 C Output Power / Gain vs. Input Power Gain 2 2170 -100 85 frequency = 2140 MHz, Temp = -40 C 6 2150 IMD_Low Output Power / Gain vs. Input Power 12 -50 -60 -60 Temperature (C) 14 -45 -55 +85C OIP3 (dBm) IMD products (dBm) OIP3 (dBm) 44 -40 freq = 2140 MHz IMD products vs. Output Power 46 42 +25C fundamental frequency = 2140, 2141 MHz; Temp = +25 C -40 48 2170 3GPP W-CDMA, Test Model 1 + 64 DPCH, 5 MHz offset Frequency (MHz) OIP3 vs. Temperature 50 2150 ACPR vs. Channel Power 26 Gain (dB) 2130 2130 +85c -40 1 +85C +25C +25c Frequency (MHz) -35 Frequency (MHz) Gain (dB) 2170 ACPR (dBc) NF (dB) P1dB (dBm) 32 26 2110 -40c -30 2110 5 -40C -20 Noise Figure vs. Frequency 6 34 28 -15 Frequency (MHz) P1dB vs. Frequency 36 2150 -10 -25 +85c +25c Output Power (dBm) S11 (dB) +25c S22 vs. Frequency 0 S22 (dB) -40c -5 S21 vs. Frequency 15 frequency = 2140 MHz, Temp = +85 C 36 32 Gain 10 28 24 8 6 20 Output Power Output Power (dBm) S11 vs. Frequency 0 16 4 2 6 10 14 18 Input Power (dBm) 22 26 Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET Reference Design: 2400 - 2500 MHz The application circuit is matched for output power. Typical RF Performance Drain Bias = +9 V, Ids = 450 mA, 25 C (+18 dBm / tone, 1 MHz spacing) Noise Figure MHz dB dB dB dBm 2400 2500 12.1 12.0 -13 -16 -13 -17 +33.5 dBm +46.8 dB 4.6 10 5 0 (dB) Frequency S21 - Gain S11 - Input Return Loss S22 - Output Return Loss Output P1dB Output IP3 Measured S-Parameters 15 DB(|S[1,1]|) DB(|S[2,1]|) DB(|S[2,2]|) -5 -10 -15 -20 The 2.4 - 2.5 GHz Reference Circuit is shown for design purposes only. An evaluation board is not readily available for this application. The reader can obtain any FP31QF evaluation board and modify it with the circuit shown to achieve the performance shown in this reference design. -25 2.3 ID=C8 C=22 pF 2.35 2.4 2.45 Frequency (GHz) 2.5 2.55 2.6 ID=C7 C=1000 pF -Vgg Vds=9V @ 450 mA ID=C12 C=1e5 pF ID=R2 R=51 Ohm ID=C11 C=1000 pF ID=C10 C=22 pF ID=C1 C=22 pF ID=L3 L=3.3 nH TLINP ID=TL1 Z0=50 Ohm L=150 mil Eeff=3.46 Loss=0 F0=0 MHz NET="FP31QF" ID=L1 L=12 nH 2 ID=L2 L=12 nH ID=C4 C=22 pF 1 ID=R1 R=5.1 Ohm ID=C2 C=1.5 pF Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. - 9 of 12- TLINP ID=TL2 Z0=50 Ohm L=180 mil Eeff=3.46 Loss=0 F0=0 MHz ID=C3 C=1.5 pF Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET Reference Design: 3500 MHz The application circuit is matched for output power. Typical RF Performance Drain Bias = +9 V, Ids = 450 mA, 25 C (+18 dBm / tone, 1 MHz spacing) MHz dB dB dB dBm 3500 11.9 -16 -8.8 +33.5 dBm +45 10 5 0 (dB) Frequency S21 - Gain S11 - Input Return Loss S22 - Output Return Loss Output P1dB Output IP3 Measured S-Parameters 15 DB(|S[1,1]|) DB(|S[2,1]|) DB(|S[2,2]|) -5 -10 -15 The 3.5 GHz Reference Circuit is shown for design purposes only. An evaluation board is not readily available for this application. The reader can obtain any FP31QF evaluation board and modify it with the circuit shown to achieve the performance shown in this reference design. ID=C8 C=22 pF -20 -25 3.3 3.35 3.4 ID=C7 C=1000 pF 3.45 3.5 3.55 Frequency (GHz) 3.6 3.65 3.7 Vds=9V @ 450 mA -Vgg ID=C11 C=1000 pF ID=C12 C=1e4 pF ID=R2 R=51 Ohm ID=C10 C=22 pF ID=C1 C=22 pF ID=L3 L=3.3 nH TLIN Z0=50 Ohm EL=55 Deg F0=3.5 GHz ID=R1 R=2.2 Ohm ID=L1 L=6.8 nH NET="FP31QF" 2 ID=L2 L=6.8 nH ID=C4 C=22 pF 1 ID=C2 C=0.9 pF Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. TLIN Z0=50 Ohm EL=5.9 Deg F0=3.5 GHz - 10 of 12- TLIN Z0=50 Ohm EL=12.8 Deg F0=3.5 GHz ID=C3 C=1 pF Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET Application Note: Constant-Current Active-Biasing Special attention should be taken to properly bias the FP31QF. Power supply sequencing is required to prevent the device from operating at 100% Idss for a prolonged period of time and possibly causing damage to the device. It is recommended that for the safest operation, the negative supply be "first on and last off." With a negative gate voltage present, the drain voltage can then be applied to the device. The gate voltage can then be adjusted to have the device be used at the proper quiescent bias condition. An optional active-bias current mirror is recommended for use with the application circuits shown this datasheet. Generally in a laboratory environment, the gate voltage is adjusted until the drain draws the recommended operating current. The gate voltage required can vary slightly from device to device because of device pinchoff variation, while also varying slightly over temperature. The active-bias circuit, shown on the right, uses dual PNP transistors to provide a constant drain current into the FP31QF, while also eliminating the effects of pinchoff variation. This configuration is best suited for applications where the intended output power level of the amplifier is backed off at least 6 dB away from its compression point. With the implementation of the circuit, lower P1dB values may be measured for a Class-AB amplifier, where the device will attempt to source more drain current while the circuit tries to provide a constant drain current. The circuit should be connected directly in line with where the voltage supplies would be normally connected with the amplifier circuit, as shown the diagram. Any required matching circuitry remains the same, although it is not shown in the diagram. This recommended active-bias constant-current circuit adds 7 components to the parts count for implementation, but should cost only an extra $0.144 to realize ($0.10 for U1, $0.0029 for R1, R3, R4, R5, $0.024 for R2, and $0.0085 for C1). Temperature compensation is achieved by tracking the voltage variation with the temperature of the emitter-to-base junction of the two PNP transistors. As a 1st order approximation, this is achieved by using matched transistors with approximately the same Ibe current. Thus the transistor emitter voltage adjusts the HFET gate voltage so that the device draws a constant current, regardless of the temperature. A Rohm dual transistor - UMT1N - is recommended for cost, minimal board space requirements, and to minimize the variation between the two transistors. Minimizing the variability between the base-to-emitter junctions allow more accuracy in setting the current draw. More details can be found in a separate application note "Active-bias Constant-current Source Recommended for HFETs" found on the WJ website. Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. - 11 of 12- +Vdd R1 R2 U1 C1 .01 F 4 Rohm UMT1N 1 2 5 3 6 R4 1 k R3 R5 RF OUT RF IN M.N. -Vgg DUT M.N. HFET Application Circuit Parameter Pos Supply, Vdd Neg Supply, Vgg Vds Ids R1 R2* R3 R4 R5 FP31QF +9 V -5 V +8.75. V 450 mA 62 0.56 2 k 1 k 1 k *R2 should be of size 1206 to dissipate 0.113 Watts. This should be of 1% tolerance. Two 1.1 resistors in parallel of size 0805 can also be used. Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R) FP31QF 2-Watt HFET FP31QF-F Mechanical Information This package is lead-free/RoHS-compliant. It is compatible with both lead-free (maximum 260 C reflow temperature) and leaded (maximum 245 C reflow temperature) soldering processes. The plating material on the pins is annealed matte tin over copper. Product Marking Outline Drawing The component will be lasermarked with a "FP31FF" product label with an alphanumeric lot code on the top surface of the package. The obsolete tin-lead package is marked with an "FP31QF" designator followed by an alphanumeric lot code. Tape and reel specifications for this part will be located on the website in the "Application Notes" section. ESD / MSL Information Mounting Configuration / Land Pattern ESD Rating: Value: Test: Standard: Class 1C Passes 1000V to <2000V Human Body Model (HBM) JEDEC Standard JESD22-A114 ESD Rating: Value: Test: Standard: Class IV Passes 1000V Charged Device Model (CDM) JEDEC Standard JESD22-C101 MSL Rating: Level 2 at +260 C convection reflow Standard: JEDEC Standard J-STD-020 Functional Pin Layout Pin 3 19 FUNCTION Gate /RF Input Drain / RF Output The backside paddle is the Source and should be grounded for thermal and electrical purposes. All other pins should be grounded on the PCB. Data Sheet: Rev A 7/18/12 (c) 2012 TriQuint Semiconductor, Inc. - 12 of 12- Disclaimer: Subject to change without notice Connecting the Digital World to the Global Network(R)