Data Sheet: Rev A 7/18/12
- 1 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Product Features
• 50 – 4000 MHz
• 18 dB Gain @ 900 MHz
• +34 dBm P1dB
• +46 dBm Output IP3
• High Drain Efficiency
• Single Voltage Supply
• Robust 1000V ESD, Class IC
• Lead free/green/RoHS-compliant
6mm 28-pin QFN package
Applications
• Mobile Infrastructure
• CATV / DBS
• W-LAN / ISM
• RFID
• Defense / Homeland Security
• Fixed Wireless
Product Description
The FP31QF is a high performance 2-Watt HFET
(Heterostructure FET) in a low-cost lead-free/RoHS-
compliant 28-pin 6x6 mm QFN (Quad Flatpack, No-
Lead) surface-mount package. This device works
optimally at a drain bias of +9 V and 450 mA to achieve
+46 dBm output IP3 performance and an output power of
+34 dBm at 1-dB compression.
The device conforms to WJ Communications’ long
history of producing high reliability and quality
components. The FP31QF has an associated MTTF of a
minimum of 100 years at a mounting temperature of
85°C. All devices are 100% RF & DC tested.
The product is targeted for use as driver amplifiers for
wireless infrastructure where high performance and high
efficiency are required.
Functional Diagram
Function
Gate /
RF Input
3
Drain /
RF Output
19
Ground
Specifications
DC Parameter
Units
Min
Typ
Max
Saturated Drain Current, Idss
mA
1170
Transconductance, Gm
mS
590
Pinch Off Voltage, Vp (1)
V
-2.0
RF Parameter
(2)
Units
Min
Typ
Max
Operational Bandwidth
MHz
50
4000
Test Frequency
MHz
800
Small Signal Gain
dB
18
Maximum Stable Gain
dB
24
Output P1dB
dBm
+34
Output IP3 (3)
dBm
+46
Noise Figure
dB
3.5
1. Pinch-off voltage is measured when Ids = 4.8 mA.
2. Test conditions unless otherwise noted: T = 25 ºC, VDS = 9 V, IDQ = 450 mA, in a tuned
application circuit with ZL = ZLOPT, ZS = ZSOPT (optimized for output power).
3. 3OIP measured with two tones at an output power of +18 dBm/tone separated by 1 MHz. The
suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule.
Absolute Maximum Rating
Parameter
Rating
Storage Temperature
-55 to +125 °C
DC Power
7.5 W
RF Input Power (continuous)
6 dB above Input P1dB
Drain to Gate Voltage, Vdg
+16 V
Thermal Resistance, Rth
18°C/W
Junction Temperature
+160°C
Operation of this device above any of these parameters may cause permanent damage.
Typical Performance (4)
Parameter
Units
Typical
Frequency
MHz
915
1960
2140
2450
Gain
dB
18
13.5
13
12
S11
dB
-20
-20
-18
-18
S22
dB
-12
-11
-24
-15
Output P1dB
dBm
+34
+33.8
+33.2
+33.5
Output IP3 (3)
dBm
+46
+46.8
+46.6
+46.8
Noise Figure
dB
3.5
4.5
4.6
4.6
IS-95 Channel Power
@ -45 dBc ACPR
dBm +27.8 +27.3
W-CDMA Ch. Power
@ -45 dBc ACLR
dBm +25
Drain Voltage (5)
V
+9
Drain Current (5)
mA
450
4. Typical parameters represent performance in an application circuit.
5. Empirical measurements showed optimal power performance at a drain voltage = 9 volts at 450 mA.
Because the FP31QF is a discrete device, users can choose their own bias configuration. Performance
may vary from the data shown depending on the biasing conditions. To achieve a minimum 1 million
hours MTTF rating, the biasing condition should maintain a junction temperature below 160 °C over all
operating temperatures. This can be approximated by (drain voltage) x (drain current) x 17.5 °C/W +
(maximum operating temperature).
Ordering Information
Part No.
Description
FP31QF-F
2-Watt HFET
(lead-free/RoHS-compliant 6mm QFN package)
Standard tape / reel size = 500 pieces on a 7” reel
1
2
3
4
5
6
7
21
20
19
18
17
16
15
28
27
26
25
24
23
22
8
9
10
11
12
13
14
GND
GND
DRAIN /
RF OUT
GND
GND
GND
GND
GND
GND
GATE /
RF IN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Not Recommended for
New Designs
Recommended Replacement
Part: TQP7M9104
Data Sheet: Rev A 7/18/12
- 2 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Typical Device Data
S-Parameters (VDS = +9 V, IDS = 450 mA, T = 25 °C, calibrated to device leads)
00.5 11.5 22.5 3
Frequency (GHz)
S21, Maximum Stable Gain vs. Frequency
0
10
20
30
S21, MSG (dB)
DB(|S[2,1]|)
DB(MSG)
0
1.0 1.0-1.0
10.0
10.0
-10.0
5.0
5.0
-5.0
2.0
2.0
-2.0
3.0
3.0
-3.0
4.0
4.0
-4.0
0.2
0.2
-0.2
0.4
0.4
-0.4
0.6
0.6
-0.6
0.8
0.8
-0.8
S11
Swp Max
6GHz
Swp Min
0.01GHz
0
1.0 1.0-1.0
10.0
10.0
-10.0
5.0
5.0
-5.0
2.0
2.0
-2.0
3.0
3.0
-3.0
4.0
4.0
-4.0
0.2
0.2
-0.2
0.4
0.4
-0.4
0.6
0.6
-0.6
0.8
0.8
-0.8
S22
Swp Max
6GHz
Swp Min
0.01GHz
Note:
Measurements were made on the packaged device in a test fixture with 50 ohm input and output lines.
The S-parameters shown are the de-embedded data down to the device leads and represents typical performance of the device.
Freq (MHz)
S11 (mag)
S11 (ang)
S21 (mag)
S21 (ang)
S12 (mag)
S12 (ang)
S22 (mag)
S22 (ang)
50
0.985
-21.82
24.458
166.25
0.006
76.01
0.096
-110.34
250
0.936
-88.63
17.968
128.52
0.020
43.34
0.329
-135.13
500
0.913
-128.61
11.520
104.42
0.025
22.03
0.431
-151.01
750
0.899
-148.43
8.132
90.03
0.026
10.75
0.465
-158.3
1000
0.900
-160.54
6.225
79.35
0.026
4.56
0.490
-162.14
1250
0.900
-169.15
4.988
70.50
0.025
0.35
0.514
-163.92
1500
0.900
-176.01
4.125
62.56
0.025
-2.975
0.532
-166.86
1750
0.905
178.53
3.504
55.28
0.024
-4.91
0.560
-168.72
2000
0.909
172.99
3.046
47.93
0.023
-5.54
0.587
-170.95
2250
0.910
168.27
2.656
41.65
0.022
-4.44
0.606
-172.86
2500
0.914
164.14
2.349
34.95
0.021
-1.12
0.629
-175.13
2750
0.914
160.09
2.117
28.98
0.021
5.24
0.656
-177.13
3000
0.915
156.76
1.897
23.31
0.022
12.75
0.671
-179.41
3250
0.922
153.22
1.721
17.69
0.026
23.36
0.695
177.36
3500
0.926
149.22
1.563
11.97
0.034
32.54
0.720
175.05
3750
0.941
144.67
1.433
6.20
0.058
34.08
0.734
171.21
4000
0.943
140.45
1.318
0.98
0.102
23.74
0.768
165.82
Device S-parameters are available for download from the website at: http://www.wj.com
Load-Pull Data at 1.96 and 2.14 GHz
(Vds = 8 V, Ids = 500 mA, 25 °C, ZS = 50 Ω, calibrated to device pins)
Freq (GHz)
ZS (Ω)
ZL (Ω)
Gain (dB)
P1dB (dBm)
OIP3 (dBm)
PAE (%)
1.96
5 + j0
8 - j2
18.5
+34
+48
49
2.14
5 - j2
8 - j3
18.0
+34
+48
50
0
1.0 1.0-1.0
10.0
10.0
-10.0
5.0
5.0
-5.0
2.0
2.0
-2.0
3.0
3.0
-3.0
4.0
4.0
-4.0
0.2
0.2
-0.2
0.4
0.4
-0.4
0.6
0.6
-0.6
0.8
0.8
-0.8
P1dB
Swp Max
1.96GHz
Swp Mi n
1e-009GHz
1.96 GHz
r 8 Ohm
x -2 Ohm
33
32
31
30
29
28
27
0
1.0 1.0-1.0
10.0
10.0
-10.0
5.0
5.0
-5.0
2.0
2.0
-2.0
3.0
3.0
-3.0
4.0
4.0
-4.0
0.2
0.2
-0.2
0.4
0.4
-0.4
0.6
0.6
-0.6
0.8
0.8
-0.8
Output IP3
Swp Max
1.96GHz
Swp Mi n
1e-009GHz
1.96 GHz
r 8 Ohm
x -2 Ohm
48
47
46
45
44
43
42
41
P1dB max (1.96 GHz) = +34 dBm at ZL = 8 - j2 Ω OIP3 max (1.96 GHz) = +48 dBm at ZL = 8 - j2 Ω
1
2
3
4
5
6
1
2
3
4
5
6
Data Sheet: Rev A 7/18/12
- 3 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Application Circuit: 870 – 960 MHz
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +9 V, Ids = 450 mA, 25 °C
Frequency
MHz
870
915
960
S21 – Gain
dB
18.3
18
17.7
S11 – Input Return Loss
dB
-15
-20
-16
S22 – Output Return Loss
dB
-9.3
-12
-16
Output P1dB
dBm
+33.9
+34
+33.7
Output IP3
(+18 dBm / tone, 1 MHz spacing)
dBm +46
Noise Figure
dB
3.4
3.5
3.5
IS-95 Channel Power
@ -45 dBc ACPR
dBm +27.8
ID=R1
R=10 Ohm
ID=C1
C=100 pF
ID=L2
L=27 nH
ID=C10
C=100 pF
ID=C11
C=1000 pF
ID=C12
C=1e5 pF
ID=C4
C=100 pF
ID=C8
C=100 pF ID=C7
C=1000 pF
ID=C3
C=4.7 pF
ID=L1
L=27 nH
ID=R2
R=51 Ohm
ID=L3
L=3.3 nH
TLINP
ID=TL2
Z0=50 Ohm
L=520 mil
Eeff=3.46
Loss=0
F0=0 MHz
ID=C2
C=4.7 pF
TLINP
ID=TL1
Z0=50 Ohm
L=500 mil
Eeff=3.46
Loss=0
F0=0 MHz
1
2
NET="FP31QF"
-Vgg Vds=9V @ 450 mA
Data Sheet: Rev A 7/18/12
- 4 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
870 – 960MHz Application Circuit Performance Plots
S11 vs. Frequency
-30
-25
-20
-15
-10
-5
0
860 880 900 920 940 960
Frequency (MHz)
S11 (dB)
-40c +25c +85c
S21 vs. Frequency
15
16
17
18
19
20
860 880 900 920 940 960
Frequency (MHz)
S21 (dB)
-40c +25c +85c
S22 vs. Frequency
-30
-25
-20
-15
-10
-5
0
860 880 900 920 940 960
Frequency (MHz)
S22 (dB)
-40c +25c +85c
P1dB vs. Frequency
26
28
30
32
34
36
860 880 900 920 940 960
Frequency (MHz)
P1dB (dBm)
-40c +25c +85c
Noise Figure vs. Frequency
0
1
2
3
4
5
6
860 880 900 920 940 960
Frequency (MHz)
NF (dB)
-40c +25c +85c
ACPR vs. Channel Power
IS-95, 9 Ch. Forward, ±885 kHz offset, 30 kHz Meas BW
-70
-60
-50
-40
22 23 24 25 26 27 28 29
Output Channel Power (dBm)
ACPR (dBc)
-40 C +25 C +85 C
freq = 915 MHz
OIP3 vs. Temperature
40
42
44
46
48
50
-40 -15 10 35 60 85
Temperature (°C)
OIP3 (dBm)
freq = 915, 916 MHz
+18 dBm / tone
IMD products vs. Output Power
fundamental frequency = 915 MHz, 916 MHz; Temp = +25° C
-100
-80
-60
-40
-20
4 8 12 16 20 24 28
Output Power (dBm)
IMD products (dBm)
IMD_Low
IMD_High
OIP3 vs. Output Power
fundamental frequency = 915 MHz, 916 MHz; Temp = +25° C
30
35
40
45
50
4 8 12 16 20 24 28
Output Power (dBm)
OIP3 (dBm)
Output Power / Gain vs. Input Power
frequency = 915 MHz, Temp = -40° C
10
12
14
16
18
20
-4 0 4 8 12 16 20
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Output Power / Gain vs. Input Power
frequency = 915 MHz, Temp = +25° C
10
12
14
16
18
20
-4 0 4 8 12 16 20
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Output Power / Gain vs. Input Power
frequency = 915 MHz, Temp = +85° C
10
12
14
16
18
20
-4 0 4 8 12 16 20
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Data Sheet: Rev A 7/18/12
- 5 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Application Circuit: 1930 – 1990 MHz
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +9 V, Ids = 450 mA, 25 °C
Frequency
MHz
1930
1960
1990
S21 – Gain
dB
14
13.8
13.8
S11 – Input Return Loss
dB
-17
-21
-27
S22 – Output Return Loss
dB
-11
-11
-13
Output P1dB
dBm
+33.5
+33.8
+33.8
Output IP3
(+18 dBm / tone, 1 MHz spacing)
dBm +46.8
Noise Figure
dB
4.3
4.5
4.4
IS-95 Channel Power
@ -45 dBc ACPR
dBm +27.3
ID=R1
R=5.1 Ohm
ID=C1
C=22 pF
ID=L2
L=12 nH
ID=C10
C=22 pF
ID=C11
C=1000 pF
ID=C12
C=1e5 pF
ID=C4
C=22 pF
ID=C8
C=22 pF
ID=C7
C=1000 pF
ID=C3
C=2 pF
ID=L1
L=12 nH
ID=R2
R=51 Ohm
ID=L3
L=4.7 nH
TLINP
ID=TL2
Z0=50 Ohm
L=200 mil
Eeff=3.46
Loss=0
F0=0 MHz
ID=C2
C=2.2 pF
TLINP
ID=TL1
Z0=50 Ohm
L=190 mil
Eeff=3.46
Loss=0
F0=0 MHz
1
2
NET="FP31QF"
-Vgg Vds=9V @ 450 mA
Data Sheet: Rev A 7/18/12
- 6 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
1930 – 1990MHz Application Circuit Performance Plots
S11 vs. Frequency
-30
-25
-20
-15
-10
-5
0
1930 1950 1970 1990
Frequency (MHz)
S11 (dB)
-40C +25C +85C
S21 vs. Frequency
11
12
13
14
15
16
1930 1950 1970 1990
Frequency (MHz)
S21 (dB)
-40C +25C +85C
S22 vs. Frequency
-30
-25
-20
-15
-10
-5
0
1930 1950 1970 1990
Frequency (MHz)
S22 (dB)
-40C +25C +85C
P1dB vs. Frequency
26
28
30
32
34
36
1930 1950 1970 1990
Frequency (MHz)
P1dB (dBm)
-40c +25c +85c
Noise Figure vs. Frequency
0
1
2
3
4
5
6
1930 1950 1970 1990
Frequency (MHz)
NF (dB)
-40c +25c +85c
ACPR vs. Channel Power
IS-95, 9 Ch. Forward, ±885 kHz offset, 30 kHz Meas BW
-75
-65
-55
-45
-35
22 23 24 25 26 27 28 29
Output Channel Power (dBm)
ACPR (dBc)
-40 C +25 C +85 C
freq = 1960 MHz
OIP3 vs. Temperature
40
42
44
46
48
50
-40 -15 10 35 60 85
Temperature (°C)
OIP3 (dBm)
freq = 1960, 1961 MHz
+18 dBm / tone
IMD products vs. Output Power
fundamental frequency = 1960, 1961 MHz; Temp = +25° C
-100
-80
-60
-40
-20
4 8 12 16 20 24 28
Output Power (dBm)
IMD products (dBm)
IMD_Low
IMD_High
OIP3 vs. Output Power
fundamental frequency = 1960, 1961 MHz; Temp = +25° C
30
35
40
45
50
4 8 12 16 20 24 28
Output Power (dBm)
OIP3 (dBm)
Output Power / Gain vs. Input Power
frequency = 1960 MHz, Temp = -40° C
6
8
10
12
14
16
2 6 10 14 18 22 26
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Output Power / Gain vs. Input Power
frequency = 1960 MHz, Temp = +25° C
6
8
10
12
14
16
2 6 10 14 18 22 26
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Output Power / Gain vs. Input Power
frequency = 1960 MHz, Temp = +85° C
6
8
10
12
14
16
2 6 10 14 18 22 26
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Data Sheet: Rev A 7/18/12
- 7 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Application Circuit: 2110 – 2170 MHz
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +9 V, Ids = 450 mA, 25 °C
Frequency
MHz
2110
2140
2170
S21 – Gain
dB
13.2
13.3
13.1
S11 – Input Return Loss
dB
-17
-19
-16
S22 – Output Return Loss
dB
-14
-24
-18
Output P1dB
dBm
+33.6
+33.2
+33.3
Output IP3
(+18 dBm / tone, 1 MHz spacing)
dBm +46.6
Noise Figure
dB
4.7
4.6
4.9
IS-95 Channel Power
@ -45 dBc ACPR
dBm +25
ID=R1
R=5.1 Ohm
ID=C1
C=22 pF
ID=L2
L=12 nH
ID=C10
C=22 pF
ID=C11
C=1000 pF
ID=C12
C=1e5 pF
ID=C4
C=22 pF
ID=C8
C=22 pF
ID=C7
C=1000 pF
ID=C3
C=2 pF
ID=L1
L=12 nH
ID=R2
R=51 Ohm
ID=L3
L=4.7 nH
TLINP
ID=TL2
Z0=50 Ohm
L=180 mil
Eeff=3.46
Loss=0
F0=0 MHz
ID=C2
C=2 pF
TLINP
ID=TL1
Z0=50 Ohm
L=150 mil
Eeff=3.46
Loss=0
F0=0 MHz
1
2
NET="FP31QF"
-Vgg Vds=9V @ 450 mA
Data Sheet: Rev A 7/18/12
- 8 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
2110 – 2170MHz Application Circuit Performance Plots
S11 vs. Frequency
-30
-25
-20
-15
-10
-5
0
2110 2130 2150 2170
Frequency (MHz)
S11 (dB)
-40c +25c +85c
S21 vs. Frequency
10
11
12
13
14
15
2110 2130 2150 2170
Frequency (MHz)
S21 (dB)
-40c +25c +85c
S22 vs. Frequency
-30
-25
-20
-15
-10
-5
0
2110 2130 2150 2170
Frequency (MHz)
S22 (dB)
-40c +25c +85c
P1dB vs. Frequency
26
28
30
32
34
36
2110 2130 2150 2170
Frequency (MHz)
P1dB (dBm)
-40C +25C +85C
Noise Figure vs. Frequency
0
1
2
3
4
5
6
2110 2130 2150 2170
Frequency (MHz)
NF (dB)
-40C +25C +85C
ACPR vs. Channel Power
3GPP W-CDMA, Test Model 1 + 64 DPCH, ±5 MHz offset
-60
-55
-50
-45
-40
-35
22 23 24 25 26 27
Output Channel Power (dBm)
ACPR (dBc)
-40 C +25 C +85 C
freq = 2140 MHz
OIP3 vs. Temperature
40
42
44
46
48
50
-40 -15 10 35 60 85
Temperature (°C)
OIP3 (dBm)
freq = 2140, 2141 MHz
+18 dBm / tone
IMD products vs. Output Power
fundamental frequency = 2140, 2141 MHz; Temp = +25° C
-100
-80
-60
-40
3 6 9 12 15 18 21
Output Power (dBm)
IMD products (dBm)
IMD_Low
IMD_High
OIP3 vs. Output Power
fundamental frequency = 2140, 2141 MHz; Temp = +25° C
30
35
40
45
50
3 6 9 12 15 18 21
Output Power (dBm)
OIP3 (dBm)
Output Power / Gain vs. Input Power
frequency = 2140 MHz, Temp = -40° C
4
6
8
10
12
14
2 6 10 14 18 22 26
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Output Power / Gain vs. Input Power
frequency = 2140 MHz, Temp = +25° C
4
6
8
10
12
14
2 6 10 14 18 22 26
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Output Power / Gain vs. Input Power
frequency = 2140 MHz, Temp = +85° C
4
6
8
10
12
14
2 6 10 14 18 22 26
Input Power (dBm)
Gain (dB)
16
20
24
28
32
36
Output Power (dBm)
Output Power
Gain
Data Sheet: Rev A 7/18/12
- 9 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Reference Design: 2400 – 2500 MHz
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +9 V, Ids = 450 mA, 25 °C
Frequency
MHz
2400
2500
S21 – Gain
dB
12.1
12.0
S11 – Input Return Loss
dB
-13
-16
S22 – Output Return Loss
dB
-13
-17
Output P1dB
dBm
+33.5
Output IP3
(+18 dBm / tone, 1 MHz spacing)
dBm +46.8
Noise Figure
dB
4.6
The 2.4 – 2.5 GHz Reference Circuit is shown for design purposes only. An
evaluation board is not readily available for this application. The reader can
obtain any FP31QF evaluation board and modify it with the circuit shown to
achieve the performance shown in this reference design.
2.3 2.35 2.4 2.45 2.5 2.55 2.6
Frequency (GHz)
Measured S-Parameters
-25
-20
-15
-10
-5
0
5
10
15
(dB)
DB(|S[1,1]|) DB(|S[2,1]|) DB(|S[2,2]|)
ID=R1
R=5.1 Ohm
ID=C1
C=22 pF
ID=L2
L=12 nH
ID=C10
C=22 pF
ID=C11
C=1000 pF
ID=C12
C=1e5 pF
ID=C4
C=22 pF
ID=C8
C=22 pF
ID=C7
C=1000 pF
ID=C3
C=1.5 pF
ID=L1
L=12 nH
ID=R2
R=51 Ohm
ID=L3
L=3.3 nH
TLINP
ID=TL2
Z0=50 Ohm
L=180 mil
Eeff=3.46
Loss=0
F0=0 MHz
ID=C2
C=1.5 pF
TLINP
ID=TL1
Z0=50 Ohm
L=150 mil
Eeff=3.46
Loss=0
F0=0 MHz
1
2
NET="FP31QF"
-Vgg Vds=9V @ 450 mA
Data Sheet: Rev A 7/18/12
- 10 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Reference Design: 3500 MHz
The application circuit is matched for output power.
Typical RF Performance
Drain Bias = +9 V, Ids = 450 mA, 25 °C
Frequency
MHz
3500
S21 – Gain
dB
11.9
S11 – Input Return Loss
dB
-16
S22 – Output Return Loss
dB
-8.8
Output P1dB
dBm
+33.5
Output IP3
(+18 dBm / tone, 1 MHz spacing)
dBm +45
The 3.5 GHz Reference Circuit is shown for design purposes only. An
evaluation board is not readily available for this application. The reader can
obtain any FP31QF evaluation board and modify it with the circuit shown to
achieve the performance shown in this reference design.
3.3 3.35 3.4 3.45 3.5 3.55 3.6 3.65 3.7
Frequency (GHz)
Measured S-Parameters
-25
-20
-15
-10
-5
0
5
10
15
(dB)
DB(|S[1,1]|) DB(|S[2,1]|) DB(|S[2,2]|)
ID=C1
C=22 pF
ID=C2
C=0.9 pF
ID=C3
C=1 pF
ID=C4
C=22 pF
ID=C8
C=22 pF ID=C7
C=1000 pF
ID=C10
C=22 pF
ID=C12
C=1e4 pF
ID=C11
C=1000 pF
ID=L1
L=6.8 nH
ID=L2
L=6.8 nH
ID=L3
L=3.3 nH
ID=R1
R=2.2 Ohm
ID=R2
R=51 Ohm
TLIN
Z0=50 Ohm
EL=55 Deg
F0=3.5 GHz
TLIN
Z0=50 Ohm
EL=5.9 Deg
F0=3.5 GHz
TLIN
Z0=50 Ohm
EL=12.8 Deg
F0=3.5 GHz
1
2
NET="FP31QF"
-Vgg
Vds=9V @ 450 mA
Data Sheet: Rev A 7/18/12
- 11 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
Application Note: Constant-Current Active-Biasing
Special attention should be taken to properly bias the FP31QF.
Power supply sequencing is required to prevent the device from
operating at 1
00% Idss for a prolonged period of time and possibly
causing damage to the device. It is recommended that for the safest
operation, the negative supply be “first on and last off.” With a
negative gate voltage present, the drain voltage can then be applied
to the device. The gate voltage can then be adjusted to have the
device be used at the proper quiescent bias condition.
An optional active-
bias current mirror is recommended for use with
the application circuits shown this datasheet. Generally in a
laboratory environment, the gate voltage is adjusted until the drain
draws the recommended operating current. The gate voltage
required can vary slightly from device to device because of device
pinchoff variation, while also varying slightly over temperature.
The active-bias circuit, shown on the right, uses dual PNP transistors
to provide a constant drain current into the FP31QF, while also
eliminating the effects of pinchoff variation. This configuration is
best suited for applications where the intended output power level of
the amplifier is backed off at least 6 dB away from its compression
point. With the implementation of the circuit, lower P1dB values
may be measured for a Class-AB amplifier, where the device will
attempt to source more drain current while the circuit tries to provide
a constant drain current. The circuit should be connected directly in
line with where the voltage supplies would be normally connected
with the amplifier circuit, as shown the diagram. Any required
matching circuitry remains the same, although it is not shown in the
diagram. This recommended active-bias constant-
current circuit
adds 7 components to the parts count for implementation, but should
cost only an extra $0.144 to realize ($0.10 for U1, $0.0029 for R1,
R3, R4, R5, $0.024 for R2, and $0.0085 for C1).
Temperature compensation is achieved by tracking the voltage
variation with the temperature of the emitter-to-base junction of the
two PNP transistors. As a 1st order approximation, this is achieved
by using mat
ched transistors with approximately the same Ibe
current. Thus the transistor emitter voltage adjusts the HFET gate
voltage so that the device draws a constant current, regardless of the
temperature. A Rohm dual transistor - UMT1N - is recommended
for co
st, minimal board space requirements, and to minimize the
variation between the two transistors. Minimizing the variability
between the base-to-emitter junctions allow more accuracy in setting
the current draw. More details can be found in a separate application
note “Active-bias Constant-
current Source Recommended for
HFETs” found on the WJ website.
Parameter
FP31QF
Pos Supply, Vdd
+9 V
Neg Supply, Vgg
-5 V
Vds
+8.75. V
Ids
450 mA
R1
62 Ω
R2*
0.56 Ω
R3
2 kΩ
R4
1 kΩ
R5
1 kΩ
*R2 should be o
f size 1206 to dissipate 0.113 Watts.
This should be of 1% tolerance. Two 1.1 Ω resistors in
parallel of size 0805 can also be used.
6
1
5
2
4
3
R1
R2
R3
R4
1 k
Ω
-Vgg
+V
dd
U1
Rohm UMT1N
RF IN
RF OUT
DUT
M.N.
M.N.
HFET Application Circuit
R5
C1
.01
µ
F
Data Sheet: Rev A 7/18/12
- 12 of 12-
Disclaimer: Subject to change without notice
© 2012 TriQuint Semiconductor, Inc.
Connecting the Digital World to the Global Network®
FP31QF
2-Watt HFET
FP31QF-F Mechanical Information
This package is lead-free/RoHS-compliant. It is compatible with both lead-free (maximum 260 °C reflow temperature) and leaded
(maximum 245 °C reflow temperature) soldering processes. The plating material on the pins is annealed matte tin over copper.
Outline Drawing
Mounting Configuration / Land Pattern
Product Marking
The component will be lasermarked with a
“FP31FF” product label with an alphanumeric
lot code on the top surface of the package.
The obsolete tin-lead package is marked with
an “FP31QF” designator followed by an
alphanumeric lot code.
Tape and reel specifications for this part will
be located on the website in the “Application
Notes” section.
ESD / MSL Information
ESD Rating: Class 1C
Value: Passes 1000V to <2000V
Test: Human Body Model (HBM)
Standard: JEDEC Standard JESD22-A114
ESD Rating: Class IV
Value: Passes 1000V
Test: Charged Device Model (CDM)
Standard: JEDEC Standard JESD22-C101
MSL Rating: Level 2 at +260 °C convection reflow
Standard: JEDEC Standard J-STD-020
Functional Pin Layout
Pin
FUNCTION
3
Gate /RF Input
19
Drain / RF Output
The backside paddle is the Source and should be
grounded for thermal and electrical purposes. All
other pins should be grounded on the PCB.