19-3971; Rev 2; 10/07 KIT ATION EVALU LE B A IL A AV 6A, 2MHz Step-Down Regulator with Integrated Switches Features The MAX8646 high-efficiency switching regulator delivers up to 6A load current at output voltages from 0.6V to 0.9 x VIN. The IC operates from 2.35V to 3.6V, making it ideal for on-board point-of-load and postregulation applications. Total output error is less than 1% over load, line, and temperature ranges. The MAX8646 features fixed-frequency PWM mode operation with a switching frequency range of 500kHz to 2MHz set by an external resistor. High-frequency operation allows for an all-ceramic capacitor design. The high operating frequency also allows for small-size external components. The low-resistance on-chip nMOS switches ensure high efficiency at heavy loads while minimizing critical inductances, making the layout a much simpler task with respect to discrete solutions. Following a simple layout and footprint ensures first-pass success in new designs. The MAX8646 comes with a high bandwidth (> 14MHz) voltage-error amplifier. The voltage-mode control architecture and the voltage-error amplifier permit a type III compensation scheme to be utilized to achieve maximum loop bandwidth, up to 20% of the switching frequency. High loop bandwidth provides fast transient response, resulting in less required output capacitance and allowing for all-ceramic-capacitor designs. o Internal 23m RDS(ON) MOSFETs o Continuous 6A Output Current o 1% Output Accuracy over Load, Line, and Temperature o Operates from 2.35V to 3.6V Supply o Adjustable Output from 0.6V to (0.9 x VIN) o Soft-Start Reduces Inrush Supply Current o 500kHz to 2MHz Adjustable Switching Frequency o Compatible with Ceramic, Polymer, and Electrolytic Output Capacitors o VID-Selectable Output Voltages 0.6V, 0.7V, 0.8V, 1.0V, 1.2V, 1.5V, 1.8V, 2.0V, and 2.5V o Fully Protected Against Overcurrent and Overtemperature o Safe-Start into Prebiased Output o Sink/Source Current in DDR Applications o Lead-Free, 24-Pin, 4mm x 4mm Thin QFN Package The MAX8646 provides two tri-state logic inputs to select one of nine preset output voltages. The preset output voltages allow customers to achieve 1% output-voltage accuracy without using expensive 0.1% resistors. In addition, the output voltage can be set to any customer value by either using two external resistors at the feedback with 0.6V internal reference or applying an external reference voltage to the REFIN input. The MAX8646 offers programmable soft-start time using one capacitor to reduce input inrush current. The MAX8646 is available in a lead-free, 24-pin, 4mm x 4mm, thin QFN package. Ordering Information PART TEMP RANGE MAX8646ETG+ -40C to +85C PKG CODE 24 Thin QFN-EP* 4mm x 4mm T2444-4 +Denotes a lead-free package. *EP = Exposed pad. Typical Operating Circuit INPUT 2.4V, 3.6V IN EN BST OUTPUT 1.8V, 6A MAX8646 LX VDD OUT Applications POLs ASIC/CPU/DSP Core and I/O Voltages DDR Power Supplies Base-Station Power Supplies Telecom and Networking Power Supplies RAID Control Power Supplies PIN-PACKAGE PGND CTL1 FB CTL2 FREQ REFIN SS COMP VDD PREBIAS GND PWRGD Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX8646 General Description MAX8646 6A, 2MHz Step-Down Regulator with Integrated Switches ABSOLUTE MAXIMUM RATINGS IN, VDD, PWRGD to GND ......................................-0.3V to +4.5V COMP, FB, REFIN, OUT, CTL_, EN, SS, FREQ to GND...................-0.3V to (VDD + 0.3V) LX Current (Note 1) .....................................................-8A to +8A BST to LX..................................................................-0.3V to +4V PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70C) (derate 27.8mW/C above +70C) ..........................2222.2mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Note 1: LX has internal clamp diodes to GND and IN. Applications that forward bias these diodes should take care not to exceed the IC's package power dissipation limits. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = VDD = 3.3V, VFB = 0.5V, TA = -40C to +85C, typical values are at TA = +25C, circuit of Figure 1, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS 3.60 V IN/VDD IN and VDD Voltage Range 2.35 VIN = 2.5V 4 VIN = 3.3V 5.5 VIN = 2.5V 1.4 VIN = 3.3V 2 IN Supply Current fS = 1MHz, no load, (includes gate-drive current) VDD Supply Current fS = 1MHz Total Shutdown Current from IN and VDD VIN = VDD = VBST - VLX = 3.6V, VEN = 0V VDD Undervoltage Lockout Threshold VDD falling 2.3 13 VDD rising LX starts/stops switching 4.6 2 1.8 Deglitching 2.1 1.9 2 mA mA A V s BST BST Supply Current VBST = VDD = VIN = 3.6V, VLX = 3.6V or 0V, VEN = 0V TA = +25C 5 TA = +85C 10 A PWM COMPARATOR PWM Comparator Propagation Delay 10mV overdrive 20 ns VIN = 2.35V to 3.6V 2 V 1.4 V/s COMP COMP Clamp Voltage, High COMP Slew Rate PWM Ramp Amplitude COMP Shutdown Resistance From COMP to GND, VEN = VSS = 0V 1 V 8 ERROR AMPLIFIER Preset Output-Voltage Accuracy REFIN = SS FB Regulation Accuracy Using External Resistors CTL1 = CTL2 = GND FB to OUT Resistor All VID settings except CTL1 = CTL2 = GND Open-Loop Voltage Gain 1k from COMP to GND 2 -1 Select from Table 1 +1 % 0.594 0.600 0.606 V 8 11 k 5 115 _______________________________________________________________________________________ dB 6A, 2MHz Step-Down Regulator with Integrated Switches (VIN = VDD = 3.3V, VFB = 0.5V, TA = -40C to +85C, typical values are at TA = +25C, circuit of Figure 1, unless otherwise noted.) (Note 2) PARAMETER Error-Amplifier Unity-Gain Bandwidth Error-Amplifier Common-Mode Input Range Error-Amplifier Minimum Output Current FB Input Bias Current CONDITIONS Parallel 10k, 40pF from COMP to GND (Note 3) MIN TYP 14 26 MAX MHz VDD = 2.35V to 2.6V 0 VDD - 1.65 VDD = 2.6V to 3.6V 0 VDD - 1.7 VCOMP = 1V Sourcing 1000 Sinking VFB = 0.7, CTL1 = CTL2 = GND, TA = +25C V A -500 -200 UNITS -40 nA CTL_ CTL_ Input Bias Current VCTL_ = 0V -7 VCTL_ = VDD +7 Rising High-Z Threshold 0.75 VDD - 1.2 Falling Hysteresis A All VID transitions 50 V mV REFIN REFIN Input Bias Current VREFIN = 0.6V, TA = +25C -500 -100 nA VDD = 2.3V to 2.6V 0 VDD 1.65 VDD = 2.6V to 3.6V 0 VDD 1.7 CTL1 = CTL2 = GND, TA = +25C -3 +3 REFIN Common-Mode Range REFIN Offset Voltage V mV LX (All pins combined) LX On-Resistance, High Side ILX = -2A LX On-Resistance, Low Side ILX = 2A LX Current-Limit Threshold VIN = 2.5V, high-side sourcing VIN = VBST - VLX = 2.5V 27 VIN = VBST - VLX = 3.3V 26 VIN = 2.5V 24 VIN = 3.3V 23 8 TA = +25C LX Leakage Current VIN = 3.6V, VEN = VSS = 0V TA = +85C LX Switching Frequency VIN = 2.5V to 3.3V VLX = 0V 45 38 11 m m A -2 VLX = 3.6V +2 VLX = 0V 1 VLX = 3.6V A 1 RFREQ = 50k 0.9 1 1.1 RFREQ = 23.2k 1.8 2 2.2 MHz _______________________________________________________________________________________ 3 MAX8646 ELECTRICAL CHARACTERISTICS (continued) MAX8646 6A, 2MHz Step-Down Regulator with Integrated Switches ELECTRICAL CHARACTERISTICS (continued) (VIN = VDD = 3.3V, VFB = 0.5V, TA = -40C to +85C, typical values are at TA = +25C, circuit of Figure 1, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS Frequency Range MIN TYP 500 LX Minimum Off-Time VIN = 2.5V to 3.3V LX Maximum Duty Cycle RFREQ = 50k, VIN = 2.5V to 3.3V LX Minimum On-Time RFREQ = 50k, VIN = 2.5V to 3.3V 40 93 RMS LX Output Current MAX UNITS 2000 kHz 75 ns 96 % 80 ns 6 A ENABLE EN Input Logic Low, Falling 1.2 EN Input Logic High, Rising 1.7 EN Hysteresis EN, Input Current 0.7 1.4 200 VEN = 0V or 3.6V, VDD = 3.6V TA = +25C mV 1 TA = +85C V V 0.01 A SS SS Charging Current VSS = 0.45V 7 8 9 A 500 Thermal-Shutdown Threshold +165 C Thermal-Shutdown Hysteresis 20 C SS Discharge Resistance THERMAL SHUTDOWN POWER-GOOD (PWRGD) Power-Good Threshold Voltage VFB falling, 3mV hysteresis Power-Good Falling Edge Deglitch 87 90 93 % Clock cycles 48 PWRGD Output Voltage Low IPWRGD = 4mA 0.03 PWRGD Leakage Current VDD = VPWRGD = 3.6V, VFB = 0.9V 0.01 0.15 A V Current-Limit Startup Blanking 128 Clock cycles Restart Time 1024 Clock cycles OVERCURRENT LIMIT Note 2: Specifications are 100% production tested at TA = +25C. Limits over the operating temperature range are guaranteed by design and characterization. Note 3: Guaranteed by design. 4 _______________________________________________________________________________________ 6A, 2MHz Step-Down Regulator with Integrated Switches EFFICIENCY vs. OUTPUT CURRENT EFFICIENCY vs. OUTPUT CURRENT EFFICIENCY vs. OUTPUT CURRENT 95 95 90 VOUT = 2.5V 70 VOUT = 1.8V VOUT = 1.2V 60 85 80 VOUT = 1.5V VOUT = 1.8V 75 VOUT = 1.2V 70 50 VIN = VDD = 2.5V 60 10 0.1 FREQUENCY vs. INPUT VOLTAGE - 40C + 25C + 85C 1650 1500 1350 1200 - 40C + 25C + 85C 1050 VOUT = 1.2V VIN = 2.5V VDD = 3.3V 60 1 OUTPUT CURRENT (A) 0.1 10 1 OUTPUT CURRENT (A) 10 LOAD TRANSIENT MAX8646 toc06 0 VIN = VDD = 3.3V -0.05 OUTPUT VOLTAGE CHARGE (%) MAX8646 toc04 1800 75 LOAD REGULATION 1950 VOUT = 1.5V MAX8646 toc05 1 OUTPUT CURRENT (A) VOUT = 1.8V 80 65 VIN = VDD = 3.3V 0.1 85 70 65 40 FREQUENCY (kHz) EFFICIENCY (%) EFFICIENCY (%) EFFICIENCY (%) 90 80 MAX8646 toc03 90 100 MAX8646 toc02 100 MAX8646 toc01 100 VOUT = 2.5V -0.10 VIN = VDD = 3.3V AC-COUPLED 50mV/div VOUT VOUT = 1.8V -0.15 -0.20 VOUT = 1.2V -0.25 IOUT 1A/div -0.30 0A -0.35 900 -0.40 2.2 2.6 3.0 3.4 INPUT VOLTAGE (V) 3.8 0 SWITCHING WAVEFORMS 2 4 6 LOAD CURRENT (A) 40s/div 8 SHUTDOWN WAVEFORMS SOFT-START WAVEFORM MAX8646 toc07 MAX8646 toc09 MAX8646 toc08 2V/div AC-COUPLED VEN 20mV/div VOUT VEN 2V/div 0V 0V 2A/div ILX 2V/div 1V/div 0V VOUT 0V 0V 100ns/div 1V/div VOUT 0A VLX MAX8646 Typical Operating Characteristics (Typical values are: VIN = VDD = 3.3V; VOUT = 1.8V, RFREQ = 50k, IOUT = 6A, and TA = +25C, unless otherwise noted.) RLOAD = 0.5 RLOAD = 0.5 400s/div 10s/div _______________________________________________________________________________________ 5 Typical Operating Characteristics (continued) (Typical values are: VIN = VDD = 3.3V; VOUT = 1.8V, RFREQ = 50k, IOUT = 6A, and TA = +25C, unless otherwise noted.) CURRENT LIMIT vs. OUTPUT VOLTAGE INPUT CURRENT vs. INPUT VOLTAGE 7 8 CURRENT LIMIT (A) 6 5 4 3 2 1V/div 0V 7 6 IOUT 5A/div 5 0A 4 IIN 3 VEN = 0V 1 VOUT 1A/div 0A 2 2.2 2.4 2.6 2.8 3.0 3.2 INPUT VOLTAGE (V) 3.4 0.5 3.6 RMS INPUT CURRENT DURING SHORT-CIRCUIT vs. INPUT VOLTAGE (C4 = 0.022F) 0.40 0.35 0.30 0.25 0.20 0.15 0.10 VOUT = 0V 0.05 120 VOUT = 1.8V 6A LOAD 110 100 80 70 60 50 40 2.5 3.0 3.5 INPUT VOLTAGE (V) 0.64 0.63 0.62 0.61 0.60 0.59 0.58 30 0.57 MEASURED ON A MAX8646 EV KIT 10 2.0 400s/div FEEDBACK VOLTAGE vs. TEMPERATURE 90 20 0 2.5 FEEDBACK VOLTAGE (V) 0.45 1.5 2.0 OUTPUT VOLTAGE (V) EXPOSED PAD TEMPERATURE vs. AMBIENT TEMPERATURE EXPOSED PAD TEMPERATURE (C) MAX8646 toc13 0.50 1.0 MAX8646 toc15 0 MAX8646 toc14 INPUT CURRENT (A) 8 MAX8646 toc11 9 HICCUP CURRENT LIMIT MAX8646 toc12 9 MAX8646 toc10 10 RMS INPUT CURRENT (A) MAX8646 6A, 2MHz Step-Down Regulator with Integrated Switches 4.0 0.56 0 20 40 60 TEMPERATURE (C) 80 100 -40 -15 10 35 TEMPERATURE (C) STARTING INTO PREBIASED OUTPUT SOFT-START WITH REFIN MAX8646 toc17 MAX8646 toc16 2V/div IIN 1A/div VEN 0V 0A 0.5V/div 0V VREFIN VOUT 1V/div 0V VOUT 1V/div 0V VPWRGD 2V/div 0V 2V/div VPWRGD 0V 200s/div 100s/div CSS = 6800pF, CO = 122F, L = 0.56H, VOUT = 2.5V 6 _______________________________________________________________________________________ 60 85 6A, 2MHz Step-Down Regulator with Integrated Switches PIN NAME FUNCTION 1 PREBIAS 2 VDD Supply Voltage and Bypass Input. Connect VDD to IN with a 10 resistor. Connect a 1F ceramic capacitor from VDD to GND. 3, 4 CTL1, CTL2 Preset Output Voltage Selection Input. CTL1 and CTL2 set the output voltage to one of nine preset voltages. See Table 1 for preset voltages. 5 REFIN External Reference Input. Connect REFIN to SS to use the internal 0.6V reference. Connecting REFIN to an external reference voltage forces FB to regulate the voltage applied to REFIN. REFIN is internally pulled to GND when the IC is in shutdown mode. 6 SS Soft-Start Input. Connect a capacitor from SS to GND to set the startup time. See the Soft-Start and REFIN section for details on setting the soft-start time. 7 GND Leave Pin Unconnected to Prevent Discharging of Output Capacitor During Soft-Start. Connect to GND otherwise. See the Soft-Starting into a Prebiased Output section. Analog Circuit Ground Output of the Voltage-Error Amplifier. Connect the necessary compensation network from COMP to FB. COMP is internally pulled to GND when the IC is in shutdown mode. 8 COMP 9 FB Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set the output voltage from 0.6V to 90% of VIN. Connect FB through an RC network to the output when using CTL1 and CTL2 to select any of nine preset voltages. 10 OUT Output Voltage Sense. Connect to the output. Leave OUT unconnected when an external resistor-divider is used. 11 FREQ Oscillator Frequency Selection. Connect a resistor from FREQ to GND to select the switching frequency. 12 PWRGD 13 BST 14, 15, 16 LX 17-20 PGND 21, 22, 23 IN Power-Supply Input. Input supply range is from 2.35V to 3.6V. Bypass with 22F ceramic capacitance to PGND externally. See the Typical Application Circuit. 24 EN Enable Input. Logic input to enable/disable the MAX8646. -- EP Exposed Pad. Connect to a large ground plane to optimize thermal performance. Power-Good Output. Open-drain output that is high impedance when VFB 90% of VREFIN or 0.6V. PWRGD is internally pulled low when VFB falls below 90% of its regulation point. PWRGD is internally pulled low when the IC is in shutdown mode, VDD or VIN is below the UVLO threshold, or the IC is in thermal shutdown. High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1F capacitor. Inductor Connection. All LX pins are internally connected together. Connect all LX pins to the output inductor. LX is high impedance when the IC is in shutdown mode. Power Ground. Connect all PGND pins externally to the power ground plane. _______________________________________________________________________________________ 7 MAX8646 Pin Description 6A, 2MHz Step-Down Regulator with Integrated Switches MAX8646 Block Diagram VDD MAX8646 UVLO CIRCUITRY SHUTDOWN CONTROL EN CURRENT-LIMIT COMPARATOR BIAS GENERATOR LX ILIM THRESHOLD BST IN VOLTAGE REFERENCE SS BST CAPACITOR CHARGING SWITCH SOFT-START CONTROL LOGIC LX IN THERMAL SHUTDOWN REFIN PGND OUT ERROR AMPLIFIER 8k PWM COMPARATOR PREBIAS FB CTL1 CTL2 VID VOLTAGECONTROL CIRCUITRY FREQ 1VP-P OSCILLATOR COMP SHDN COMP LOW DETECTOR FB 0.9 x VREFIN 8 PWRGD _______________________________________________________________________________________ GND 6A, 2MHz Step-Down Regulator with Integrated Switches INPUT 2.4V TO 3.6V IN C6 22F C7 0.1F VDD R5 10 BST C10 0.1F L1 0.47H MAX8646 OUTPUT 1.8V, 6A LX VDD C5 1F OUT C8 22F x2 C3 680pF CTL2 C9 0.01F R3 432 CTL1 PGND EN FB FREQ C2 1500pF R2 3.57k REFIN R4 49.9k SS C1 33pF C4 0.022F COMP PREBIAS GND VDD R1 20k PWRGD Figure 1. MAX8646 1MHz, All-Ceramic-Capacitor Design with VOUT = 1.8V Detailed Description The MAX8646 high-efficiency, voltage-mode switching regulator is capable of delivering up to 6A of output current. The MAX8646 provides output voltages from 0.6V to 0.9 x VIN from 2.35V to 3.6V input supplies, making it ideal for on-board point-of-load applications. The output voltage accuracy is better than 1% over load, line, and temperature. The MAX8646 features a wide switching frequency range, allowing the user to achieve all-ceramic-capacitor designs and fast transient responses (see Figure 1). The high operating frequency minimizes the size of external components. The MAX8646 is available in a small (4mm x 4mm), lead-free, 24-pin thin QFN package. The REFIN function makes the MAX8646 an ideal candidate for DDR and tracking power supplies. Using internal lowRDS(ON) (23m) n-channel MOSFETs for both high- and low-side switches maintains high efficiency at both heavy-load and high-switching frequencies. The MAX8646 employs voltage-mode control architecture with a high bandwidth (> 14MHz) error amplifier. The voltage-mode control architecture allows up to 2MHz switching frequency, reducing board area. The op-amp voltage-error amplifier works with type III compensation to fully utilize the bandwidth of the high-frequency switching to obtain fast transient response. Adjustable soft-start time provides flexibilities to minimize input startup inrush current. An open-drain, power-good (PWRGD) output goes high when V FB reaches 90% of VREFIN or 0.54V. Controller Function The controller logic block is the central processor that determines the duty cycle of the high-side MOSFET under different line, load, and temperature conditions. Under normal operation, where the current-limit and temperature protection are not triggered, the controller logic block takes the output from the PWM comparator and generates the driver signals for both high-side and low-side MOSFETs. The break-before-make logic and the timing for charging the bootstrap capacitors are calculated by the controller logic block. The error signal from the voltage-error amplifier is compared with the ramp signal generated by the oscillator at the PWM comparator and, thus, the required PWM signal is produced. The high-side switch is turned on at the beginning of the oscillator cycle and turns off when the ramp _______________________________________________________________________________________ 9 MAX8646 Typical Application Circuit MAX8646 6A, 2MHz Step-Down Regulator with Integrated Switches voltage exceeds the VCOMP signal or the current-limit threshold is exceeded. The low-side switch is then turned on for the remainder of the oscillator cycle. Current Limit The internal, high-side MOSFET has a typical 11A peak current-limit threshold. When current flowing out of LX exceeds this limit, the high-side MOSFET turns off and the synchronous rectifier turns on. The synchronous rectifier remains on until the inductor current falls below the low-side current limit. This lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. The MAX8646 uses a hiccup mode to prevent overheating during short-circuit output conditions. During current limit if V FB drops below 420mV and stays below this level for 12s or more, the part enters hiccup mode. The high-side MOSFET and the synchronous rectifier are turned off and both COMP and REFIN are internally pulled low. If REFIN and SS are connected together, then both are pulled low. The part remains in this state for 1024 clock cycles and then attempts to restart for 128 clock cycles. If the fault causing current limit has cleared, the part resumes normal operation. Otherwise, the part reenters hiccup mode again. BST The gate-drive voltage for the high-side, n-channel switch is generated by a flying-capacitor boost circuit. The capacitor between BST and LX is charged from the VIN supply while the low-side MOSFET is on. When the low-side MOSFET is switched off, the voltage of the capacitor is stacked above LX to provide the necessary turn-on voltage for the high-side internal MOSFET. Frequency Select (FREQ) The switching frequency is resistor programmable from 500kHz to 2MHz. Set the switching frequency of the IC with a resistor (RFREQ) connected from FREQ to GND. RFREQ is calculated as: R FREQ = where fS is the desired switching frequency in Hz. Power-Good Output (PWRGD) PWRGD is an open-drain output that goes high impedance when VFB is above 0.9 x VREFIN. PWRGD pulls low when VFB is below 90% of its regulation for at least 48 clock cycles. PWRGD is low during shutdown. Programming the Output Voltage (CTL1, CTL2) Soft-Start and REFIN The MAX8646 utilizes an adjustable soft-start function to limit inrush current during startup. An 8A (typ) current source charges an external capacitor connected to SS. The soft-start time is adjusted by the value of the external capacitor from SS to GND. The required capacitance value is determined as: C= 8A x t SS 0.6V where tSS is the required soft-start time in seconds. The MAX8646 also features an external reference input (REFIN). The IC regulates FB to the voltage applied to REFIN. The internal soft-start is not available when using an external reference. A method of soft-start when using an external reference is shown in Figure 2. Connect REFIN to SS to use the internal 0.6V reference. Undervoltage Lockout (UVLO) 49.9k 1 x ( - 0.05s) 0.95s fS As shown in Table 1, the output voltage is pin programmable by the logic states of CTL1 and CTL2. CTL1 and CTL2 are tri-level inputs: VDD, unconnected, and GND. The logic states of CTL1 and CTL2 should be programmed only before power-up. Once the part is enabled, CTL1 and CTL2 should not be changed. If the output voltage needs to be reprogrammed, cycle power or EN and reprogram before enabling. R1 REFIN R2 C MAX8646 The UVLO circuitry inhibits switching when VDD is below 2V (typ). Once VDD rises above 2V (typ), UVLO clears and the soft-start function activates. A 100mV hysteresis is built in for glitch immunity. Figure 3 is the type III compensation network. Figure 2. Typical Soft-Start Implementation with External Reference 10 ______________________________________________________________________________________ 6A, 2MHz Step-Down Regulator with Integrated Switches Table 1. CTL1 and CTL2 Output Voltage Selection CTL1 CTL2 GND GND 0.6 Thermal Protection VDD VDD 0.7 Thermal-overload protection limits total power dissipation in the device. When the junction temperature exceeds TJ = +165C, a thermal sensor forces the device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 20C, causing a pulsed output during continuous overload conditions. The soft-start sequence begins after recovery from a thermal-shutdown condition. GND Unconnected 0.8 GND VDD 1.0 Unconnected GND 1.2 Unconnected Unconnected 1.5 Unconnected VDD 1.8 VDD GND 2.0 VDD Unconnected 2.5 MAX8646 Shutdown Mode Drive EN to GND to shut down the IC and reduce quiescent current to less than 12A. During shutdown, the LX is high impedance. Drive EN high to enable the MAX8646. VOUT (V) Applications Information IN and VDD Decoupling To decrease the noise effects due to the high switching frequency and maximize the output accuracy of the MAX8646, decouple VIN with a 22F capacitor from VIN to PGND. Also decouple VDD with a 1F from VDD to GND. Place these capacitors as close to the IC as possible. where the output ripple due to output capacitance, ESR, and ESL is: IP-P VRIPPLE(C) = 8 x COUT x fS VRIPPLE(ESR) = IP-P x ESR Inductor Selection I VRIPPLE(ESL) = P-P x ESL t ON Choose an inductor with the following equation: L= VOUT x (VIN - VOUT ) fS x VIN x LIR x IOUT(MAX) where LIR is the ratio of the inductor ripple current to full load current at the minimum duty cycle. Choose LIR between 20% to 40% for best performance and stability. Use an inductor with the lowest possible DC resistance that fits in the allotted dimensions. Powdered iron ferrite core types are often the best choice for performance. With any core material, the core must be large enough not to saturate at the current limit of the MAX8646. Output-Capacitor Selection The key selection parameters for the output capacitor are capacitance, ESR, ESL, and voltage-rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DC-DC converter. The output ripple occurs due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitor's ESR, and the voltage drop due to the capacitor's ESL. Calculate the output voltage ripple due to the output capacitance, ESR, and ESL: VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL) or: I VRIPPLE(ESL) = P-P x ESL t OFF or whichever is larger. The peak inductor current (IP-P) is: V - VOUT V IP-P = IN x OUT fS x L VIN Use these equations for initial capacitor selection. Determine final values by testing a prototype or an evaluation circuit. A smaller ripple current results in less output-voltage ripple. Since the inductor ripple current is a factor of the inductor value, the output voltage ripple decreases with larger inductance. Use ceramic capacitors for low ESR and low ESL at the switching frequency of the converter. The ripple voltage due to ESL is negligible when using ceramic capacitors. Load-transient response depends on the selected output capacitance. During a load transient, the output instantly changes by ESR x ILOAD. Before the controller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time, the controller responds by regu- ______________________________________________________________________________________ 11 MAX8646 6A, 2MHz Step-Down Regulator with Integrated Switches lating the output voltage back to its predetermined value. The controller response time depends on the closed-loop bandwidth. A higher bandwidth yields a faster response time, preventing the output from deviating further from its regulating value. See the Compensation Design section for more details. Input-Capacitor Selection The input capacitor reduces the current peaks drawn from the input power supply and reduces switching noise in the IC. The total input capacitance must be equal or greater than the value given by the following equation to keep the input-ripple voltage within specs and minimize the high-frequency ripple current being fed back to the input source: CIN _ MIN = D x TS x IOUT VIN - RIPPLE where VIN-RIPPLE is the maximum allowed input ripple voltage across the input capacitors and is recommended to be less than 2% of the minimum input voltage. D is the duty cycle (VOUT/VIN) and TS is the switching period (1/fS). The impedance of the input capacitor at the switching frequency should be less than that of the input source so high-frequency switching currents do not pass through the input source but are instead shunted through the input capacitor. High source impedance requires high input capacitance. The input capacitor must meet the ripple current requirement imposed by the switching currents. The RMS input ripple current is given by: IRIPPLE = ILOAD x VOUT x (VIN - VOUT ) VIN where IRIPPLE is the input RMS ripple current. Compensation Design The power transfer function consists of one double pole and one zero. The double pole is introduced by the output filtering inductor L and the output filtering capacitor CO. The ESR of the output filtering capacitor determines the zero. The double pole and zero frequencies are given as follows: fP1_ LC = fP2 _ LC = 1 R + ESR 2 x L x C O x O RO + RL fZ _ ESR = 1 2 x ESR x CO DCR and the internal switch resistance, RDS(ON). A typical value for RDS(ON) is 23m. RO is the output load resistance, which is equal to the rated output voltage divided by the rated output current. ESR is the total equivalent series resistance of the output filtering capacitor. If there is more than one output capacitor of the same type in parallel, the value of the ESR in the above equation is equal to that of the ESR of a single output capacitor divided by the total number of output capacitors. The high switching frequency range of the MAX8646 allows the use of ceramic output capacitors. Since the ESR of ceramic capacitors is typically very low, the frequency of the associated transfer function zero is higher than the unity-gain crossover frequency, fC, and the zero cannot be used to compensate for the double pole created by the output filtering inductor and capacitor. The double pole produces a gain drop of 40dB/decade and a phase shift of 180/decade. The error amplifier must compensate for this gain drop and phase shift to achieve a stable high-bandwidth closed-loop system. Therefore, use type III compensation as shown in Figures 3 and 4. Type III compensation possesses three poles and two zeros with the first pole, fP1_EA, located at zero frequency (DC). Locations of other poles and zeros of the type III compensation are given by: f Z1_ EA = 1 2 x R1 x C1 f Z2 _ EA = 1 2 x R3 x C3 f P3 _ EA = 1 2 x R1 x C2 f P2 _ EA = 1 2 x R2 x C3 The above equations are based on the assumptions that C1>>C2, and R3>>R2, which are true in most applications. Placements of these poles and zeros are determined by the frequencies of the double pole and ESR zero of the power transfer function. It is also a function of the desired close-loop bandwidth. The following section outlines the step-by-step design procedure to calculate the required compensation components for the MAX8646. When the output voltage of the MAX8646 is programmed to a preset voltage, R3 is internal to the IC and R4 does not exist (Figure 3b). When externally programming the MAX8646 (Figure 3a), the output voltage is determined by: where RL is equal to the sum of the output inductor's 12 ______________________________________________________________________________________ 6A, 2MHz Step-Down Regulator with Integrated Switches L VOUT LX COUT MAX8646 R3 OUT R2 R1 = C3 C3 = FB CTL1 C1 R1 CTL2 COMP R4 VOUT LX COUT R2 OUT R3 8k C3 FB VOLTAGE SELECT CTL1 R1 C1 COMP CTL2 L x CO x (RO + ESR) x L x CO x (RO + ESR) 0.8 x C1 1 0.8 x R 3 R2 = a) EXTERNAL RESISTOR DIVIDER MAX8646 x RL + RO RL + RO Setting the second compensation pole, f P2_EA , at fZ_ESR yields: C2 L 1 C2 b) INTERNAL PRESET VOLTAGES Figure 3. Type III Compensation Network CO x ESR C3 Set the third compensation pole at 1/2 of the switching frequency. Calculate C2 as follows: 1 x R1 x fS x 2 The above equations provide application compensation when the zero-cross frequency is significantly higher than the double-pole frequency. When the zero-cross frequency is near the double-pole frequency, the actual zero-cross frequency is higher than the calculated frequency. In this case, lowering the value of R1 reduces the zero-cross frequency. Also, set the third pole of the type III compensation close to the switching frequency if the zero-cross frequency is above 200kHz to boost the phase margin. The recommended range for R3 is 2k to 10k. Note that the loop compensation remains unchanged if only R4's resistance is altered to set different outputs. C2 = Soft-Starting into a Prebiased Output R4 = 0.6 x R3 (VOUT - 0.6) The zero-cross frequency of the close-loop, fC should be between 10% and 20% of the switching frequency, fS. A higher zero-cross frequency results in faster transient response. Once fC is chosen, C1 is calculated from the following equation: C1 = 1.5625 x VIN R 2 x x R3 x (1 + L ) x fC RO Due to the underdamped nature of the output LC double pole, set the two zero frequencies of the type III compensation less than the LC double-pole frequency to provide adequate phase boost. Set the two zero fre- When the PREBIAS pin is left unconnected, the MAX8646 is capable of soft-starting up into a prebiased output without discharging the output capacitor. This type of operation is also termed monotonic startup. However, in order to avoid output voltage glitches during soft-start it should be ensured that the inductor current is in continuous conduction mode during the end of the soft-start period. this is done by satisfying the following equation: V I CO x O P-P 2 t SS where CO is the output capacitor, VO is the output voltage, tSS is the soft-start time set by the soft-start capacitor CSS, and IP-P is the peak inductor ripple current (as defined in the Output-Capacitor Selection section). Depending on the application, one of these parameters may drive the selection of the others. See Starting into ______________________________________________________________________________________ 13 MAX8646 quencies to 80% of the LC double-pole frequency. Hence: OPEN-LOOP GAIN THIRD POLE DOUBLE POLE GAIN (dB) SECOND POLE 1) Connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane. 2) Place capacitors on VDD, VIN, and SS as close as possible to the IC and its corresponding pin using direct traces. Keep power ground plane (connected to PGND) and signal ground plane (connected to GND) separate. 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current short and minimize the loop area formed by LX, the output capacitors, and the input capacitors. 14 LX BST PGND 16 15 14 13 PGND 19 12 PWRGD PGND 20 11 FREQ IN 21 10 OUT MAX8646 9 FB IN 23 8 COMP EN 24 7 GND IN 22 1 2 3 4 5 6 SS + CTL1 Careful PCB layout is critical to achieve clean and stable operation. It is highly recommended to duplicate the MAX8646 EV kit layout for optimum performance. If deviation is necessary, follow these guidelines for good PCB layout: 17 VDD PCB Layout Considerations and Thermal Performance 18 PREBIAS Prebiased Output waveforms in the Typical Operating Characteristics section for an example selection of the above parameters. Connecting the PREBIAS pin to the GND disables the prebias soft-start feature and causes the MAX8646 to discharge any voltage present on the output capacitors and then commence its soft-start. PGND TOP VIEW Figure 4. Type III Compensation Illustration LX Pin Configuration FIRST AND SECOND ZEROS LX POWER-STAGE TRANSFER FUNCTION CTL2 COMPENSATION TRANSFER FUNCTION 4) Connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency and long-term reliability. 5) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the IC as possible. 6) Route high-speed switching nodes, such as LX, away from sensitive analog areas (FB, COMP). REFIN MAX8646 6A, 2MHz Step-Down Regulator with Integrated Switches THIN QFN Chip Information PROCESS: BiCMOS ______________________________________________________________________________________ 6A, 2MHz Step-Down Regulator with Integrated Switches 24L QFN THIN.EPS ______________________________________________________________________________________ 15 MAX8646 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) MAX8646 6A, 2MHz Step-Down Regulator with Integrated Switches Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Revision History Pages changed at Rev 1: 1, 5, 6, 7, 10-14 Pages changed at Rev 2: 1, 2, 4, 8, 9, 13, 15, 16 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products. Inc.