General Description
The MAX8646 high-efficiency switching regulator deliv-
ers up to 6A load current at output voltages from 0.6V
to 0.9 x VIN. The IC operates from 2.35V to 3.6V, mak-
ing it ideal for on-board point-of-load and postregula-
tion applications. Total output error is less than ±1%
over load, line, and temperature ranges.
The MAX8646 features fixed-frequency PWM mode
operation with a switching frequency range of 500kHz
to 2MHz set by an external resistor. High-frequency
operation allows for an all-ceramic capacitor design.
The high operating frequency also allows for small-size
external components.
The low-resistance on-chip nMOS switches ensure high
efficiency at heavy loads while minimizing critical induc-
tances, making the layout a much simpler task with
respect to discrete solutions. Following a simple layout
and footprint ensures first-pass success in new designs.
The MAX8646 comes with a high bandwidth (> 14MHz)
voltage-error amplifier. The voltage-mode control archi-
tecture and the voltage-error amplifier permit a type III
compensation scheme to be utilized to achieve maxi-
mum loop bandwidth, up to 20% of the switching fre-
quency. High loop bandwidth provides fast transient
response, resulting in less required output capacitance
and allowing for all-ceramic-capacitor designs.
The MAX8646 provides two tri-state logic inputs to
select one of nine preset output voltages. The preset
output voltages allow customers to achieve ±1% out-
put-voltage accuracy without using expensive 0.1%
resistors. In addition, the output voltage can be set to
any customer value by either using two external resis-
tors at the feedback with 0.6V internal reference or
applying an external reference voltage to the REFIN
input. The MAX8646 offers programmable soft-start
time using one capacitor to reduce input inrush current.
The MAX8646 is available in a lead-free, 24-pin, 4mm x
4mm, thin QFN package.
Applications
POLs
ASIC/CPU/DSP Core and I/O Voltages
DDR Power Supplies
Base-Station Power Supplies
Telecom and Networking Power Supplies
RAID Control Power Supplies
Features
oInternal 23mΩRDS(ON) MOSFETs
oContinuous 6A Output Current
o±1% Output Accuracy over Load, Line,
and Temperature
oOperates from 2.35V to 3.6V Supply
oAdjustable Output from 0.6V to (0.9 x VIN)
oSoft-Start Reduces Inrush Supply Current
o500kHz to 2MHz Adjustable Switching Frequency
oCompatible with Ceramic, Polymer, and
Electrolytic Output Capacitors
oVID-Selectable Output Voltages
0.6V, 0.7V, 0.8V, 1.0V, 1.2V, 1.5V, 1.8V, 2.0V,
and 2.5V
oFully Protected Against Overcurrent and
Overtemperature
oSafe-Start into Prebiased Output
oSink/Source Current in DDR Applications
oLead-Free, 24-Pin, 4mm x 4mm Thin QFN Package
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
________________________________________________________________
Maxim Integrated Products
1
OUTPUT
1.8V, 6A
INPUT
2.4V, 3.6V
BST
LX
OUT
IN
EN
VDD
CTL1
CTL2
PGND
FB
VDD
COMP
PWRGD
FREQ
REFIN
SS
GND
PREBIAS
MAX8646
Typical Operating Circuit
Ordering Information
19-3971; Rev 2; 10/07
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART TEMP
RANGE PIN-PACKAGE PKG
CODE
MAX8646ETG+ -40°C to +85°C 24 Thin QFN-EP*
4mm x 4mm T2444-4
+
Denotes a lead-free package.
*
EP = Exposed pad.
Pin Configuration appears at end of data sheet.
EVALUATION KIT
AVAILABLE
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN = VDD = 3.3V, VFB = 0.5V, TA= -40°C to +85°C, typical values are at TA= +25°C, circuit of Figure 1, unless otherwise noted.)
(Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN, VDD, PWRGD to GND ......................................-0.3V to +4.5V
COMP, FB, REFIN, OUT,
CTL_, EN, SS, FREQ to GND...................-0.3V to (VDD + 0.3V)
LX Current (Note 1) .....................................................-8A to +8A
BST to LX..................................................................-0.3V to +4V
PGND to GND .......................................................-0.3V to +0.3V
Continuous Power Dissipation (TA= +70°C)
(derate 27.8mW/°C above +70°C)..........................2222.2mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: LX has internal clamp diodes to GND and IN. Applications that forward bias these diodes should take care not to exceed
the IC’s package power dissipation limits.
PARAMETER CONDITIONS MIN TYP MAX UNITS
IN/VDD
IN and VDD Voltage Range 2.35 3.60 V
VIN = 2.5V 4 4.6
IN Supply Current fS = 1MHz, no load,
(includes gate-drive current) VIN = 3.3V 5.5 mA
VIN = 2.5V 1.4 2.3
VDD Supply Current fS = 1MHz VIN = 3.3V 2 mA
Total Shutdown Current from IN
and VDD VIN = VDD = VBST - VLX = 3.6V, VEN = 0V 13 µA
VDD rising 2 2.1
VDD falling 1.8 1.9 V
VDD Undervoltage Lockout
Threshold LX starts/stops switching
Deglitching 2 µs
BST
TA = +25°C 5
BST Supply Current VBST = VDD = VIN = 3.6V,
VLX = 3.6V or 0V, VEN = 0V TA = +85°C 10 µA
PWM COMPARATOR
PWM Comparator Propagation
Delay 10mV overdrive 20 ns
COMP
COMP Clamp Voltage, High VIN = 2.35V to 3.6V 2 V
COMP Slew Rate 1.4 V/µs
PWM Ramp Amplitude 1V
COMP Shutdown Resistance From COMP to GND, VEN = VSS = 0V 8 Ω
ERROR AMPLIFIER
Preset Output-Voltage Accuracy REFIN = SS -1
Select
from
Table 1
+1 %
FB Regulation Accuracy Using
External Resistors CTL1 = CTL2 = GND 0.594 0.600 0.606 V
FB to OUT Resistor All VID settings except CTL1 = CTL2 = GND 5 8 11 kΩ
Open-Loop Voltage Gain 1kΩ from COMP to GND 115 dB
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = 3.3V, VFB = 0.5V, TA= -40°C to +85°C, typical values are at TA= +25°C, circuit of Figure 1, unless otherwise noted.)
(Note 2)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Error-Amplifier Unity-Gain
Bandwidth Parallel 10kΩ, 40pF from COMP to GND (Note 3) 14 26 MHz
VDD = 2.35V to 2.6V 0 VDD - 1.65
Error-Amplifier Common-Mode
Input Range VDD = 2.6V to 3.6V 0 VDD - 1.7 V
Sourcing 1000
Error-Amplifier Minimum Output
Current VCOMP = 1V Sinking -500 µA
FB Input Bias Current VFB = 0.7, CTL1 = CTL2 = GND, TA = +25°C -200 -40 nA
CTL_
VCTL_ = 0V -7
CTL_ Input Bias Current VCTL_ = VDD +7 µA
Rising 0.75
High-Z Threshold Falling V
D D - 1.2 V
Hysteresis All VID transitions 50 mV
REFIN
REFIN Input Bias Current VREFIN = 0.6V, TA = +25°C -500 -100 nA
VDD = 2.3V to 2.6V 0 VDD -
1.65
REFIN Common-Mode Range
VDD = 2.6V to 3.6V 0 VDD -
1.7
V
REFIN Offset Voltage CTL1 = CTL2 = GND, TA = +25°C -3 +3 mV
LX (All pins combined)
VIN = VBST - VLX = 2.5V 27
LX On-Resistance, High Side ILX = -2A VIN = VBST - VLX = 3.3V 26 45 mΩ
VIN = 2.5V 24
LX On-Resistance, Low Side ILX = 2A VIN = 3.3V 23 38 mΩ
LX Current-Limit Threshold VIN = 2.5V, high-side sourcing 8 11 A
VLX = 0V -2
TA = +25°C VLX = 3.6V +2
VLX = 0V 1
LX Leakage Current VIN = 3.6V, VEN = VSS = 0V
TA = +85°C VLX = 3.6V 1
µA
RFREQ = 50kΩ0.9 1 1.1
LX Switching Frequency VIN = 2.5V to 3.3V RFREQ = 23.2kΩ1.8 2 2.2 MHz
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
4 _______________________________________________________________________________________
PARAMETER CONDITIONS MIN TYP MAX UNITS
Frequency Range 500 2000 kHz
LX Minimum Off-Time VIN = 2.5V to 3.3V 40 75 ns
LX Maximum Duty Cycle RFREQ = 50kΩ, VIN = 2.5V to 3.3V 93 96 %
LX Minimum On-Time RFREQ = 50kΩ, VIN = 2.5V to 3.3V 80 ns
RMS LX Output Current 6A
ENABLE
EN Input Logic Low, Falling 1.2 0.7 V
EN Input Logic High, Rising 1.7 1.4 V
EN Hysteresis 200 mV
TA = +25°C 1
EN, Input Current VEN = 0V or 3.6V,
VDD = 3.6V TA = +85°C 0.01 µA
SS
SS Charging Current VSS = 0.45V 7 8 9 µA
SS Discharge Resistance 500 Ω
THERMAL SHUTDOWN
Thermal-Shutdown Threshold +165 °C
Thermal-Shutdown Hysteresis 20 °C
POWER-GOOD (PWRGD)
Power-Good Threshold Voltage VFB falling, 3mV hysteresis 87 90 93 %
Power-Good Falling Edge
Deglitch 48 Clock
cycles
PWRGD Output Voltage Low IPWRGD = 4mA 0.03 0.15 V
PWRGD Leakage Current VDD = VPWRGD = 3.6V, VFB = 0.9V 0.01 µA
OVERCURRENT LIMIT
Current-Limit Startup Blanking 128 Clock
cycles
Restart Time 1024 Clock
cycles
Note 2: Specifications are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by
design and characterization.
Note 3: Guaranteed by design.
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VDD = 3.3V, VFB = 0.5V, TA= -40°C to +85°C, typical values are at TA= +25°C, circuit of Figure 1, unless otherwise noted.)
(Note 2)
Typical Operating Characteristics
(Typical values are: VIN = VDD = 3.3V; VOUT = 1.8V, RFREQ = 50kΩ, IOUT = 6A, and TA = +25°C, unless otherwise noted.)
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
_______________________________________________________________________________________
5
EFFICIENCY vs. OUTPUT CURRENT
OUTPUT CURRENT (A)
EFFICIENCY (%)
MAX8646 toc01
40
50
60
70
80
90
100
0.1 1 10
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VIN = VDD = 3.3V
EFFICIENCY vs. OUTPUT CURRENT
OUTPUT CURRENT (A)
EFFICIENCY (%)
MAX8646 toc02
60
65
70
75
80
85
90
95
100
0.1 1 10
VIN = VDD = 2.5V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 1.5V
EFFICIENCY vs. OUTPUT CURRENT
OUTPUT CURRENT (A)
EFFICIENCY (%)
MAX8646 toc03
60
65
70
75
80
85
90
95
100
0.1 1 10
VOUT = 1.8V
VOUT = 1.2V
VOUT = 1.5V
VIN = 2.5V
VDD = 3.3V
FREQUENCY vs. INPUT VOLTAGE
INPUT VOLTAGE (V)
FREQUENCY (kHz)
MAX8646 toc04
2.2 2.6 3.0 3.4 3.8
900
1050
1200
1350
1500
1650
1800
1950
+ 25°C
- 40°C+ 25°C+ 85°C
+ 85°C
- 40°C
LOAD REGULATION
LOAD CURRENT (A)
OUTPUT VOLTAGE CHARGE (%)
MAX8646 toc05
02468
-0.40
-0.35
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0
VOUT = 1.8V
VOUT = 1.2V
VOUT = 2.5V
VIN = VDD = 3.3V
LOAD TRANSIENT
40µs/div
MAX8646 toc06
IOUT
VOUT
1A/div
0A
AC-COUPLED
50mV/div
VIN = VDD = 3.3V
SWITCHING WAVEFORMS
100ns/div
MAX8646 toc07
VLX
VOUT
ILX
2V/div
2A/div
0V
0A
AC-COUPLED
20mV/div
SOFT-START WAVEFORM
400µs/div
MAX8646 toc08
VOUT
VEN
1V/div
0V
0V
2V/div
RLOAD = 0.5Ω
SHUTDOWN WAVEFORMS
10µs/div
MAX8646 toc09
VOUT
VEN
1V/div
0V
0V
2V/div
RLOAD = 0.5Ω
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Typical values are: VIN = VDD = 3.3V; VOUT = 1.8V, RFREQ = 50kΩ, IOUT = 6A, and TA = +25°C, unless otherwise noted.)
INPUT CURRENT vs. INPUT VOLTAGE
INPUT VOLTAGE (V)
INPUT CURRENT (µA)
MAX8646 toc10
2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
0
1
2
3
4
5
6
7
8
9
10
VEN = 0V
CURRENT LIMIT vs. OUTPUT VOLTAGE
OUTPUT VOLTAGE (V)
CURRENT LIMIT (A)
MAX8646 toc11
0.5 1.0 1.5 2.0 2.5
2
3
4
5
6
7
8
9
400µs/div
MAX8646 toc12
IIN
IOUT
VOUT
5A/div
1A/div
1V/div
0A
0A
0V
HICCUP CURRENT LIMIT
RMS INPUT CURRENT DURING SHORT-CIRCUIT
vs. INPUT VOLTAGE (C4 = 0.022µF)
INPUT VOLTAGE (V)
RMS INPUT CURRENT (A)
MAX8646 toc13
2.0 2.5 3.0 3.5 4.0
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
VOUT = 0V
EXPOSED PAD TEMPERATURE
vs. AMBIENT TEMPERATURE
TEMPERATURE (°C)
EXPOSED PAD TEMPERATURE (°C)
MAX8646 toc14
0 20406080100
10
20
30
40
50
60
70
80
90
100
110
120
VOUT = 1.8V
6A LOAD
MEASURED ON A MAX8646 EV KIT
FEEDBACK VOLTAGE vs. TEMPERATURE
TEMPERATURE (°C)
FEEDBACK VOLTAGE (V)
MAX8646 toc15
-40 -15 10 35 60 85
0.56
0.57
0.58
0.59
0.60
0.61
0.62
0.63
0.64
STARTING INTO PREBIASED OUTPUT
100µs/div
CSS = 6800pF, CO = 122µF, L = 0.56µH, VOUT = 2.5V
MAX8646 toc17
2V/div
2V/div
VEN
VOUT
VPWRGD
0V
0V
1V/div
0V
SOFT-START WITH REFIN
200µs/div
MAX8646 toc16
VPWRGD
VOUT
VREFIN
IIN
1V/div
2V/div
1A/div
0V
0V
0A
0.5V/div
0V
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
_______________________________________________________________________________________ 7
Pin Description
PIN NAME FUNCTION
1 PREBIAS Leave Pin Unconnected to Prevent Discharging of Output Capacitor During Soft-Start. Connect to GND
otherwise. See the Soft-Starting into a Prebiased Output section.
2V
DD Supply Voltage and Bypass Input. Connect VDD to IN with a 10Ω resistor. Connect a 1µF ceramic
capacitor from VDD to GND.
3, 4 CTL1,
CTL2
Preset Output Voltage Selection Input. CTL1 and CTL2 set the output voltage to one of nine preset
voltages. See Table 1 for preset voltages.
5 REFIN
External Reference Input. Connect REFIN to SS to use the internal 0.6V reference. Connecting REFIN to an
external reference voltage forces FB to regulate the voltage applied to REFIN. REFIN is internally pulled to
GND when the IC is in shutdown mode.
6SS
Soft-Start Input. Connect a capacitor from SS to GND to set the startup time. See the Soft-Start and REFIN
section for details on setting the soft-start time.
7 GND Analog Circuit Ground
8 COMP Output of the Voltage-Error Amplifier. Connect the necessary compensation network from COMP to FB.
COMP is internally pulled to GND when the IC is in shutdown mode.
9FB
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set
the output voltage from 0.6V to 90% of VIN. Connect FB through an RC network to the output when using
CTL1 and CTL2 to select any of nine preset voltages.
10 OUT Output Voltage Sense. Connect to the output. Leave OUT unconnected when an external resistor-divider
is used.
11 FREQ Oscillator Frequency Selection. Connect a resistor from FREQ to GND to select the switching frequency.
12 PWRGD
P ow er - G ood O utp ut. O p en- d r ai n outp ut that i s hi g h i m p ed ance w hen V
F B ≥ 90% of V
R E F IN
or 0.6V . P W RGD i s
i nter nal l y p ul l ed l ow w hen V
F B fal l s b el ow 90% of i ts r eg ul ati on p oi nt. P W RG D i s i nter nal l y p ul l ed l ow w hen the
IC i s i n shutd ow n m od e, V
D D
or V
I N
i s b el ow the U V LO thr eshol d , or the IC i s i n ther m al shutd ow n.
13 BST High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF capacitor.
14, 15, 16 LX Inductor Connection. All LX pins are internally connected together. Connect all LX pins to the output
inductor. LX is high impedance when the IC is in shutdown mode.
17–20 PGND Power Ground. Connect all PGND pins externally to the power ground plane.
21, 22,
23 IN Power-Supply Input. Input supply range is from 2.35V to 3.6V. Bypass with 22µF ceramic capacitance to
PGND externally. See the Typical Application Circuit.
24 EN Enable Input. Logic input to enable/disable the MAX8646.
— EP Exposed Pad. Connect to a large ground plane to optimize thermal performance.
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
8 _______________________________________________________________________________________
Block Diagram
CONTROL
LOGIC
IN
LX
PGND
PREBIAS
IN
BST
THERMAL
SHUTDOWN
SOFT-START
VOLTAGE
REFERENCE
BIAS
GENERATOR
OSCILLATOR
1VP-P
SHUTDOWN
CONTROL
UVLO
CIRCUITRY
VDD
SHDN
FB
0.9 x VREFIN
SS
FB
COMP
GND
PWRGD
FREQ
ERROR
AMPLIFIER PWM
COMPARATOR
CURRENT-LIMIT
COMPARATOR
ILIM THRESHOLD
BST CAPACITOR
CHARGING SWITCH
LX
COMP LOW
DETECTOR
EN
REFIN
VID
VOLTAGE-
CONTROL
CIRCUITRY
OUT
CTL2
CTL1
8kΩ
MAX8646
MAX8646
C10
0.1µF
C6
22µFOUTPUT
1.8V, 6A
INPUT
2.4V TO 3.6V
C7
0.1µF
C5
1µF
R5
10Ω
VDD
BST
LX
OUT
IN
VDD
CTL2
CTL1
PGND
FB
C1
33pF
C2
1500pF
VDD
R1
20kΩ
R2
3.57kΩ
COMP
L1
0.47µH
C3
680pF
C4
0.022µF
R4
49.9kΩ
C8
22µF
x2
C9
0.01µF
R3
432Ω
PWRGD
EN
FREQ
REFIN
SS
GND
PREBIAS
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
_______________________________________________________________________________________ 9
Figure 1. MAX8646 1MHz, All-Ceramic-Capacitor Design with VOUT = 1.8V
Detailed Description
The MAX8646 high-efficiency, voltage-mode switching
regulator is capable of delivering up to 6A of output
current. The MAX8646 provides output voltages from
0.6V to 0.9 x VIN from 2.35V to 3.6V input supplies,
making it ideal for on-board point-of-load applications.
The output voltage accuracy is better than ±1% over
load, line, and temperature.
The MAX8646 features a wide switching frequency
range, allowing the user to achieve all-ceramic-capacitor
designs and fast transient responses (see Figure 1). The
high operating frequency minimizes the size of external
components. The MAX8646 is available in a small (4mm
x 4mm), lead-free, 24-pin thin QFN package. The REFIN
function makes the MAX8646 an ideal candidate for
DDR and tracking power supplies. Using internal low-
RDS(ON) (23mΩ) n-channel MOSFETs for both high- and
low-side switches maintains high efficiency at both
heavy-load and high-switching frequencies.
The MAX8646 employs voltage-mode control architec-
ture with a high bandwidth (> 14MHz) error amplifier.
The voltage-mode control architecture allows up to
2MHz switching frequency, reducing board area. The
op-amp voltage-error amplifier works with type III com-
pensation to fully utilize the bandwidth of the high-fre-
quency switching to obtain fast transient response.
Adjustable soft-start time provides flexibilities to mini-
mize input startup inrush current. An open-drain,
power-good (PWRGD) output goes high when VFB
reaches 90% of VREFIN or 0.54V.
Controller Function
The controller logic block is the central processor that
determines the duty cycle of the high-side MOSFET
under different line, load, and temperature conditions.
Under normal operation, where the current-limit and
temperature protection are not triggered, the controller
logic block takes the output from the PWM comparator
and generates the driver signals for both high-side and
low-side MOSFETs. The break-before-make logic and
the timing for charging the bootstrap capacitors are
calculated by the controller logic block. The error signal
from the voltage-error amplifier is compared with the
ramp signal generated by the oscillator at the PWM
comparator and, thus, the required PWM signal is pro-
duced. The high-side switch is turned on at the begin-
ning of the oscillator cycle and turns off when the ramp
Typical Application Circuit
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
10 ______________________________________________________________________________________
voltage exceeds the VCOMP signal or the current-limit
threshold is exceeded. The low-side switch is then
turned on for the remainder of the oscillator cycle.
Current Limit
The internal, high-side MOSFET has a typical 11A peak
current-limit threshold. When current flowing out of LX
exceeds this limit, the high-side MOSFET turns off and
the synchronous rectifier turns on. The synchronous
rectifier remains on until the inductor current falls below
the low-side current limit. This lowers the duty cycle
and causes the output voltage to droop until the current
limit is no longer exceeded. The MAX8646 uses a hic-
cup mode to prevent overheating during short-circuit
output conditions.
During current limit if VFB drops below 420mV and
stays below this level for 12µs or more, the part enters
hiccup mode. The high-side MOSFET and the synchro-
nous rectifier are turned off and both COMP and REFIN
are internally pulled low. If REFIN and SS are connect-
ed together, then both are pulled low. The part remains
in this state for 1024 clock cycles and then attempts to
restart for 128 clock cycles. If the fault causing current
limit has cleared, the part resumes normal operation.
Otherwise, the part reenters hiccup mode again.
Soft-Start and REFIN
The MAX8646 utilizes an adjustable soft-start function
to limit inrush current during startup. An 8µA (typ) cur-
rent source charges an external capacitor connected to
SS. The soft-start time is adjusted by the value of the
external capacitor from SS to GND. The required
capacitance value is determined as:
where tSS is the required soft-start time in seconds. The
MAX8646 also features an external reference input
(REFIN). The IC regulates FB to the voltage applied to
REFIN. The internal soft-start is not available when
using an external reference. A method of soft-start
when using an external reference is shown in Figure 2.
Connect REFIN to SS to use the internal 0.6V reference.
Undervoltage Lockout (UVLO)
The UVLO circuitry inhibits switching when VDD is below
2V (typ). Once VDD rises above 2V (typ), UVLO clears
and the soft-start function activates. A 100mV hysteresis
is built in for glitch immunity. Figure 3 is the type III com-
pensation network.
BST
The gate-drive voltage for the high-side, n-channel
switch is generated by a flying-capacitor boost circuit.
The capacitor between BST and LX is charged from the
VIN supply while the low-side MOSFET is on. When the
low-side MOSFET is switched off, the voltage of the
capacitor is stacked above LX to provide the necessary
turn-on voltage for the high-side internal MOSFET.
Frequency Select (FREQ)
The switching frequency is resistor programmable from
500kHz to 2MHz. Set the switching frequency of the IC
with a resistor (RFREQ) connected from FREQ to GND.
RFREQ is calculated as:
where fSis the desired switching frequency in Hz.
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high imped-
ance when VFB is above 0.9 x VREFIN. PWRGD pulls
low when VFB is below 90% of its regulation for at least
48 clock cycles. PWRGD is low during shutdown.
Programming the Output Voltage
(CTL1, CTL2)
As shown in Table 1, the output voltage is pin program-
mable by the logic states of CTL1 and CTL2. CTL1 and
CTL2 are tri-level inputs: VDD, unconnected, and GND.
The logic states of CTL1 and CTL2 should be pro-
grammed only before power-up. Once the part is
enabled, CTL1 and CTL2 should not be changed. If the
output voltage needs to be reprogrammed, cycle
power or EN and reprogram before enabling.
Rk
µs f µs
FREQ S
=×−
49 9
095
1005
.
.(.)
Ω
CAt
V
SS
=×8
06
µ
.
C
R2
R1
REFIN
MAX8646
Figure 2. Typical Soft-Start Implementation with External
Reference
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
______________________________________________________________________________________ 11
Shutdown Mode
Drive EN to GND to shut down the IC and reduce quies-
cent current to less than 12µA. During shutdown, the LX
is high impedance. Drive EN high to enable the
MAX8646.
Thermal Protection
Thermal-overload protection limits total power dissipation
in the device. When the junction temperature exceeds TJ
= +165°C, a thermal sensor forces the device into shut-
down, allowing the die to cool. The thermal sensor turns
the device on again after the junction temperature cools
by 20°C, causing a pulsed output during continuous
overload conditions. The soft-start sequence begins after
recovery from a thermal-shutdown condition.
Applications Information
IN and VDD Decoupling
To decrease the noise effects due to the high switching
frequency and maximize the output accuracy of
the MAX8646, decouple VIN with a 22µF capacitor from
VIN to PGND. Also decouple VDD with a 1µF from VDD
to GND. Place these capacitors as close to the IC
as possible.
Inductor Selection
Choose an inductor with the following equation:
where LIR is the ratio of the inductor ripple current to full
load current at the minimum duty cycle. Choose LIR
between 20% to 40% for best performance and stability.
Use an inductor with the lowest possible DC resistance
that fits in the allotted dimensions. Powdered iron ferrite
core types are often the best choice for performance.
With any core material, the core must be large enough
not to saturate at the current limit of the MAX8646.
Output-Capacitor Selection
The key selection parameters for the output capacitor are
capacitance, ESR, ESL, and voltage-rating requirements.
These affect the overall stability, output ripple voltage,
and transient response of the DC-DC converter. The out-
put ripple occurs due to variations in the charge stored
in the output capacitor, the voltage drop due to the
capacitor’s ESR, and the voltage drop due to the
capacitor’s ESL. Calculate the output voltage ripple
due to the output capacitance, ESR, and ESL:
where the output ripple due to output capacitance,
ESR, and ESL is:
or:
or whichever is larger.
The peak inductor current (IP-P) is:
Use these equations for initial capacitor selection.
Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output-voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output voltage rip-
ple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The ripple voltage due to
ESL is negligible when using ceramic capacitors.
Load-transient response depends on the selected out-
put capacitance. During a load transient, the output
instantly changes by ESR x ∆ILOAD. Before the con-
troller can respond, the output deviates further,
depending on the inductor and output capacitor val-
ues. After a short time, the controller responds by regu-
IVV
fL
xV
V
PP IN OUT
S
OUT
IN
−=−
×
VI
t
x ESL
RIPPLE ESL PP
()
=−
VI
t
x ESL
RIPPLE ESL PP
ON
()
=−
V I x ESR
RIPPLE ESR P P()
=−
VI
xC xf
RIPPLE C PP
T
()
=−
8
VV
VV
RIPPLE RIPPLE C
RIPPLE ESR RIPPLE ESL
=+
+
()
() ()
LVVV
f V LIR I
OUT IN OUT
S IN OUT MAX
=×−
×××
()
()
CTL1 CTL2 VOUT (V)
GND GND 0.6
VDD VDD 0.7
GND Unconnected 0.8
GND VDD 1.0
Unconnected GND 1.2
Unconnected Unconnected 1.5
Unconnected VDD 1.8
VDD GND 2.0
VDD Unconnected 2.5
Table 1. CTL1 and CTL2 Output Voltage
Selection
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
12 ______________________________________________________________________________________
lating the output voltage back to its predetermined
value. The controller response time depends on the
closed-loop bandwidth. A higher bandwidth yields a
faster response time, preventing the output from deviat-
ing further from its regulating value. See the
Compen-
sation Design
section for more details.
Input-Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The total input capacitance must be
equal or greater than the value given by the following
equation to keep the input-ripple voltage within specs
and minimize the high-frequency ripple current being
fed back to the input source:
where VIN-RIPPLE is the maximum allowed input ripple
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage. D
is the duty cycle (VOUT/VIN) and TSis the switching
period (1/fS).
The impedance of the input capacitor at the switching
frequency should be less than that of the input source so
high-frequency switching currents do not pass through
the input source but are instead shunted through the
input capacitor. High source impedance requires high
input capacitance. The input capacitor must meet the
ripple current requirement imposed by the switching cur-
rents. The RMS input ripple current is given by:
where IRIPPLE is the input RMS ripple current.
Compensation Design
The power transfer function consists of one double pole
and one zero. The double pole is introduced by the out-
put filtering inductor L and the output filtering capacitor
CO. The ESR of the output filtering capacitor deter-
mines the zero. The double pole and zero frequencies
are given as follows:
where RLis equal to the sum of the output inductor’s
DCR and the internal switch resistance, RDS(ON). A typi-
cal value for RDS(ON) is 23mΩ. ROis the output load
resistance, which is equal to the rated output voltage
divided by the rated output current. ESR is the total
equivalent series resistance of the output filtering capaci-
tor. If there is more than one output capacitor of the same
type in parallel, the value of the ESR in the above equa-
tion is equal to that of the ESR of a single output capaci-
tor divided by the total number of output capacitors.
The high switching frequency range of the MAX8646
allows the use of ceramic output capacitors. Since the
ESR of ceramic capacitors is typically very low, the fre-
quency of the associated transfer function zero is higher
than the unity-gain crossover frequency, fC, and the zero
cannot be used to compensate for the double pole creat-
ed by the output filtering inductor and capacitor. The dou-
ble pole produces a gain drop of 40dB/decade and a
phase shift of 180°/decade. The error amplifier must com-
pensate for this gain drop and phase shift to achieve a
stable high-bandwidth closed-loop system. Therefore,
use type III compensation as shown in Figures 3 and 4.
Type III compensation possesses three poles and two
zeros with the first pole, fP1_EA, located at zero frequency
(DC). Locations of other poles and zeros of the type III
compensation are given by:
The above equations are based on the assumptions
that C1>>C2, and R3>>R2, which are true in most
applications. Placements of these poles and zeros are
determined by the frequencies of the double pole and
ESR zero of the power transfer function. It is also a
function of the desired close-loop bandwidth. The fol-
lowing section outlines the step-by-step design proce-
dure to calculate the required compensation
components for the MAX8646. When the output voltage
of the MAX8646 is programmed to a preset voltage, R3
is internal to the IC and R4 does not exist (Figure 3b).
When externally programming the MAX8646 (Figure
3a), the output voltage is determined by:
fRC
PEA21
223
_=××π
fRC
PEA31
212
_=××π
fRC
ZEA21
233
_=××π
fRC
ZEA11
211
_=××π
fx ESR x C
Z ESR O
_
=1
2π
ff
xLxC xR ESR
RR
PLC P LC
OO
OL
12
1
2
__
== +
+
⎛
⎝
⎜⎞
⎠
⎟
π
II VVV
V
RIPPLE LOAD OUT IN OUT
IN
=× ×−()
CDxT xI
V
IN MIN S OUT
IN RIPPLE
_=−
MAX8646
The zero-cross frequency of the close-loop, fCshould
be between 10% and 20% of the switching frequency,
fS. A higher zero-cross frequency results in faster tran-
sient response. Once fCis chosen, C1 is calculated
from the following equation:
Due to the underdamped nature of the output LC dou-
ble pole, set the two zero frequencies of the type III
compensation less than the LC double-pole frequency
to provide adequate phase boost. Set the two zero fre-
quencies to 80% of the LC double-pole frequency.
Hence:
Setting the second compensation pole, fP2_EA, at
fZ_ESR yields:
Set the third compensation pole at 1/2 of the switching
frequency. Calculate C2 as follows:
The above equations provide application compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
zero-cross frequency is higher than the calculated fre-
quency. In this case, lowering the value of R1 reduces
the zero-cross frequency. Also, set the third pole of the
type III compensation close to the switching frequency
if the zero-cross frequency is above 200kHz to boost
the phase margin. The recommended range for R3 is
2kΩto 10kΩ. Note that the loop compensation remains
unchanged if only R4’s resistance is altered to set dif-
ferent outputs.
Soft-Starting into a Prebiased Output
When the PREBIAS pin is left unconnected, the
MAX8646 is capable of soft-starting up into a prebi-
ased output without discharging the output capacitor.
This type of operation is also termed monotonic start-
up. However, in order to avoid output voltage glitches
during soft-start it should be ensured that the inductor
current is in continuous conduction mode during the
end of the soft-start period. this is done by satisfying
the following equation:
where COis the output capacitor, VOis the output volt-
age, tSS is the soft-start time set by the soft-start capac-
itor CSS, and IP-P is the peak inductor ripple current (as
defined in the
Output-Capacitor Selection
section).
Depending on the application, one of these parameters
may drive the selection of the others. See
Starting into
CV
t
I
OO
SS
PP
×≥
−
2
CRf
S
21
12
=×× ×π
RC x ESR
C
O
2
3
=
C
xR
xL x C x R ESR
RR
OO
LO
31
08 3
=+
+.
()
R
xC
xL x C x R ESR
RR
OO
LO
11
08 1
=+
+.
()
CxV
xxRx R
Rf
IN
L
OC
11 5625
231
=
+×
.
()π
RR
VOUT
406 3
06
=×
−
.
(.)
6A, 2MHz Step-Down Regulator
with Integrated Switches
______________________________________________________________________________________ 13
MAX8646
L
COUT
EXTERNAL RESISTOR DIVIDER
INTERNAL PRESET VOLTAGES
VOUT
R3
R4
R1
COMP
FB
OUT
CTL1
CTL2
LX
C1
C3
R2
C3
R2
C2
MAX8646
L
a)
b)
COUT
VOUT
R3
8kΩ
R1
COMP
OUT
FB
CTL1
VOLTAGE
SELECT CTL2
LX
C1
C2
Figure 3. Type III Compensation Network
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
14 ______________________________________________________________________________________
Prebiased Output
waveforms in the
Typical Operating
Characteristics
section for an example selection of the
above parameters. Connecting the PREBIAS pin to the
GND disables the prebias soft-start feature and causes
the MAX8646 to discharge any voltage present on the
output capacitors and then commence its soft-start.
PCB Layout Considerations and
Thermal Performance
Careful PCB layout is critical to achieve clean and sta-
ble operation. It is highly recommended to duplicate the
MAX8646 EV kit layout for optimum performance. If devia-
tion is necessary, follow these guidelines for good PCB
layout:
1) Connect input and output capacitors to the power
ground plane; connect all other capacitors to the sig-
nal ground plane.
2) Place capacitors on VDD, VIN, and SS as close as
possible to the IC and its corresponding pin using
direct traces. Keep power ground plane (connected
to PGND) and signal ground plane (connected to
GND) separate.
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the out-
put capacitors, and the input capacitors.
4) Connect IN, LX, and PGND separately to a large
copper area to help cool the IC to further improve
efficiency and long-term reliability.
5) Ensure all feedback connections are short and
direct. Place the feedback resistors and compensa-
tion components as close to the IC as possible.
6) Route high-speed switching nodes, such as LX,
away from sensitive analog areas (FB, COMP).
DOUBLE POLE
GAIN (dB)
SECOND
POLE
FIRST AND SECOND ZEROS
POWER-STAGE
TRANSFER
FUNCTION
COMPENSATION
TRANSFER
FUNCTION
OPEN-LOOP
GAIN
THIRD
POLE
Figure 4. Type III Compensation Illustration
Chip Information
PROCESS: BiCMOS
THIN QFN
MAX8646
19
20
21
22
12 3456
18 17 16 15 14 13
23
24
12
11
10
9
8
7
PGND
IN
PGND
IN
EN
PREBIAS
VDD
CTL1
CTL2
REFIN
SS
PGND
PGND
LX
LX
BST
IN
PWRGD
OUT
FREQ
FB
GND
COMP
LX
TOP VIEW
+
Pin Configuration
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
______________________________________________________________________________________ 15
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products. Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Revision History
Pages changed at Rev 1: 1, 5, 6, 7, 10–14
Pages changed at Rev 2: 1, 2, 4, 8, 9, 13, 15, 16