1
FEATURES
DESCRIPTION
APPLICATIONS
8
1
4
5
RS
D
R
LBK
7
6CANH
CANL
8
1
4
5
7
6CANH
CANL
RS
D
EN
R
8
1
4
5
RS
D
R
AB
7
6CANH
CANL
SN65HVD233
FUNCTIONAL BLOCK DIAGRAM
SN65HVD234
FUNCTIONAL BLOCK DIAGRAM
SN65HVD235
FUNCTIONAL BLOCK DIAGRAM
SN65HVD233
SN65HVD234
SN65HVD235
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.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
3.3-V CAN TRANSCEIVERS
2
•Bus-Pin Fault Protection Exceeds ± 36 V•Bus-Pin ESD Protection Exceeds 16-kV HBM
The SN65HVD233, SN65HVD234, and SN65HVD235are used in applications employing the controller area•GIFT/ICT Compliant (SN65HVD234)
network (CAN) serial communication physical layer in•Compatible With ISO 11898
accordance with the ISO 11898 standard. As a CAN•Signaling Rates
(1)
up to 1 Mbps
transceiver, each provides transmit and receivecapability between the differential CAN bus and a•Extended – 7-V to 12-V Common-Mode Range
CAN controller, with signaling rates up to 1 Mbps.•High-Input Impedance Allows for 120 Nodes
Designed for operation in especially harsh•LVTTL I/Os Are 5-V Tolerant
environments, the devices feature cross-wire,•Adjustable Driver Transition Times for
overvoltage and loss of ground protection to ± 36 V,Improved Signal Quality
with overtemperature protection and common-mode•Unpowered Node Does Not Disturb the Bus transient protection of ± 100 V. These devices operateover a – 7-V to 12-V common-mode range with a•Low-Current Standby Mode . . . 200- µA Typical
maximum of 60 nodes on a bus.•Low-Current Sleep Mode . . . 50-nA Typical(SN65HVD234)
•Thermal Shutdown Protection•Power-Up/Down Glitch-Free Bus Inputs andOutputs
– High Input Impedance With Low V
CC
– Monolithic Output During Power Cycling•Loopback for Diagnostic Functions Available(SN65HVD233)
•Loopback for Autobaud Function Available(SN65HVD235)
•DeviceNet Vendor ID #806(1)
The signaling rate of a line is the number of voltagetransitions that are made per second expressed in the unitsbps (bits per second).
•CAN Data Bus•Industrial Automation
– DeviceNet™ Data Buses– Smart Distributed Systems (SDS™)•SAE J1939 Standard Data Bus Interface•NMEA 2000 Standard Data Bus Interface•ISO 11783 Standard Data Bus Interface
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2DeviceNet is a trademark of Open DeviceNet Vendor Association.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
DESCRIPTION (CONTINUED)
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
If the common-mode range is restricted to the ISO-11898 Standard range of – 2 V to 7 V, up to 120 nodes maybe connected on a bus. These transceivers interface the single-ended CAN controller with the differential CANbus found in industrial, building automation, and automotive applications.
The R
S
, pin 8 of the SN65HVD233, SN65HVD234, and SN65HVD235 provides for three modes of operation:high-speed, slope control, or low-power standby mode. The high-speed mode of operation is selected byconnecting pin 8 directly to ground, allowing the driver output transistors to switch on and off as fast as possiblewith no limitation on the rise and fall slope. The rise and fall slope can be adjusted by connecting a resistor toground at pin 8, since the slope is proportional to the pin ' s output current. Slope control is implemented with aresistor value of 10 k Ωto achieve a slew rate of 915 V/ µs and a value of 100 k Ωto achieve 9 2.0 V/ µs slew rate.For more information about slope control, refer to the application information section.
The SN65HVD233, SN65HVD234, and SN65HVD235 enter a low-current standby mode during which the driveris switched off and the receiver remains active if a high logic level is applied to pin 8. The local protocol controllerreverses this low-current standby mode when it needs to transmit to the bus.
A logic high on the loopback LBK pin 5 of the SN65HVD233 places the bus output and bus input in ahigh-impedance state. The remaining circuit remains active and available for driver to receiver loopback,self-diagnostic node functions without disturbing the bus.
The SN65HVD234 enters an ultralow-current sleep mode in which both the driver and receiver circuits aredeactivated if a low logic level is applied to EN pin 5. The device remains in this sleep mode until the circuit isreactivated by applying a high logic level to pin 5.
The AB pin 5 of the SN65HVD235 implements a bus listen-only loopback feature which allows the local nodecontroller to synchronize its baud rate with that of the CAN bus. In autobaud mode, the driver ' s bus output isplaced in a high-impedance state while the receiver ' s bus input remains active. For more information on theautobaud mode, refer to the application information section.
AVAILABLE OPTIONS
(1)
SLOPE DIAGNOSTIC AUTOBAUDPART NUMBER LOW POWER MODE
CONTROL LOOPBACK LOOPBACK
SN65HVD233D 200- µA standby mode Adjustable Yes NoSN65HVD234D 200- µA standby mode or 50-nA sleep mode Adjustable No NoSN65HVD235D 200- µA standby mode Adjustable No Yes
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com.
ORDERING INFORMATION
PACKAGE (D) Marked as
SN65HVD233D
VP233SN65HVD233DR
(1)
SN65HVD234D
VP234SN65HVD234DR
(1)
SN65HVD235D
VP235SN65HVD235DR
(1)
(1) R suffix indicates tape and reel.
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
POWER DISSIPATION RATINGS
ABSOLUTE MAXIMUM RATINGS
(1) (2)
RECOMMENDED OPERATING CONDITIONS
SN65HVD233
SN65HVD234
SN65HVD235
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.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
CIRCUIT T
A
≤25 ° C DERATING FACTOR
(1)
T
A
= 85 ° C T
A
= 125 ° CPACKAGE
BOARD POWER RATING ABOVE T
A
= 25 ° C POWER RATING POWER RATING
D Low-K 596.6 mW 5.7 mW/ ° C 255.7 mW 28.4 mWD High-K 1076.9 mW 10.3 mW/ ° C 461.5 mW 51.3 mW
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
over operating free-air temperature range unless otherwise noted
Value UNIT
V
CC
Supply voltage range – 0.3 to 7 VVoltage range at any bus terminal (CANH or CANL) – 36 to 36 VVoltage input range, transient pulse, CANH and CANL, through 100 Ω(see Figure 7 ) – 100 to 100 VV
I
Input voltage range, (D, R, R
S
, EN, LBK, AB) – 0.5 to 7 VI
O
Receiver output current – 10 to 10 mAElectrostatic discharge Human Body Model
(3)
CANH, CANL and GND 16 kVHuman Body Model
(3)
All pins 3 kVElectrostatic discharge
Charged-Device Mode
(4)
All pins 1 kVSee Dissipation RatingContinuous total power dissipation
TableT
J
Operating junction temperature 150 ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.(3) Tested in accordance with JEDEC Standard 22, Test Method A114-A.(4) Tested in accordance with JEDEC Standard 22, Test Method C101.
MIN TYP MAX UNIT
V
CC
Supply voltage 3 3.6Voltage at any bus terminal (separately or common mode) – 7 12V
IH
High-level input voltage D, EN, AB, LBK 2 5.5 VV
IL
Low-level input voltage D, EN, AB, LBK 0 0.8V
ID
Differential input voltage – 6 6Resistance from R
S
to ground 0 100 k Ω
V
I(Rs)
Input Voltage at R
S
for standby 0.75 V
CC
5.5 VDriver – 50I
OH
High-level output current mAReceiver – 10Driver 50I
OL
Low-level output current mAReceiver 10T
J
Operating junction temperature HVD233, HVD234, HVD235 150 ° CT
A
Operating free-air temperature
(1)
HVD233, HVD234, HVD235 -40 125 ° C
(1) Maximum free-air temperature operation is allowed as long as the device maximum junction temperature is not exceeded.
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
DRIVER ELECTRICAL CHARACTERISTICS
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
CANH 2.45 V
CCBus output voltageV
O(D)
D at 0 V, R
S
at 0 V, See Figure 1 and Figure 2 V(Dominant)
CANL 0.5 1.25CANH 2.3Bus output voltageV
O
D at 3 V, R
S
at 0 V, See Figure 1 and Figure 2 V(Recessive)
CANL 2.3D at 0 V, R
S
at 0 V, See Figure 1 and Figure 2 1.5 2 3V
OD(D)
Differential output voltage (Dominant) VD at 0 V, R
S
at 0 V, See Figure 2 and Figure 3 1.2 2 3D at 3 V, R
S
at 0 V, See Figure 1 and Figure 2 – 120 12 mVV
OD
Differential output voltage (Recessive)
D at 3 V, R
S
at 0 V, No Load – 0.5 0.05 VV
OC(pp)
Peak-to-peak common-mode output voltage See Figure 10 1 VD, EN, LBK,I
IH
High-level input current D at 2 V – 30 30 µAAB
D, EN, LBK,I
IL
Low-level input current D at 0.8 V – 30 30 µAAB
V
CANH
= – 7 V, CANL Open, See Figure 15 – 250V
CANH
= 12 V, CANL Open, See Figure 15 1I
OS
Short-circuit output current mAV
CANL
= – 7 V, CANH Open, See Figure 15 – 1V
CANL
= 12 V, CANH Open, See Figure 15 250C
O
Output capacitance See receiver input capacitanceI
IRs(s)
R
S
input current for standby R
S
at 0.75 V
CC
– 10 µASleep EN at 0 V, D at V
CC
, R
S
at 0 V or V
CC
0.05 2
µAR
S
at V
CC
, D at V
CC
, AB at 0 V, LBK at 0 V,Standby 200 600EN at V
CCI
CC
Supply current
D at 0 V, No Load, AB at 0 V, LBK at 0 V,Dominant 6R
S
at 0 V, EN at V
CC
mAD at V
CC
, No Load, AB at 0 V,LBK at 0 V,Recessive 6R
S
at 0 V, EN at V
CC
(1) All typical values are at 25 ° C and with a 3.3 V supply.
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DRIVER SWITCHING CHARACTERISTICS
SN65HVD233
SN65HVD234
SN65HVD235
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.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
R
S
at 0 V, See Figure 4 35 85Propagation delay time,t
PLH
R
S
with 10 k Ωto ground, See Figure 4 70 125 nslow-to-high-level output
R
S
with 100 k Ωto ground, See Figure 4 500 870R
S
at 0 V, See Figure 4 70 120Propagation delay time,t
PHL
R
S
with 10 k Ωto ground, See Figure 4 130 180 nshigh-to-low-level output
R
S
with 100 k Ωto ground, SeeFigure 4 870 1200R
S
at 0 V, See Figure 4 35t
sk(p)
Pulse skew (|t
PHL
– t
PLH
|) R
S
with 10 k Ωto ground, See Figure 4 60 nsR
S
with 100 k Ωto ground, SeeFigure 4 370t
r
Differential output signal rise time 20 70R
S
at 0 V, See Figure 4 nst
f
Differential output signal fall time 20 70t
r
Differential output signal rise time 30 135R
S
with 10 k Ωto ground, See Figure 4 nst
f
Differential output signal fall time 30 135t
r
Differential output signal rise time 350 1400R
S
with 100 k Ωto ground, See Figure 4 nst
f
Differential output signal fall time 350 1400t
en(s)
Enable time from standby to dominant 0.6 1.5See Figure 8 and Figure 9 µst
en(z)
Enable time from sleep to dominant 1 5
(1) All typical values are at 25 ° C and with a 3.3 V supply.
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RECEIVER ELECTRICAL CHARACTERISTICS
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
IT+
Positive-going input threshold voltage 750 900V
IT –
Negative-going input threshold voltage AB at 0 V, LBK at 0 V, EN at V
CC
, See Table 1 500 650 mVV
hys
Hysteresis voltage (V
IT+
– V
IT –
) 100V
OH
High-level output voltage I
O
= – 4 mA, See Figure 6 2.4
VV
OL
Low-level output voltage I
O
= 4 mA, See Figure 6 0.4CANH or CANL at 12 V 150 500CANH or CANL at 12 V,
Other bus pin at 0 V,
200 600V
CC
at 0 V
D at 3 V, AB at 0 V,I
I
Bus input current µALBK at 0 V, R
S
at 0 V,CANH or CANL at – 7 V – 610 – 150EN at V
CCCANH or CANL at – 7 V,
– 450 – 130V
CC
at 0 VPin-to-ground, V
I
= 0.4 sin (4E6 πt) + 0.5V, D at 3 V,C
I
Input capacitance (CANH or CANL) 40AB at 0 V, LBK at 0 V, EN at V
CC
pFPin-to-pin, V
I
= 0.4 sin (4E6 πt) + 0.5V, D at 3 V,C
ID
Differential input capacitance 20AB at 0 V, LBK at 0 V, EN at V
CC
R
ID
Differential input resistance 40 100D at 3 V, AB at 0 V, LBK at 0 V, EN at V
CC
kΩR
IN
Input resistance (CANH or CANL) 20 50Sleep EN at 0 V, D at V
CC
, R
S
at 0 V or V
CC
0.05 2
µAStandby R
S
at V
CC
, D at V
CC
, AB at 0 V, LBK at 0 V, EN at V
CC
200 600D at 0 V, No Load, R
S
at 0 V, LBK at 0 V, AB at 0 V,I
CC
Supply current
Dominant 6EN at V
CC
mAD at V
CC
, No Load, R
S
at 0 V, LBK at 0 V, AB at 0 V,Recessive 6EN at V
CC
(1) All typical values are at 25 ° C and with a 3.3 V supply.
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
RECEIVER SWITCHING CHARACTERISTICS
DEVICE SWITCHING CHARACTERISTICS
SN65HVD233
SN65HVD234
SN65HVD235
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.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
t
PLH
Propagation delay time, low-to-high-level output 35 60t
PHL
Propagation delay time, high-to-low-level output 35 60t
sk(p)
Pulse skew (|t
PHL
– t
PLH
|) See Figure 6 7 nst
r
Output signal rise time 2 5t
f
Output signal fall time 2 5
(1) All typical values are at 25 ° C and with a 3.3 V supply.
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
Loopback delay, driver input tot
(LBK)
HVD233 See Figure 12 7.5 12 nsreceiver outputLoopback delay, driver input tot
(AB1)
See Figure 13 10 20 nsreceiver output
HVD235Loopback delay, bus input tot
(AB2)
See Figure 14 35 60 nsreceiver output
R
S
at 0 V, See Figure 11 70 135Total loop delay, driver input to receiver output,t
(loop1)
R
S
with 10 k Ωto ground, See Figure 11 105 190 nsrecessive to dominant
R
S
with 100 k Ωto ground, See Figure 11 535 1000R
S
at 0 V, See Figure 11 70 135Total loop delay, driver input to receiver output,t
(loop2)
R
S
with 10 k Ωto ground, See Figure 11 105 190 nsdominant to recessive
R
S
with 100 k Ωto ground, See Figure 11 535 1000
(1) All typical values are at 25 ° C and with a 3.3 V supply.
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PARAMETER MEASUREMENT INFORMATION
VI
VOD
II60 Ω ±1%
IO(CANL)
IO(CANH)
VO(CANH)
VO(CANL)
IIRs
RS+
VI(Rs)
-
VOC
VO(CANH) + VO(CANL)
2
D
Dominant
Recessive
≈ 3 V VO(CANH)
≈ 2.3 V
≈ 1 V VO(CANL)
VIVOD
D60 Ω ±1%
330 Ω ±1%
330 Ω ±1%
_
+-7 V ≤ VTEST ≤ 12 V
RS
CANH
CANL
VI
VO
D
RL = 60 Ω ±1%
RS
CANH
CANL
+
-
CL = 50 pF ±20%
(see Note B)
(see Note A) VI(Rs)
VCC/2 VCC/2 VCC
0 V
VO(D)
VO(R)
90%
10%
trtf
0.9 V 0.5 V
VI
VO
tPLH tPHL
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
Figure 1. Driver Voltage, Current, and Test Definition
Figure 2. Bus Logic State Voltage Definitions
Figure 3. Driver V
OD
A. The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤125 kHz,50% duty cycle, t
r
≤6 ns, t
f
≤6 ns, Z
O
= 50 Ω.B. C
L
includes fixture and instrumentation capacitance.
Figure 4. Driver Test Circuit and Voltage Waveforms
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VO
IO
R
VID
CANH
CANL
VI(CANL)
VI(CANH)
VI(CANH + VI(CANL)
2
VIC =
IO
R
CANH
CANL
VI
2.2V 2.2V
2.9V
1.5V
VOH
VOL
90%
10%
trtf
50%
VI
VO
tPLH tPHL
(seeNote A) 1.5V CL=15pF ±20%
(seeNoteB) VO
10%
90% 50%
100 Ω
CANH
CANL
Rs, AB, EN, LBK, at 0 V or VCC
Pulse Generator
15 µs Duration
1% Duty Cycle
tr, tf ≤ 100 ns
R
D at 0 V or VCC
SN65HVD233
SN65HVD234
SN65HVD235
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.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 5. Receiver Voltage and Current Definitions
A. The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤125 kHz,50% duty cycle, t
r
≤6 ns, t
f
≤6 ns, Z
O
= 50 Ω.B. C
L
includes fixture and instrumentation capacitance.
Figure 6. Receiver Test Circuit and Voltage Waveforms
Table 1. Differential Input Voltage Threshold Test
INPUT OUTPUT MEASURED
V
CANH
V
CANL
R |V
ID
|
– 6.1 V – 7 V L 900 mV12 V 11.1 V L 900 mVV
OL– 1 V – 7 V L 6 V12 V 6 V L 6 V– 6.5 V – 7 V H 500 mV12 V 11.5 V H 500 mV– 7 V – 1 V H V
OH
6 V6 V 12 V H 6 VOpen Open H X
NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified.
Figure 7. Test Circuit, Transient Over Voltage Test
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CANH
CANL
RS
D
15 pF ±20%
+
-
VO
60 Ω ±1%
HVD234
VI
0 V EN
50% VCC
0 V
VI
50%
VOten(z)
VOH
VOL
NOTE:All VI input pulses are supplied by a generator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 50 kHz, 50% duty cycle.
R
VI
VOC
D
27 Ω ±1%
27 Ω ±1%
RS
CANH
CANL 50 pF ±20%
VOC
VOC(PP)
NOTE:All VI input pulses are supplied by a generator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
NOTE: All V
I
input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤6 ns, pulse repetition rate(PRR) = 125 kHz, 50% duty cycle.
Figure 8. t
en(s)
Test Circuit and Voltage Waveforms
Figure 9. t
en(z)
Test Circuit and Voltage Waveforms
Figure 10. V
OC(pp)
Test Circuit and Voltage Waveforms
10 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
CANH
CANL
RS
D
15 pF ±20%
+
-
VO
60 Ω ±1%
DUT
VILBK or AB
VCC
0 V
VI
VO
t(loop2) VOH
VOL
0Ω, 10 kΩ,
or 100 kΩ ±5%
EN
VCC
HVD233/235
HVD234
R
t(loop1)
50% 50%
50% 50%
NOTE:All VI input pulses are supplied by a generator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
CANH
CANL
RS
D
15 pF ±20%
+
-
VO
60 Ω ±1%
HVD233
VI
LBK
VCC
0 V
VI
VO
t(LBK1) VOH
VOL
VCC
R
t(LBK2)
50% 50%
50% 50%
+
-
VOD
≈ 2.3 V
VOD t(LBK) = t(LBK1) = t(LBK2)
NOTE:All VI input pulses are supplied by a generator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
CANH
CANL
RS
D
15 pF ±20%
+
-
VO
60 Ω ±1%
HVD235
VI
AB
VCC
0 V
VI
VO
t(ABH) VOH
VOL
VCC R
t(ABL)
50% 50%
50% 50%
+
-
VOD
≈ 2.3 V
VOD
t(AB1) = t(ABH) = t(ABL)
NOTE:All VI input pulses are supplied by a generator having the following characteristics: tr
or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
SN65HVD233
SN65HVD234
SN65HVD235
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.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
Figure 11. t
(loop)
Test Circuit and Voltage Waveforms
Figure 12. t
(LBK)
Test Circuit and Voltage Waveforms
Figure 13. t
(AB1)
Test Circuit and Voltage Waveforms
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CANH
CANL
RS
D
15 pF ±20%
+
-
VO
60 Ω ±1%
HVD235
AB
2.9 V
1.5 V
VI
VO
t(ABH) VOH
VOL
VCC
R
t(ABL)
2.2 V
50% 50%
t(AB2) = t(ABH) = t(ABL)
VCC
1.5 V
VI
2.2 V
NOTE:All VI input pulses are supplied by a generator having the following characteristics:
tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
IOS
VI
_
+
CANH
CANL
IOS
D
0 V or VCC
IOS
12 V
-7 V
10 µs
VI
VI
and
0 V
0 V
0 V
15 s
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
Figure 14. t
(AB2)
Test Circuit and Voltage Waveforms
Figure 15. I
OS
Test Circuit and Waveforms
12 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
CANH
CANL
R1 ± 1%
R1 ± 1%
R2 ± 1%
R2 ± 1%
Vac VI
3.3 V
R+
-
VID
The R Output State Does Not Change During
Application of the Input W aveform.
TA = 25°C
VCC = 3.3 V
VID
500 mV
900 mV
R1
50 Ω
50 Ω
R2
280 Ω
130 Ω
12 V
-7 V
VI
SN65HVD233
SN65HVD234
SN65HVD235
www.ti.com
.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
NOTE: All input pulses are supplied by a generator with f ≤1.5 MHz.
Figure 16. Common-Mode Voltage Rejection
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
DEVICE INFORMATION
1
2
3
4
8
7
6
5
D
GND
VCC
R
RS
CANH
CANL
LBK
SN65HVD233D
(Marked as VP233)
(TOP VIEW)
1
2
3
4
8
7
6
5
D
GND
VCC
R
RS
CANH
CANL
EN
1
2
3
4
8
7
6
5
D
GND
VCC
R
RS
CANH
CANL
AB
SN65HVD234D
(Marked as VP234)
(TOP VIEW)
SN65HVD235D
(Marked as VP235)
(TOP VIEW)
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
1 kΩ
VCC
INPUT
9 V
D INPUT
100 kΩ
9 kΩ
45 kΩ
40 V
VCC
CANH INPUT
_
+
VCC
INPUT
RS INPUT
INPUT
9 kΩ110 kΩ
9 kΩ
45 kΩ
40 V
VCC
CANL INPUT
INPUT
9 kΩ110 kΩ
VCC
CANH and CANL OUTPUTS
OUTPUT
40 V
5 Ω
VCC
OUTPUT
9 V
R OUTPUT
1 kΩ
VCC
INPUT
9 V
EN INPUT
100 kΩ
1 kΩ
VCC
INPUT
9 V
LBK or AB INPUT
100 kΩ
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
FUNCTION TABLES
SN65HVD233
SN65HVD234
SN65HVD235
www.ti.com
.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
Table 2. Thermal Characteristics
PARAMETERS TEST CONDITIONS VALUE UNIT
Low-K
(2)
board, no air flow 185θ
JA
Junction-to-ambient thermal resistance
(1)
° C/WHigh-K
(3)
board, no air flow 101θ
JB
Junction-to-board thermal resistance High-K
(3)
board, no air flow 82.8 ° C/Wθ
JC
Junction-to-case thermal resistance 26.5 ° C/WR
L
= 60 Ω, R
S
at 0 V, input to D a 1-MHz 50% dutyP
(AVG)
Average power dissipation 36.4 mWcycle square wave V
CC
at 3.3 V, T
A
= 25 ° CT
(SD)
Thermal shutdown junction temperature 170 ° C
(1) See TI literature number SZZA003 for an explanation of this parameter.(2) JESD51-3 low effective thermal conductivity test board for leaded surface mount packages.(3) JESD51-7 high effective thermal conductivity test board for leaded surface mount packages.
DRIVER (SN65HVD233 or SN65HVD235)
INPUTS OUTPUTS
D LBK/AB R
s
CANH CANL BUS STATE
X X > 0.75 V
CC
Z Z RecessiveL L or open H L Dominant≤0.33 V
CCH or open X Z Z RecessiveX H ≤0.33 V
CC
Z Z Recessive
RECEIVER (SN65HVD233)
INPUTS OUTPUT
BUS STATE V
ID
= V
(CANH)
– V
(CANL)
LBK D R
Dominant V
ID
≥0.9 V L or open X LRecessive V
ID
≤0.5 V or open L or open H or open H? 0.5 V < V
ID
< 0.9 V L or open H or open ?X X L LHX X H H
RECEIVER (SN65HVD235)
(1)
INPUTS OUTPUT
BUS STATE V
ID
= V
(CANH)
– V
(CANL)
AB D R
Dominant V
ID
≥0.9 V L or open X LRecessive V
ID
≤0.5 V or open L or open H or open H? 0.5 V < V
ID
< 0.9 V L or open H or open ?Dominant V
ID
≥0.9 V H X LRecessive V
ID
≤0.5 V or open H H HRecessive V
ID
≤0.5 V or open H L L? 0.5 V < V
ID
< 0.9 V H L L
(1) H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
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SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
DRIVER (SN65HVD234)
INPUTS OUTPUTS
D EN R
s
CANH CANL BUS STATE
L H ≤0.33 V
CC
H L DominantH X ≤0.33 V
CC
Z Z RecessiveOpen X X Z Z RecessiveX X > 0.75 V
CC
Z Z RecessiveX L or open X Z Z Recessive
RECEIVER (SN65HVD234)
(1)
INPUTS OUTPUT
BUS STATE V
ID
= V
(CANH)
– V
(CANL)
EN R
Dominant V
ID
≥0.9 V H LRecessive V
ID
≤0.5 V or open H H? 0.5 V < V
ID
< 0.9 V H ?X X L or open H
(1) H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
TYPICAL CHARACTERISTICS
60
65
70
75
80
85
90
−40 45 125
− Ressive−To−Dominant Loop Time − ns
TA − Free-Air Temperature − °C
t(LOOPL1)
VCC = 3.6 V
Rs, LBK, AB = 0 V
EN = VCC
5 80
VCC = 3.3 V
VCC = 3 V
65
70
75
80
85
90
95
−40 45 125
− Dominant−To−Recessive Loop Time − ns
TA − Free-Air Temperature − °C
t(LOOPL2)
Rs, LBK, AB = 0 V
EN = VCC
VCC = 3 V
VCC = 3.3 V
VCC = 3.6 V
5 80
0
20
40
60
80
100
120
140
160
0 1 2 3 4
IOL − Driver Output Current − mA
OL
V− Low-Level Output Voltage − V
VCC = 3.3 V,
Rs, LBK, AB = 0 V,
EN = VCC,
TA = 25°C
15
16
17
18
19
20
200 300 500 700 1000
f − Frequency − kbps
ICC − Supply Current − mA
VCC = 3.3 V,
Rs, LBK, AB = 0 V,
EN = VCC,
TA = 25°C,
60-W Load
SN65HVD233
SN65HVD234
SN65HVD235
www.ti.com
.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
RECESSIVE-TO-DOMINANT LOOP TIME DOMINANT-TO-RECESSIVE LOOP TIMEvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 17. Figure 18.
SUPPLY CURRENT DRIVER LOW-LEVEL OUTPUT CURRENTvs vsFREQUENCY LOW-LEVEL OUTPUT VOLTAGE
Figure 19. Figure 20.
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
0
0.02
0.04
0.06
0.08
0.1
0.12
0 0.5 1 1.5 2 2.5 3 3.5
IOH− Driver High-Level Output Current − mA
OH
V− High-Level Output Voltage − V
VCC = 3.3 V,
Rs, LBK, AB = 0 V,
EN = VCC,
TA = 25°C
1
1.2
1.4
1.6
1.8
2
2.2
−40 45 125
VOD− Differential Output Voltage − V
TA − Free-Air Temperature − °C
VCC = 3 V
VCC = 3.3 V
VCC = 3.6 V
RL = 60 Ω
Rs, LBK, AB = 0 V
EN = VCC
5 80
35
36
37
38
39
40
41
42
43
44
45
TA − Free-Air Temperature − °C
tPLH− Receiver Low-To-High Propagation Delay − ns
VCC = 3.6 V
Rs, LBK, AB = 0 V
EN = VCC
See Figure 6
−40 45 1255 80
VCC = 3 V VCC = 3.3 V
32
33
34
35
36
37
38
TA − Free-Air Temperature − °C
tPHL− Receiver High-To-Low Propagation Delay − ns
VCC = 3 V
VCC = 3.3 V
VCC = 3.6 V
Rs, LBK, AB = 0 V
EN = VCC
See Figure 6
−40 45 125
5 80
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
DRIVER HIGH-LEVEL OUTPUT CURRENT DIFFERENTIAL OUTPUT VOLTAGEvs vsHIGH-LEVEL OUTPUT VOLTAGE FREE-AIR TEMPERATURE
Figure 21. Figure 22.
RECEIVER LOW-TO-HIGH PROPAGATION DELAY RECEIVER HIGH-TO-LOW PROPAGATION DELAYvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 23. Figure 24.
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
30
35
40
45
50
55
60
65
TA − Free-Air Temperature − °C
tPHL− Driver High-To-Low Proragation Delay − ns
−40 45 125
5 80
VCC = 3 V
VCC = 3.3 V
VCC = 3.6 V
Rs, LBK, AB = 0 V
EN = VCC
See Figure 4
25
30
35
40
45
50
55
TA − Free-Air Temperature − °C
tPLH− Driver Low-To-High Propagation Delay − ns
−40 45 125
5 80
Rs, LBK, AB = 0 V
EN = VCC
See Figure 4
VCC = 3.6 V
VCC = 3.3 V
VCC = 3 V
−5
0
5
10
15
20
25
30
35
0 0.6 1.2 1.8 2.4 3 3.6
IO− Driver Output Current − mA
VCC Supply V oltage − V−
Rs, LBK, AB = 0 V,
EN = VCC,
TA = 25°C
RL = 60 Ω
SN65HVD233
SN65HVD234
SN65HVD235
www.ti.com
.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
TYPICAL CHARACTERISTICS (continued)
DRIVER LOW-TO-HIGH PROPAGATION DELAY DRIVER HIGH-TO-LOW PROPAGATION DELAYvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 25. Figure 26.
DRIVER OUTPUT CURRENT
vsSUPPLY VOLTAGE
Figure 27.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
APPLICATION INFORMATION
DIAGNOSTIC LOOPBACK (SN65HVD233)
AUTOBAUD LOOPBACK (SN65HVD235)
Ω
120 Ω
120
CANH
CANL
TMS320LF243
SN65HVD251
D R
Rs
Vref
CANTX CANRX
Sensor, Actuator, or Control
Equipment
TMS320F2812
SN65HVD233
D R
0.1µF
Vcc
GND
Rs
LBK
CANTX CANRX
Sensor, Actuator, or Control
Equipment
TMS320LF2407A
SN65HVD230
D R
Rs
Vref
CANTX CANRX
Sensor, Actuator, or Control
Equipment
3.3 V
0.1µF
Vcc
GND
5 V
0.1µF
Vcc
GND
3.3 V
Stub Lines -- 0.3 m max
Bus Lines -- 40 m max
GPIO
ISO 11898 COMPLIANCE OF SN65HVD230 FAMILY OF 3.3-V CAN TRANSCEIVERS
Introduction
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
The loopback (LBK) function of the HVD233 is enabled with a high-level input to pin 5. This forces the driver intoa recessive state and redirects the data (D) input at pin 1 to the received-data output (R) at pin 4. This allows thehost controller to input and read back a bit sequence to perform diagnostic routines without disturbing the CANbus. A typical CAN bus application is displayed in Figure 28 .
If the LBK pin is not used it may be tied to ground (GND). However, it is pulled low internally (defaults to alow-level input) and may be left open if not in use.
The autobaud feature of the HVD235 is implemented by placing a logic high on pin 5 (AB). In autobaud, thebus-transmit function of the transceiver is disabled, while the bus-receive function and all of the normal operatingfunctions of the device remain intact. With the autobaud function engaged, normal bus activity can be monitoredby the device. However, if an error frame is generated by the local CAN controller, it is not transmitted to the bus.Only the host microprocessor can detect the error frame.
Autobaud detection is best suited to applications that have a known selection of baud rates. For example, apopular industrial application has optional settings of 125 kbps, 250 kbps, or 500 kbps. Once the logic high hasbeen applied to pin 5 (AB) of the HVD235, assume a baud rate such as 125 kbps, then wait for a message to betransmitted by another node on the bus. If the wrong baud rate has been selected, an error message isgenerated by the host CAN controller. However, since the bus-transmit function of the device has been disabled,no other nodes receive the error message of the controller.
This procedure makes use of the CAN controller's status register indications of message received and errorwarning status to signal if the current baud rate is correct or not. The warning status indicates that the CAN chiperror counters have been incremented. A message received status indicates that a good message has beenreceived.
If an error is generated, reset the CAN controller with another baud rate, and wait to receive another message.When an error-free message has been received, the correct baud rate has been detected. A logic low may nowbe applied to pin 5 (AB) of the HVD235, returning the bus-transmit normal operating function to the transceiver.
Figure 28. Typical HVD233 Application
Many users value the low power consumption of operating their CAN transceivers from a 3.3 V supply. However,some are concerned about the interoperability with 5-V supplied transceivers on the same bus. This reportanalyzes this situation to address those concerns.
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
Differential Signal
75% SAMPLEPOINT
500 mVThreshold
900 mVThreshold
NOISEMARGIN
NOISEMARGIN
RECEIVERDETECTIONWINDOW
Interoperability of 3.3-V CAN in 5-V CAN Systems
SN65HVD233
SN65HVD234
SN65HVD235
www.ti.com
.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
CAN is a differential bus where complementary signals are sent over two wires and the voltage differencebetween the two wires defines the logical state of the bus. The differential CAN receiver monitors this voltagedifference and outputs the bus state with a single-ended output signal.
Figure 29. Typical SN65HVD230 Differential Output Voltage Waveform
The CAN driver creates the difference voltage between CANH and CANL in the dominant state. The dominantdifferential output of the SN65HVD230 is greater than 1.5 V and less than 3 V across a 60-ohm load. Theminimum required by ISO 11898 is 1.5 V and maximum is 3 V. These are the same limiting values for 5 Vsupplied CAN transceivers. The bus termination resistors drive the recessive bus state and not the CAN driver.
A CAN receiver is required to output a recessive state with less than 500 mV and a dominant state with morethan 900 mV difference voltage on its bus inputs. The CAN receiver must do this with common-mode inputvoltages from -2 V to 7 volts. The SN65HVD230 family receivers meet these same input specifications as 5-Vsupplied receivers.
Common-Mode Signal
A common-mode signal is an average voltage of the two signal wires that the differential receiver rejects. Thecommon-mode signal comes from the CAN driver, ground noise, and coupled bus noise. Obviously, the supplyvoltage of the CAN transceiver has nothing to do with noise. The SN65HVD230 family driver lowers thecommon-mode output in a dominant bit by a couple hundred millivolts from that of most 5-V drivers. While thisdoes not fully comply with ISO 11898, this small variation in the driver common-mode output is rejected bydifferential receivers and does not effect data, signal noise margins or error rates.
The 3.3-V supplied SN65HVD23x family of CAN transceivers are electrically interchangeable with 5-V CANtransceivers. The differential output is the same. The recessive common-mode output is the same. The dominantcommon-mode output voltage is a couple hundred millivolts lower than 5-V supplied drivers, while the receiversexhibit identical specifications as 5-V devices.
Electrical interoperability does not assure interchangeability however. Most implementers of CAN busesrecognize that ISO 11898 does not sufficiently specify the electrical layer and that strict standard compliancealone does not ensure interchangeability. This comes only with thorough equipment testing.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
BUS CABLE
SLOPE CONTROL
1
2
3
4 5
6
7
8
CANL
R
CANH
Vcc
Rs
GND
LBK
DIOPF6
TMS320LF2407
10 kΩ
to
100 kΩ
0
5
10
15
20
25
0 4.7 6.8 10 15 22 33 47 68 100
Slope (V/us)
Slope Control Resistance - kΩ
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
The ISO-11898 Standard specifies a maximum bus length of 40 m and maximum stub length of 0.3 m with amaximum of 30 nodes. However, with careful design, users can have longer cables, longer stub lengths, andmany more nodes to a bus. A large number of nodes requires a transceiver with high input impedance such asthe HVD233.
The standard specifies the interconnect to be a single twisted-pair cable (shielded or unshielded) with 120- Ωcharacteristic impedance (Z
O
). Resistors equal to the characteristic impedance of the line terminate both ends ofthe cable to prevent signal reflections. Unterminated drop-lines (stubs) connecting nodes to the bus should bekept as short as possible to minimize signal reflections.
The rise and fall slope of the SN65HVD233, SN65HVD234, and SN65HVD235 driver output can be adjusted byconnecting a resistor from the Rs (pin 8) to ground (GND), or to a low-level input voltage as shown in Figure 30 .
The slope of the driver output signal is proportional to the pin's output current. This slope control is implementedwith an external resistor value of 10 k Ωto achieve a ≈15 V/ µs slew rate, and up to 100 k Ωto achieve a ≈2.0 V/ µsslew rate as displayed in Figure 31 . Typical driver output waveforms with slope control are displayed inFigure 32 .
Figure 30. Slope Control/Standby Connection to a DSP
Figure 31. HVD233 Driver Output Signal Slope vs Slope Control Resistance Value
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
Rs = 10 kΩ
Rs = 100 kΩ
Rs = 0Ω
STANDBY
SN65HVD233
SN65HVD234
SN65HVD235
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.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008
Figure 32. Typical SN65HVD233 250-kbps Output Pulse Waveforms With Slope Control
If a high-level input (> 0.75 V
CC
) is applied to Rs (pin 8), the circuit enters a low-current, listen only standby modeduring which the driver is switched off and the receiver remains active. The local controller can reverse thislow-power standby mode when the rising edge of a dominant state (bus differential voltage >900 mV typical)occurs on the bus.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
SN65HVD233
SN65HVD234
SN65HVD235
SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 ..............................................................................................................................................
www.ti.com
Revision History
Changes from Original (November 2002) to Revision A ................................................................................................ Page
•Changed the data sheet from Product Preview to Production for part number SN65HVD233. ............................................ 1
Changes from Revision A (March 2003) to Revision B .................................................................................................. Page
•Changed the data sheet from Product Preview to Production for part number SN65HVD234 and SN65HVD235. ............. 1•Added Table 2 , Thermal Characteristics ............................................................................................................................. 15•Changed the APPLICATION INFORMATION section. ........................................................................................................ 20
Changes from Revision B (June 2003) to Revision C .................................................................................................... Page
•Added I
O
, Receiver output current to the Abs Max Table ...................................................................................................... 3
Changes from Revision C (March 2005) to Revision D .................................................................................................. Page
•Added Features Bullet: GIFT/ICT Compliant (SN65HVD234) ............................................................................................... 1
Changes from Revision D (June 2005) to Revision E .................................................................................................... Page
•Added 60- Ωload test condition to Figure 19 ....................................................................................................................... 17•Deleted INTEROPERABILITY WITH 5-V CAN SYSTEMS section ..................................................................................... 20•Added ISO 11898 COMPLIANCE OF SN65HVD230 FAMILY OF 3.3-V CAN TRANSCEIVERS section .......................... 20
Changes from Revision E (October 2007) to Revision F ............................................................................................... Page
•Changed Figure 6 , Receiver Test Circuit and Voltage Waveform. From: C
L
= 50 pF ± 20% to: C
L
= 15 pF ± 20% ............... 9
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Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235
PACKAGE OPTION ADDENDUM
www.ti.com 23-Oct-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN65HVD233D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples
SN65HVD233DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples
SN65HVD233DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN65HVD233DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN65HVD234D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples
SN65HVD234DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples
SN65HVD234DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN65HVD234DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN65HVD235D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples
SN65HVD235DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples
SN65HVD235DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN65HVD235DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
PACKAGE OPTION ADDENDUM
www.ti.com 23-Oct-2010
Addendum-Page 2
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
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OTHER QUALIFIED VERSIONS OF SN65HVD233 :
•Enhanced Product: SN65HVD233-EP
NOTE: Qualified Version Definitions:
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
SN65HVD233DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN65HVD234DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN65HVD235DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Aug-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN65HVD233DR SOIC D 8 2500 340.5 338.1 20.6
SN65HVD234DR SOIC D 8 2500 340.5 338.1 20.6
SN65HVD235DR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Aug-2008
Pack Materials-Page 2
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