LC2MOS 4-/8-Channel High Performance Analog Multiplexers ADG408/ADG409 FEATURES FUNCTIONAL BLOCK DIAGRAMS 44 V supply maximum ratings VSS to VDD analog signal range Low on resistance (100 maximum) Low power (ISUPPLY < 75 A) Fast switching Break-before-make switching action Plug-in replacement for DG408/DG409 ADG408 ADG409 S1 S1A DA S4A D S1B DB S8 1-OF-8 DECODER Audio and video routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Communication systems 1-OF-4 DECODER A0 A1 A2 EN A0 A1 EN 00027-001 APPLICATIONS S4B Figure 1. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG408/ADG409 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG408 switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1, and A2. The ADG409 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When the device is disabled, all channels are switched off. 1. Extended Signal Range. The ADG408/ADG409 are fabricated on an enhanced LC2MOS process, giving an increased signal range that extends to the supply rails. 2. Low Power Dissipation. 3. Low RON. 4. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG408/ADG409 can be operated from a single rail power supply. The parts are fully specified with a single 12 V power supply and remain functional with single supplies as low as 5 V. The ADG408/ADG409 are designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All channels exhibit breakbefore-make switching action, preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. The ADG408/ADG409 are improved replacements for the DG408/DG409 analog multiplexers. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved. ADG408/ADG409 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................6 Applications....................................................................................... 1 ESD Caution...................................................................................6 Functional Block Diagrams............................................................. 1 Pin Configurations and Function Descriptions ............................7 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................8 Product Highlights ........................................................................... 1 Test Circuits..................................................................................... 11 Revision History ............................................................................... 2 Terminology .................................................................................... 13 Specifications..................................................................................... 3 Outline Dimensions ....................................................................... 14 Dual Supply ................................................................................... 3 Ordering Guide .......................................................................... 16 Single Supply ................................................................................. 4 REVISION HISTORY 10/06--Rev. B to Rev. C Updated Format..................................................................Universal Changes to Table 3............................................................................ 6 Inserted Table 4 and Table 5............................................................ 7 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 3/03--Rev. A to Rev. B Changes to Ordering Guide .............................................................4 Updated Outline Dimensions....................................................... 11 2/01--Revision 0: Initial Version Rev. C | Page 2 of 16 ADG408/ADG409 SPECIFICATIONS DUAL SUPPLY VDD = 15 V, VSS = -15 V, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range RON RON LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) ADG408 ADG409 Channel On Leakage ID, IS (ON) ADG408 ADG409 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tTRANSITION B Version -40C to +25C +85C T Version -55C to +25C +125C VSS to VDD 40 100 15 125 0.5 VSS to VDD Unit V typ max max Test Conditions/Comments 40 100 15 125 50 0.5 50 nA max 1 1 100 50 1 1 100 50 nA max nA max 1 1 100 50 1 1 100 50 nA max nA max 2.4 0.8 V min V max 10 A max pF typ VIN = 0 or VDD f = 1 MHz 120 250 10 ns typ ns max ns min 125 225 65 150 RL = 300 , CL = 35 pF; VS1 = 10 V, VS8 = m 10 V; see Figure 22 RL = 300 , CL = 35 pF; VS = 5 V; see Figure 23 RL = 300 CL = 35 pF; VS = 5 V; see Figure 24 RL = 300 , CL = 35 pF; VS = 5 V; see Figure 24 VS = 0 V, RS = 0 , CL = 10 nF; see Figure 25 RL = 1 k, f = 100 kHz; VEN = 0 V; see Figure 26 RL = 1 k, f = 100 kHz; see Figure 27 f = 1 MHz f = 1 MHz VD = 10 V, IS = -10 mA VD = +10 V, -10 V VD = 10 V, VS = m 10 V; see Figure 19 VD = 10 V; VS = m 10 V; see Figure 20 VS = VD = 10 V; see Figure 21 2.4 0.8 10 8 tOPEN 10 tON (EN) 85 150 8 120 250 10 Charge Injection OFF Isolation 20 -75 20 -75 ns typ ns max ns typ ns max pC typ dB typ Channel-to-Channel Crosstalk CS (OFF) CD (OFF) ADG408 ADG409 CD, CS (ON) ADG408 ADG409 85 11 85 11 dB typ pF typ 40 20 40 20 pF typ pF typ 54 34 54 34 pF typ pF typ tOFF (EN) 125 225 65 150 10 85 150 f = 1 MHz Rev. C | Page 3 of 16 ADG408/ADG409 Parameter POWER REQUIREMENTS IDD B Version -40C to +85C +25C 1 5 1 5 ISS IDD 1 T Version -55C to +125C +25C 100 200 1 5 1 5 100 200 500 500 Unit Test Conditions/Comments A typ A max A typ A max A typ A max VIN = 0 V, VEN = 0 V VIN = 0 V, VEN = 2.4 V Guaranteed by design, not subject to production test. SINGLE SUPPLY VDD = 12 V, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range RON LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) ADG408 ADG409 Channel On Leakage ID, IS (ON) ADG408 ADG409 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tTRANSITION tOPEN B Version -40C to +25C +85C T Version -55C to +25C +125C 0 to VDD 90 0 to VDD 90 Unit Test Conditions/Comments V typ VD = 3 V, 10 V, IS = -1 mA 0.5 50 0.5 50 nA max 1 1 100 50 1 1 100 50 nA max nA max 1 1 100 50 1 1 100 50 nA max nA max 2.4 0.8 V min V max 10 VD = 8 V/0 V, VS = 0 V/8 V; see Figure 19 VD = 8 V/0 V, VS = 0 V/8 V; see Figure 20 VS = VD = 8 V/0 V; see Figure 21 2.4 0.8 8 10 8 A max pF typ VIN = 0 or VDD f = 1 MHz 130 130 ns typ 10 10 ns typ RL = 300 , CL = 35 pF; VS1 = 8 V/0 V, VS8 = 0 V/8 V; see Figure 22 RL = 300 , CL = 35 pF; tON (EN) 140 140 ns typ tOFF (EN) 60 60 ns typ Charge Injection Off Isolation 5 -75 5 -75 pC typ dB typ Rev. C | Page 4 of 16 VS = 5 V; see Figure 23 RL = 300 CL = 35 pF; VS = 5 V; see Figure 24 RL = 300 , CL = 35 pF; VS = 5 V; see Figure 24 VS = 0 V, RS = 0, CL = 10 nF; see Figure 25 RL = 1 k f = 100 kHz; VEN = 0 V; see Figure 26 ADG408/ADG409 Parameter Channel-to-Channel Crosstalk CS (OFF) CD (OFF) ADG408 ADG409 CD, CS (ON) ADG408 ADG409 POWER REQUIREMENTS IDD IDD 1 B Version -40C to +25C +85C 85 11 T Version -55C to +125C +25C 85 11 Unit dB typ pF typ 40 20 40 20 pF typ pF typ 54 34 54 34 pF typ pF typ Test Conditions/Comments RL = 1 k, f = 100 kHz; see Figure 27 f = 1 MHz f = 1 MHz f = 1 MHz 1 5 100 200 500 1 5 100 200 500 Guaranteed by design, not subject to production test. Rev. C | Page 5 of 16 A typ A max A typ A max VIN = 0 V, VEN = 0 V VIN = 0 V, VEN = 2.4 V ADG408/ADG409 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 3. Parameter VDD to VSS VDD to GND VSS to GND Analog, Digital Inputs Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Maximum) Operating Temperature Range Industrial (B Version) Extended (T Version) Storage Temperature Range Junction Temperature CERDIP Package, Power Dissipation JA, Thermal Impedance Lead Temperature, Soldering (10 sec) PDIP Package, Power Dissipation JA, Thermal Impedance Lead Temperature, Soldering (10 sec) TSSOP Package, Power Dissipation JA, Thermal Impedance JC, Thermal Impedance SOIC Package, Power Dissipation JA, Thermal Impedance Lead Temperature, Soldering Vapor Phase (60 sec) Infrared (15 sec) Rating 44 V -0.3 V to +32 V +0.3 V to -32 V VSS - 2 V to VDD + 2 V or 20 mA, whichever occurs first 20 mA 40 mA Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION -40 C to +85C -55 C to +125C -65 C to +150C 150C 900 mW 76C/W 300C 470 mW 117C/W 260C 450 mW 155C/W 50C/W 600 mW 77C/W 215C 220C Rev. C | Page 6 of 16 ADG408/ADG409 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 16 A1 EN 2 VSS 3 ADG408 14 GND TOP VIEW 13 VDD S2 5 (Not to Scale) 12 S5 S3 6 11 S6 S4 7 10 S7 D 8 9 S8 00027-002 S1 4 15 A2 A0 1 16 A1 EN 2 15 GND VSS 3 S1A 4 S2A 5 S3A 6 11 S3B S4A 7 10 S4B DA 8 9 DB ADG409 VDD TOP VIEW (Not to Scale) 13 S1B 12 S2B 14 00027-003 A0 1 Figure 2. ADG408 Pin Configuration Figure 3. ADG409 Pin Configuration Table 4. ADG408 Pin Function Descriptions Table 5. ADG409 Pin Function Descriptions Pin No. 1 2 Mnemonic A0 EN Pin No. 1 2 Mnemonic A0 EN 3 VSS 3 VSS 4 S1 4 S1A 5 S2 5 S2A 6 S3 6 S3A 7 S4 7 S4A 8 D 8 DA 9 S8 9 DB 10 S7 10 S4B 11 S6 11 S3B 12 S5 12 S2B 13 14 15 16 VDD GND A2 A1 13 S1B 14 15 16 VDD GND A1 Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to ground. Source Terminal 1. Can be an input or an output. Source Terminal 2. Can be an input or an output. Source Terminal 3. Can be an input or an output. Source Terminal 4. Can be an input or an output. Drain Terminal. Can be an input or an output. Source Terminal 8. Can be an input or an output. Source Terminal 7. Can be an input or an output. Source Terminal 6. Can be an input or an output. Source Terminal 5. Can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Logic Control Input. Table 6. ADG408 Truth Table A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to ground. Source Terminal 1A. Can be an input or an output. Source Terminal 2A. Can be an input or an output. Source Terminal 3A. Can be an input or an output. Source Terminal 4A. Can be an input or an output. Drain Terminal A. Can be an input or an output. Drain Terminal B. Can be an input or an output. Source Terminal 4B. Can be an input or an output. Source Terminal 3B. Can be an input or an output. Source Terminal 2B. Can be an input or an output. Source Terminal 1B. Can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Table 7. ADG409 Truth Table ON SWITCH NONE 1 2 3 4 5 6 7 8 A1 X 0 0 1 1 Rev. C | Page 7 of 16 A0 X 0 1 0 1 EN 0 1 1 1 1 ON SWITCH PAIR NONE 1 2 3 4 ADG408/ADG409 TYPICAL PERFORMANCE CHARACTERISTICS 120 180 TA = 25C TA = 25C 160 VDD = +5V VSS = -5V 100 VDD = 5V VSS = 0V 140 RON () 80 VDD = +10V VSS = -10V RON () VDD = +12V VSS = -12V 60 120 VDD = 12V VSS = 0V VDD = 10V VSS = 0V 100 80 VDD = +15V VSS = -15V -10 -5 0 VD [VS] (V) 5 10 15 40 00027-004 20 -15 130 VDD = +15V VSS = -15V 9 12 15 VDD = 12V VSS = 0V 120 110 70 RON () RON () 6 Figure 7. RON as a Function of VD (VS): Single-Supply Voltage 80 125C 60 85C 50 100 125C 90 85C 80 25C 30 -15 -10 70 -5 0 5 10 15 VD [VS] (V) 60 00027-005 40 Figure 5. RON as a Function of VD (VS) for Different Temperatures 25C 0 2 4 6 VD [VS] (V) 8 10 12 Figure 8. RON as a Function of VD (VS) for Different Temperature 0.2 0.04 TA = 25C VDD = +15V VSS = -15V TA = 25C VDD = 12V VSS = 0V LEAKAGE CURRENT (nA) 0.02 0.1 IS (OFF) 0 ID (OFF) ID (ON) -0.1 ID (ON) 0 ID (OFF) IS (OFF) -0.02 -0.2 -15 -10 -5 0 VD [VS] (V) 5 10 15 Figure 6. Leakage Currents as a Function of VD (VS) -0.06 0 2 4 6 VD [VS] (V) 8 10 Figure 9. Leakage Currents as a Function of VD (VS) Rev. C | Page 8 of 16 12 00027-009 -0.04 00027-006 LEAKAGE CURRENT (nA) 3 00027-008 90 0 VD [VS] (V) Figure 4. RON as a Function of VD (VS): Dual-Supply Voltage 100 VDD = 15V VSS = 0V 60 00027-007 40 ADG408/ADG409 120 140 VDD = 12V VSS = 0V VDD = +15V VSS = -15V 120 TIME (ns) TIME (ns) 80 tON (EN) 60 1 3 5 7 80 60 9 11 13 15 VIN (V) 40 00027-010 20 100 tOFF (EN) 40 tON (EN) tOFF (EN) 1 3 5 7 VIN (V) 9 11 13 00027-013 tTRANSITION 100 tTRANSITION Figure 13. Switching Time vs. VIN (Single Supply) Figure 10. Switching Time vs. VIN (Bipolar Supply) 400 300 VIN = 5V VIN = 5V 300 200 TIME (ns) tON (EN) 200 tTRANSITION tON (EN) 100 100 5 7 9 11 VSUPPLY (V) 13 15 0 00027-011 0 tOFF (EN) tOFF (EN) 5 Figure 11. Switching Time vs. Single Supply 7 9 11 VSUPPLY (V) 13 15 00027-014 TIME (ns) tTRANSITION Figure 14. Switching Time vs. Bipolar Supply 10k 10k VDD = +15V VSS = -15V VDD = +15V VSS = -15V ISS (A) 100 1k EN = 2.4V 10 EN = 0V EN = 2.4V 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 12. Positive Supply Current vs. Switching Frequency -10 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 15. Negative Supply Current vs. Switching Frequency Rev. C | Page 9 of 16 00027-015 EN = 0V 100 00027-012 IDD (A) 1k ADG408/ADG409 110 110 VDD = +15V VSS = -15V VDD = +15V VSS = -15V 100 CROSSTALK (dB) 90 90 80 80 70 1k 10k 100k FREQUENCY (Hz) 1M Figure 16. Off Isolation vs. Frequency 60 1k 10k 100k FREQUENCY (Hz) Figure 17. Crosstalk vs. Frequency Rev. C | Page 10 of 16 1M 00027-017 70 00027-016 OFF ISOLATION (dB) 100 ADG408/ADG409 TEST CIRCUITS IDS S1 VSS VDD VSS S2 D S8 D GND VS RON = V1/IDS Figure 20. ID (OFF) VDD VSS VDD VSS VDD VSS VDD VSS S1 A VS S2 D S8 0.8V GND VD EN ID (ON) GND VS Figure 19. IS (OFF) 50% EN A 2.4V VD Figure 21. ID (ON) 3V ADDRESS DRIVE (VIN) D S8 00027-019 IS (OFF) A VD Figure 18. On Resistance S1 ID (OFF) 0.8V 00027-018 VS EN 00027-021 S 00027-020 V1 VDD 50% tr < 20ns tf < 20ns VDD VSS VDD VSS A0 0V VIN S1 A1 50 A2 tTRANSITION VS1 S2-S7 tTRANSITION VS8 S8 ADG4081 90% 2.4V OUTPUT OUTPUT D EN 300 GND 35pF 00027-022 90% 1SIMILAR CONNECTION FOR ADG409. Figure 22. Switching Time of Multiplexer, tTRANSlTlON 3V ADDRESS DRIVE (VIN) VDD VSS VDD VSS A0 VIN 0V S1 A1 50 VS S2-S7 A2 S8 80% ADG4081 80% OUTPUT 2.4V OUTPUT D EN GND 300 35pF 1SIMILAR CONNECTION FOR ADG409. Figure 23. Break-Before-Make Delay, tOPEN Rev. C | Page 11 of 16 00027-023 tOPEN ADG408/ADG409 3V 50% VSS VDD VSS A0 50% S1 A1 0V A2 tON (EN) ADG4081 tOFF (EN) 0.9VO 0.9VO OUTPUT OUTPUT D EN VIN VS S2-S8 50 1SIMILAR 35pF 300 GND 00027-024 ENABLE DRIVE (VIN) VDD CONNECTION FOR ADG409. Figure 24. Enable Delay, tON (EN), tOFF (EN) 3V VDD VSS VDD VSS A0 A1 VIN A2 ADG4081 VOUT RS VOUT S D VOUT EN VS QINJ = CL x VOUT CL 10nF GND 1SIMILAR 00027-025 VIN CONNECTION FOR ADG409. Figure 25. Charge Injection VDD VSS VDD VSS A1 ADG408 A2 VOUT D S1 0V VSS EN 2.4V ADG408 D S1 VOUT 1k 1k S8 1k S2 S8 EN GND OFF ISOLATION = 20 log VOUT/VIN VS 00027-026 VS VDD GND CROSSTALK = 20 log VOUT/VIN Figure 27. Channel-to-Channel Crosstalk Figure 26. Off Isolation Rev. C | Page 12 of 16 00027-027 A2 VSS A0 A0 A1 VDD ADG408/ADG409 TERMINOLOGY RON Ohmic resistance between D and S. tTRANSITION Delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. RON Difference between the RON of any two channels. IS (OFF) Source leakage current when the switch is off. tOPEN Off time measured between the 80% point of both switches when switching from one address state to another. ID (OFF) Drain leakage current when the switch is off. VINL Maximum input voltage for Logic 0. ID, IS (ON) Channel leakage current when the switch is on. VINH Minimum input voltage for Logic 1. VD (VS) Analog voltage on Terminal D and Terminal S. IINL (IINH) Input current of the digital input. CS (OFF) Channel input capacitance for off condition. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. CD (OFF) Channel output capacitance for off condition. Off Isolation A measure of unwanted signal coupling through an off channel. CD, CS (ON) On switch capacitance. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. CIN Digital input capacitance. tON (EN) Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF (EN) Delay time between the 50% and 90% points of the digital input and switch off condition. IDD Positive supply current. ISS Negative supply current. Rev. C | Page 13 of 16 ADG408/ADG409 OUTLINE DIMENSIONS 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) 16 9 1 8 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) PIN 1 0.100 (2.54) BSC 0.060 (1.52) MAX 0.210 (5.33) MAX 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) MIN 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.005 (0.13) MIN 0.430 (10.92) MAX 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANT TO JEDEC STANDARDS MS-001-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 28. 16-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-16) Dimensions shown in inches and (millimeters) 0.005 (0.13) MIN 0.098 (2.49) MAX 16 9 1 PIN 1 8 0.310 (7.87) 0.220 (5.59) 0.100 (2.54) BSC 0.840 (21.34) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.070 (1.78) PLANE 0.030 (0.76) 15 0 0.015 (0.38) 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 29. 16-Lead Ceramic Dual In-Line Package [CERDIP] (Q-16) Dimensions shown in inches and (millimeters) Rev. C | Page 14 of 16 ADG408/ADG409 10.00 (0.3937) 9.80 (0.3858) 4.00 (0.1575) 3.80 (0.1496) 16 9 1 8 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 6.20 (0.2441) 5.80 (0.2283) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) x 45 0.25 (0.0098) 8 0.51 (0.0201) SEATING 0.25 (0.0098) 0 1.27 (0.0500) PLANE 0.31 (0.0122) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AC CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 30. 16-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-16) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.65 BSC 0.30 0.19 COPLANARITY 0.10 0.20 0.09 SEATING PLANE 8 0 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 31. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters Rev. C | Page 15 of 16 0.75 0.60 0.45 ADG408/ADG409 ORDERING GUIDE Model ADG408BN ADG408BNZ 1 ADG408BR ADG408BR-REEL ADG408BR-REEL7 ADG408BRU ADG408BRU-REEL ADG408BRU-REEL7 ADG408BRUZ1 ADG408BRUZ-REEL1 ADG408BRUZ-REEL71 ADG408BRZ1 ADG408BRZ-REEL1 ADG408BRZ-REEL71 ADG408TQ ADG408BCHIPS ADG409BN ADG409BNZ1 ADG409BR ADG409BR-REEL ADG409BR-REEL7 ADG409BRU ADG409BRU-REEL ADG409BRU-REEL7 ADG409BRUZ1 ADG409BRUZ-REEL1 ADG409BRUZ-REEL71 ADG409BRZ1 ADG409BRZ-REEL1 ADG409BRZ-REEL71 ADG409TQ 1 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -55C to +125C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -55C to +125C Package Description 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Ceramic Dual In-Line Package [CERDIP] DIE 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Narrow Body Small Outline Package [SOIC_N] 16-Lead Ceramic Dual In-Line Package [CERDIP] Z = Pb-free part. (c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00027-0-10/06(C) Rev. C | Page 16 of 16 Package Option N-16 N-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 R-16 R-16 R-16 Q-16 N-16 N-16 R-16 R-16 R-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 R-16 R-16 R-16 Q-16