PIC16F7X7
DS30498C-page 268 2004 Microchip Technology Inc.
R
RA0/AN0 Pin...................................................................8, 11
RA1/AN1 Pin...................................................................8, 11
RA2/AN2/VREF-/CVREF Pin....... ....................... ...............8, 11
RA3/AN3/VREF+ Pin ........................................................8, 11
RA4/T0CKI/C1OUT Pin...................................................8, 11
RA5/AN4/LVDIN/SS/C2OUT Pin ....................................8, 11
RAM. See Data Memory .
RB0/INT/AN12 Pin..........................................................9, 12
RB1/AN1 0 Pin......................... ............................... .........9, 12
RB2/AN8 Pin...................................................................9, 12
RB3/CCP2/ AN9 Pin ........................ ........................... .....9, 12
RB4/AN1 1 Pin......................... ............................... .........9, 12
RB5/AN1 3/ CCP3 Pin....... ............... ........................... .....9, 12
RB6/PGC Pin..................................................................9, 12
RB7/PGD Pin..................................................................9, 12
RC0/T1OSO/T1CKI Pin........ .............. ..........................10, 13
RC1/T1OSI/CCP2 Pin...................................................10, 13
RC2/CCP1 Pin..............................................................10, 13
RC3/SCK/SCL Pin .................... ........................... .........10, 13
RC4/SDI/SDA Pin .........................................................10, 13
RC5/SDO Pin... .................. ............................ ...............10, 13
RC6/TX/ CK Pin...... ................... ........................... .........10, 13
RC7/RX/DT Pin.............................................................10, 13
RCIO Oscillator...................................................................35
RCSTA Register
ADDEN Bit................................................................134
CREN Bit........ ................... ........................... .............134
FERR Bit...................................................................134
OERR Bit ..................................................................134
RX9 Bit......................................................................134
RX9D Bit...................................................................134
SPEN Bit...........................................................133, 134
SREN Bit....................... ................................... .........134
RD0/PSP0 Pin.................... ........................ .........................14
RD1/PSP1 Pin.................... ........................ .........................14
RD2/PSP2 Pin.................... ........................ .........................14
RD3/PSP3 Pin.................... ........................ .........................14
RD4/PSP4 Pin.................... ........................ .........................14
RD5/PSP5 Pin.................... ........................ .........................14
RD6/PSP6 Pin.................... ........................ .........................14
RD7/PSP7 Pin.................... ........................ .........................14
RE0/RD/AN5 Pin.................................................................14
RE1/WR/AN6 Pin................................................................14
RE2/CS/AN7 Pin................................. ................................14
Register File................. ....................... ....................... .........15
Registers
ADCON0 (A/D Control 0)..........................................152
ADCON1 (A/D Control 1)..........................................153
ADCON2 (A/D Control 2)..........................................154
CCPxCON (CCPx Control)....... ...... ............... ........... ..88
CMCON (Comparator Control) .................................161
CVRCON (Comparator Voltage
Reference Control)............................................167
Initialization Conditions (table)................. .. .... .. .180–181
INTCON (Interrupt Control).........................................23
LVDCON (Low-Voltage Detect Control)....................176
OPTION_R EG (Option Control)...... ............... .......22, 75
OSCCON (Oscillator Control).....................................38
OSCTUNE (Oscillator Tu n in g )........ ............... .............36
PCON (Power Control/Status)....................................28
PIE1 (Peripheral Interrupt Enable 1)...........................24
PIE2 (Peripheral Interrupt Enable 2)...........................26
PIR1 (Peripheral Interrupt
Request (Flag) 1)................................... .. .... .......25
PIR2 (Peripheral Interrupt
Request (Flag) 2)................................................ 27
PMCON1 (Program Memory Control 1)...................... 31
RCSTA (Receive Status and Control) ...................... 134
Special Function, Summary.................................. 18–20
SSPCON (MS SP Control Register 1,
I2C Mode)......................................................... 104
SSPCON (MS SP Control Register 1,
SPI Mode)........................................................... 95
SSPCON2 (M SSP Control Register 2,
I2C Mode)......................................................... 105
SSPSTAT (MSS P St atus, I2C Mode) ................... .. .. 103
SSPSTA T (MSS P St atus, SPI Mode)............ ............ . 94
Status ......................................................................... 21
T1CON (Timer1 Con tr o l)...... ................... ............... .... 78
T2CON (Timer2 Con tr o l)...... ................... ............... .... 86
TRISE......................................................................... 69
TXSTA (Transmit Status and Control)...................... 133
WDTCON (Watchdog Timer Contr ol)....................... 187
Reset ........................................................................169, 172
Brown-out Reset (BOR).
See Brown-out Reset (BOR).
MCLR Reset. See MCLR.
Power-on Reset (POR).
See Pow er-on Reset (POR ).
Reset Conditions for All Registers.................... 180, 181
Reset Conditions for PCON Register ....................... 179
Reset Conditions for Program Counter..................... 179
Reset Conditions for Status Register........................ 179
WDT Reset. See Watchdog Timer (WDT).
Revision History................................................................ 261
S
SCI. See AUSART.
SCK .................................................................................... 93
SDI...................................................................................... 93
SDO.................................................................................... 93
Serial Clock, SCK............................................................... 93
Serial Communication Interface. See AUS ART.
Serial Data In, SDI.............................................................. 93
Serial Data Out, SDO ......................................................... 93
Serial Peripheral Interface. See SPI.
Slave Select, SS................................................................. 93
Sleep................................... .... .. .. .... ..... .... .. .. .... . 169, 172, 190
Softwar e Simulat or (MPLAB SIM) .................................. ..202
Software Simulator (MPLAB SIM30) ................................ 202
Special Feature s of th e CPU............. .................. ............. 169
Special Function Registers..................................... 18, 18–20
SPI Master Mode................................................................ 98
SPI Mode............................................................................ 93
Associ a te d Re g i sters......................... ....................... 101
Bus Mode Compatibility............... .......... ........... ...... .. 101
Clock........................................................................... 98
Effects of a Reset.............................. ....................... 101
Enabling SPI I/O......................................................... 97
Master/Slave Connection.................................. .... .. .. .. 97
Serial Clock................................................................. 93
Serial Data In.............................................................. 93
Serial Data Out........................................................... 93
Slave Select............................... ............................... ..93
Slave Select Synch r o n i zation.......... ........................... 99
Sleep Operation........................................................ 101
Typical Connection.......................... .. .. .... .. ....... .... .. .... 97
SPI Slave Mode.................................................................. 99