INTEGRATED CIRCUITS DIVISION
www.ixysic.com
DS-PLA192-R08 1
PLA192
Single Pole, Normally Open
OptoMOS® Relay
Part # Description
PLA192E 6-Pin DIP (50/Tube)
PLA192ES 6-Pin Surface Mount (50/Tube)
PLA192ESTR 6-Pin Surface Mount (1000/Reel)
PLA192 6-Pin DIP (50/Tube)
PLA192S 6-Pin Surface Mount (50/Tube)
PLA192STR 6-Pin Surface Mount (1000/Reel)
Parameters Ratings Units
Blocking Voltage 600 VP
Load Current 150 mArms / mADC
On-Resistance (max) 22
LED Current to Operate 5 mA
Applications
Features
Description
Approvals
Ordering Information
Pin Configuration
• Instrumentation
• Multiplexers
• Data Acquisition
• Electronic Switching
• I/O Subsystems
• Meters (Watt-Hour, Water, Gas)
• Medical Equipment: Patient/Equipment Isolation
• Aerospace
• Industrial Controls
Switching Characteristics of
Normally Open Devices
Form-A
IF
ILOAD
10%
90%
ton toff
• UL Recognized Component: File E76270
• CSA Certified Component: Certificate 1175739
• DIN EN 60747-5-5 Certified ("E" Suffix Only)
VDE Certificate 40036603
• EN/IEC 60950-1 Certified Component:
Certificate available on our website
1
3
2
4
5
6
+ Control
- Control
Do Not Use
+ Load
- Load
DC Only Configuration
1
3
2
4
5
6
+ Control
- Control
Do Not Use
Load
Do Not Use
Load
AC/DC Configuration
• PLA192E is 100% Tested for Partial Discharge:
DIN EN 60747-5-5
• 5000Vrms Input/Output Isolation
• Low Drive Power Requirements
• High Reliability
• Arc-Free With No Snubbing Circuits
• No EMI/RFI Generation
• Small 6-Pin Package
• Flammability Rating UL 94 V-0
IXYS Integrated Circuits' PLA192 is a single-pole,
normally open (1-Form-A) solid state relay that
provides 5000Vrms of input to output isolation.
In addition to all the features and benefits of the
PLA192, the PLA192E meets the partial discharge
demands of DIN EN 60747-5-5 (previously VDE
0884).
All versions of the PLA192 can be used to replace
mechanical relays, while offering the superior
reliability associated with semiconductor devices.
Optically coupled outputs that use the patented
OptoMOS architecture are controlled by a highly
efficient infrared LED. Because they have no moving
parts, they offer bounce-free switching in more
compact surface mount or thru-hole packages.
INTEGRATED CIRCUITS DIVISION
www.ixysic.com
2R08
PLA192
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to the
device. Functional operation of the device at conditions beyond
those indicated in the operational sections of this data sheet is
not implied.
Typical values are characteristic of the device at +25°C, and
are the result of engineering evaluations. They are provided for
information purposes only, and are not part of the manufacturing
testing requirements.
Parameter Rating Units
Blocking Voltage 600 VP
Reverse Input Voltage 5 V
Input Control Current 50 mA
Peak (10ms) 1 A
Input Power Dissipation 1150 mW
Total Package Dissipation 2800 mW
Isolation Voltage, Input to Output
(60 Seconds) 5000 Vrms
ESD Rating, Human Body Model 4 kV
Operational Temperature -40 to +85 ºC
Storage Temperature -40 to +125 ºC
1 Derate linearly 1.33 mW / ºC
2 Derate linearly 6.67 mW / ºC
Absolute Maximum Ratings @ 25ºC (Unless Otherwise Noted)
Electrical Characteristics @ 25ºC (Unless Otherwise Noted)
Parameters Conditions Symbol Min Typ Max Units
Output Characteristics
Load Current
Continuous, AC/DC Configuration - IL
- - 150 mArms / mADC
Continuous, DC-Only Configuration - - - 220 mADC
Peak t=10ms ILPK - - ±400 mAP
On-Resistance
AC/DC Configuration IL=150mA RON
- 13.3 22
DC-Only Configuration IL=220mA - 4.15 8
Off-State Leakage Current VL=600VPILEAK -- 1 A
Switching Speeds
Turn-On IF=5mA, VL=10V ton -- 5 ms
Turn-Off toff -- 5
Output Capacitance IF=0mA, VL=50V, f=1MHz COUT -10 - pF
Input Characteristics
Input Control Current to Activate IL=100mA IF- 0.22 5 mA
Input Control Current to Deactivate - IF0.1 0.21 - mA
Input Voltage Drop IF=5mA VF0.9 1.2 1.5 V
Reverse Input Current VR=5V IR--10 A
Common Characteristics
Input to Output Capacitance VIO=0V, f=1MHz CIO -3 - pF
PLA192E Safety and Insulation Ratings
Parameters Conditions Symbol Min Max Units
Pollution Degree 2 according to DIN VDE 0109 - ----
Highest Allowable Over-Voltage Transient Voltage VIOTM 7071 - VP
Maximum Working Insulation Voltage Recurring Voltage VIORM 1000 - VP
Partial Discharge Test Voltage DIN EN 60747-5-5 Method B VPR - 1875 VP
Isolation Test Voltage - VISO - 5000 Vrms
Creepage Distance - - 7.6 - mm
Clearance Distance - - 7.6 - mm
INTEGRATED CIRCUITS DIVISION
PLA192
www.ixysic.com 3
R08
Typical LED Forward Voltage Drop
(N=50, IF=5mA)
35
30
25
20
15
10
5
0
1.25 1.26 1.27 1.28 1.29
LED Forward Voltage Drop (V)
Device Count (N)
Typical Turn-On Time
(N=50, IF=5mA, IL=100mADC )
1.7 1.9 2.11.6 1.8 2.0
Turn-On Time (ms)
Device Count (N)
0
5
10
15
25
20
30
35
Typical Turn-Off Time
(N=50, IF=5mA, IL=100mADC )
0.26 0.32 0.380.350.290.23
Turn-Off Time (ms)
Device Count (N)
35
30
25
20
15
10
5
0
LED Current (mA)
0.20 0.21 0.22 0.23 0.24 0.25 0.26
Device Count (N)
0
5
10
15
20
25
30
Typical IF for Switch Operation
(N=50, IL=100mA)
On-Resistance (:)
13.1 13.2 13.3 13.4 13.5 13.6
Device Count (N)
0
5
10
15
20
25
30
35
40
Typical On-Resistance Distribution
(N=50, IF=5mA, IL=150mA)
On-Resistance (:)
4.05 4.10 4.15 4.20 4.25 4.30
Device Count (N)
0
5
10
15
20
25
30
DC-Only On-Resistance Distribution
(N=50, IF=5mA, IL=220mA)
Typical Blocking Voltage Distribution
(N=50)
30
25
20
15
10
5
0
710 730 750700 720 740
Blocking Voltage (VP)
Device Count (N)
Forward Current (mA)
0 1020304050
Turn-Off Time (Ps)
355
356
357
358
359
360
361
Typical Turn-Off Time
vs. LED Forward Current
(IL=100mA)
Temperature (ºC)
-40 -20 0 20 40 60 80 100
LED Forward Voltage Drop (V)
1.0
1.1
1.2
1.3
1.4
1.5
1.6
Typical LED Forward Voltage Drop
vs. Temperature
IF=50mA
IF=20mA
IF=10mA
IF=5mA
LED Current (mA)
0 1020304050
Turn-On Time (Ps)
0
500
1000
1500
2000
2500
3000
3500
4000
4500
Typical Turn-On Time
vs. LED Forward Current
(IL=100mA)
PERFORMANCE DATA*
*Unless otherwise noted, data presented in these graphs is typical of device operation at 25ºC.
For guaranteed parameters not indicated in the written specifications, please contact our application department.
INTEGRATED CIRCUITS DIVISION
www.ixysic.com
4R08
PLA192
Temperature (ºC)
-40 -20 0 20 40 60 80 100
LED Current to Operate (mA)
0.16
0.18
0.20
0.22
0.24
0.26
0.28
0.30
Typical IF for Switch Operation
vs. Temperature
(IL=100mA)
Temperature (ºC)
-40 -20 0 20 40 60 80 100
Turn-On Time (Ps)
500
1000
1500
2000
2500
3000
3500
4000
4500
Typical Turn-On Time
vs. Temperature
(IL=100mA)
IF=10mA
IF=2mA
IF=5mA
Temperature (ºC)
-40 -20 0 20 40 60 80 100
Turn-Off Time (Ps)
200
250
300
350
400
450
500
Typical Turn-Off Time
vs. Temperature
(IL=100mA)
IF=10mA
IF=5mA
IF=2mA
Temperature (ºC)
-40 -20 0 20 40 60 80 100
On-Resistance (:)
8
10
12
14
16
18
Typical AC/DC On-Resistance
vs. Temperature
(IF=5mA, IL=150mA)
Temperature (ºC)
-40 -20 0 20 40 60 80 100
On-Resistance (:)
1
2
3
4
5
6
7
Typical DC-Only On-Resistance
vs. Temperature
(IF=5mA, IL=220mA)
Temperature (ºC)
-40 -20 0 20 40 60 80 100
Load Current (mA)
50
100
150
200
250
Maximum Load Current
vs. Temperature
(IF=5mA)
AC/DC Configuration
DC-Only Configuration
Voltage (V)
0123
Current (A)
-0.15
-0.10
-0.05
0.00
0.05
0.10
0.15
Typical Load Current vs. Load Voltage
AC/DC Configuration
(IF=5mA)
-3 -2 -1
Voltage (V)
0.0 0.2 0.4 0.6 0.8 1.0 1.2
Current (A)
0.00
0.05
0.10
0.15
0.20
0.25
Typical Load Current vs. Load Voltage
DC-Only Configuration
(IF=5mA)
Typical Blocking Voltage
vs. Temperature
Temperature (ºC)
Blocking Voltage (VP)
-40
770
760
750
740
730
720
710
700 -20 0 20 40 60 80 100
Typical Leakage vs. Temperature
Measured across Pins 4&6
(VL=600V)
Temperature º(C)
Leakage (PA)
-40
0.06
0.05
0.04
0.03
0.02
0.01
0
-20 0 20 40 60 80 100
Load Voltage (V)
0.1 1 10 100 1000
Output Capacitance (pF)
0
20
40
60
80
100
120
140
160
180
Output Capacitance
vs. Load Voltage
(IF=0mA, f=1MHz)
Energy Rating Curve
(IF=5mA)
Time
Load Current (A)
10Ps
1.2
1.0
0.8
0.6
0.4
0.2
0
1ms100Ps 100ms 1s
10ms 10s 100s
PERFORMANCE DATA*
*Unless otherwise noted, data presented in these graphs is typical of device operation at 25ºC.
For guaranteed parameters not indicated in the written specifications, please contact our application department.
INTEGRATED CIRCUITS DIVISION
PLA192
www.ixysic.com 5
R08
Manufacturing Information
Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits classifies its plastic encapsulated devices for moisture sensitivity according to the latest version of
the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of
our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices
when handled according to the limitations and information in that standard as well as to any limitations set forth in the
information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device Moisture Sensitivity Level (MSL) Classifi cation
PLA192, PLA192S, PLA192E, PLA192ES MSL 1
ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
Soldering Profile
Provided in the table below is the Classification Temperature (TC) of this product and the maximum dwell time the
body temperature of this device may be (TC - 5)ºC or greater. The classification temperature sets the Maximum
Body Temperature allowed for this device during lead-free reflow processes. For through-hole devices, and any other
processes, the guidelines of J-STD-020 must be observed.
Device Classifi cation Temperature (Tc) Dwell Time (tp) Max Refl ow Cycles
PLA192, PLA192E 250ºC 30 seconds 1
PLA192S, PLA192ES 250ºC 30 seconds 3
Board Wash
IXYS Integrated Circuits recommends the use of no-clean flux formulations. Board washing to reduce or remove flux
residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage
to the device. These precautions include, but are not limited to: using a low pressure wash and providing a follow
up bake cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the
variability of the wash parameters used to clean the board, determination of the bake temperature and duration
necessary to remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning
or drying methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the
device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based.
INTEGRATED CIRCUITS DIVISION
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6R08
PLA192
MECHANICAL DIMENSIONS
Dimensions
mm
(inches)
PCB Hole Pattern
6.350 ± 0.127
(0.250 ± 0.005)
2.540 ± 0.127
(0.100 ± 0.005)
7.620 ± 0.127
(0.300 ± 0.005)
5.080 ± 0.127
(0.200 ± 0.005)
6 - 0.800 DIA.
(6 - 0.031 DIA.)
0.254 ± 0.0127
(0.010 ± 0.0005)
9.144 ± 0.508
(0.360 ± 0.020)
7.239 TYP
(0.285 TYP)
7.620 ± 0.254
(0.300 ± 0.010)
3.302 ± 0.051
(0.130 ± 0.002) 4.064 TYP
(0.160 TYP)
0.457 ± 0.076
(0.018 ± 0.003)
8.382 ± 0.381
(0.330 ± 0.015) 2.54 ± 0.127
(0.100 ± 0.005)
6.350 ± 0.127
(0.250 ± 0.005)
1.651 ± 0.254
(0.065 ± 0.010)
Pin 1
Dimensions
mm
(inches)
PCB Land Pattern
0.254 ± 0.0127
(0.010 ± 0.0005)
7.620 ± 0.254
(0.300 ± 0.010)
0.635 ± 0.127
(0.025 ± 0.005)
3.302 ± 0.051
(0.130 ± 0.002)
4.445 ± 0.254
(0.175 ± 0.010)
2.54
(0.10)
8.90
(0.3503)
1.65
(0.0649)
0.65
(0.0255)
8.382 ± 0.381
(0.330 ± 0.015) 2.54 ± 0.127
(0.100 ± 0.005)
9.524 ± 0.508
(0.375 ± 0.020) 6.350 ± 0.127
(0.250 ± 0.005)
0.457 ± 0.076
(0.018 ± 0.003)
1.651 ± 0.254
(0.065 ± 0.010)
1.651 ± 0.254
(0.065 ± 0.010)
Pin 1
PLA192 & PLA192E
PLA192S & PLA192ES
INTEGRATED CIRCUITS DIVISION
For additional information please visit our website at: www.ixysic.com
7
PLA192
Specification: DS-PLA192-R08
©Copyright 2018, IXYS Integrated Circuits
All rights reserved. Printed in USA.
6/28/2018
IXYS Integrated Circuits makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes
to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits'
Standard Terms and Conditions of Sale, IXYS Integrated Circuits assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but
not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits' product may result in direct physical harm, injury, or death to a person or severe property
or environmental damage. IXYS Integrated Circuits reserves the right to discontinue or make changes to its products at any time without notice.
NOTES:
1. All dimensions carry tolerances of EIA Standard 481-2
2. The tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2
Dimensions
mm
(inches)
Embossment
Embossed
Carrier
330.2 Dia
(13.00 Dia)
Top Cover
Tape Thickness
0.102 Max
(0.004 Max)
W=16.00
(0.63)
B0 = 10.10
(0.398)
A0 = 10.10
(0.398)
P1 = 12.00
(0.472)
K1 = 3.80
(0.15)
K0 = 4.90
(0.19)
User Direction of Feed
PLA192STR & PLA192ESTR Tape & Reel
