AO3401A
30V P-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=-10V) -4.0A
R
DS(ON)
(at V
GS
=-10V) < 50mΩ
R
DS(ON)
(at V
GS
=-4.5V) < 60mΩ
R
DS(ON)
(at V
GS
=-2.5V) < 85mΩ
Symbol
V
DS
V
GS
I
DM
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
°C/W
R
θJA
70
100 90
0.9
T
A
=70°C
Junction and Storage Temperature Range -55 to 150 °C
Thermal Characteristics UnitsParameter Typ Max
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
-30V
Drain-Source Voltage -30
The AO3401A uses advanced trench technology to
provide excellent R
DS(ON)
, low gate charge and operation
gate voltages as low as 2.5V. This device is suitable for
use as a load switch or other general applications.
V
Maximum UnitsParameter
T
A
=70°C
Power Dissipation
B
P
D
Pulsed Drain Current
C
Continuous Drain
Current
T
A
=25°C
I
D
V±12Gate-Source Voltage T
A
=25°C A
-4
-3.2
-27
W
1.4
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
63 125
80
Maximum Junction-to-Ambient
A
SOT23
Top View Bottom View
D
G
S
G
S
D
G
D
S
Rev 3: Mar. 2011 www.aosmd.com Page 1 of 5
AO3401A
Symbol Min Typ Max Units
BV
DSS
-30 V
V
DS
=-30V, V
GS
=0V -1
T
J
=55°C -5
I
GSS
±100 nA
V
GS(th)
Gate Threshold Voltage -0.5 -0.9 -1.3 V
I
D(ON)
-27 A
41 50
T
J
=125°C 62 75
47 60 mΩ
60 85 mΩ
g
FS
17 S
V
SD
-0.7 -1 V
I
S
-2 A
C
iss
645 pF
C
oss
80 pF
C
rss
55 pF
R
g
4 7.8 12 Ω
Q
g
(10V) 14 nC
Q
g
(4.5V) 7 nC
Q
gs
1.5 nC
Q
gd
2.5 nC
t
D(on)
6.5 ns
t
r
3.5 ns
t
D(off)
41 ns
t
f
9 ns
t
rr
11 ns
Q
rr
3.5 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Charge I
F
=-4.0A, dI/dt=100A/µs
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
Turn-Off DelayTime V
GS
=-10V, V
DS
=-15V, R
L
=3.75Ω,
R
GEN
=3Ω
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
Total Gate Charge
V
GS
=-10V, V
DS
=-15V, I
D
=-4.0A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
mΩ
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-4.0A
V
GS
=-2.5V, I
D
=-2.5A
V
GS
=-4.5V, I
D
=-3.5A
Forward Transconductance
Diode Forward Voltage
R
DS(ON)
Static Drain-Source On-Resistance
I
DSS
µA
V
DS
=V
GS
I
D
=-250µA
V
DS
=0V, V
GS
= ±12V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
Body Diode Reverse Recovery Time
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250µA, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-4.0A
Reverse Transfer Capacitance
I
F
=-4.0A, dI/dt=100A/µs
V
GS
=0V, V
DS
=-15V, f=1MHz
SWITCHING PARAMETERS
A. The value of R
θJA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation P
D
is based on T
J(MAX)
=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=150°C. Ratings are based on low frequency and duty cycles to keep
initialT
J
=25°C.
D. The R
θJA
is the sum of the thermal impedence from junction to lead R
θJL
and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in
2
FR-4 board with
2oz. Copper, assuming a maximum junction temperature of T
J(MAX)
=150°C. The SOA curve provides a single pulse ratin g.
Rev 3: Mar. 2011 www.aosmd.com Page 2 of 5
AO3401A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
40
0
5
10
15
20
0 0.5 1 1.5 2 2.5 3
-V
GS
(Volts)
Figure 2: Transfer Characteristics (Note E)
-I
D
(A)
20
40
60
80
100
0 2 4 6 8 10
-I
D
(A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
R
DS(ON)
(mΩ
Ω
Ω
Ω)
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
0.0 0.2 0.4 0.6 0.8 1.0 1.2
-V
SD
(Volts)
Figure 6: Body-Diode Characteristics (Note E)
I
S
(A)
25°C
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
Normalized On-Resistance
V
GS
=-2.5V
I
D
=-2.5A
V
GS
=-10V
I
D
=-4A
V
GS
=-4.5V
I
D
=-3.5A
30
50
70
90
110
130
150
0 2 4 6 8 10
-V
GS
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
R
DS(ON)
(mΩ
Ω
Ω
Ω)
25°C
V
DS
=-5V
V
GS
=-4.5V
V
GS
=-10V
I
D
=-4A
25°C
0
5
10
15
20
25
0 1 2 3 4 5
-V
DS
(Volts)
Fig 1: On-Region Characteristics (Note E)
-I
D
(A)
V
GS
=-2.0V
-2.5V
10V
4.5V
V
GS
=-2.5V
Rev 3: Mar. 2011 www.aosmd.com Page 3 of 5
AO3401A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0 5 10 15
Q
g
(nC)
Figure 7: Gate-Charge Characteristics
-V
GS
(Volts)
0
200
400
600
800
1000
0 5 10 15 20 25 30
-V
DS
(Volts)
Figure 8: Capacitance Characteristics
Capacitance (pF)
C
iss
C
oss
C
rss
V
DS
=-15V
I
D
=-4A
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
Power (W)
T
A
=25°C
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
-V
DS
(Volts)
-I
D
(Amps)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
s
10s
1ms
DC
R
DS(ON)
limited
T
J(Max)
=150°C
T
A
=25°C
100
µ
s
10ms
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Z
θ
θ
θ
θJA
Normalized Transient
Thermal Resistance
Single Pulse
D=T
on
/T
T
J,PK
=T
A
+P
DM
.Z
θJA
.R
θJA
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
R
θJA
=125°C/W
T
on
T
P
D
Rev 3: Mar. 2011 www.aosmd.com Page 4 of 5
AO3401A
VDC
Ig
Vds
DUT
VDC
Vgs
Vgs Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
-
+
-10V
Vdd
Vgs
Id
Vgs
Rg
DUT
VDC
Vgs
Vds
Id
Vgs
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds L
-
+
2
E = 1/2 LI
AR
AR
BV
DSS
I
AR
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
dI/dt
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
-Isd
-Vds
F
-I
-I
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Resistive Switching Test Circuit & Waveforms
-
+
Vgs
Vds
t t
t
tt
t
90%
10%
r
on
d(off)
f
off
d(on)
Rev 3: Mar. 2011
www.aosmd.com
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