MK1709 Low EMI Clock Generator Description Features The MK1709 generates a low EMI output clock from a clock input. The part is designed to dither the LCD interface clock for flat panel graphics controllers. The device uses ICS' proprietary mix of analog and digital Phase Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. * Packaged in 8-pin SOIC (MK1709S) and in 8-pin The MK1709 offers centered spread from a high speed clock input. Refer to the MK1714-01/02 for a crystal input and the widest selection of input frequencies and multipliers. TSSOP (MK1709AG) * * * * * 8-pin TSSOP available in lead (Pb) free package Provides a spread spectrum output clock Supports flat panel controllers Guaranteed to +85C operation Accepts a clock input, provides same frequency dithered output * Good for all VGA modes from 80 to 167 MHz * Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics ICS offers many other clocks for computers and computer peripherals. Consult us when you need to remove crystals and oscillators from your board. * * * * Low EMI feature can be disabled Includes power-down Operating voltage of 3.3 V Advanced, low-power CMOS process Block Diagram VDD S0 S1 PLL Clock Synthesis and Spread Spectrum Circuitry S2 Low EMI Enable Clock Out Input Buffer ICLK GND 1 MDS 1709 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator Pin Assignment Spread Percentage and Direction Select Table ICLK 1 8 S2 VDD 2 7 S1 GND 3 6 S0 CLK 4 5 LEE 8-pin SOIC (MK1709S) GND 1 8 VDD CLK 2 7 ICLK LEE 3 6 S2 S0 4 5 S1 8-pin TSSOP (MK1709AG) Frequency Spread Range Percentage (%) S2 Pin 8 (1709S) Pin 6 (1709AG) S1 Pin 7 (1709S) Pin 5 (1709AG) S0 Pin 6 (1709S) Pin 4 (1709AG) 0 0 0 0 0 M 40-50 40-50 0.9 0.7 0 0 1 40-50 (MK1709S) 25-50 (MK1709AG) 0.8 0 M 0 40-50 (MK1709S) 25-50 (MK1709AG) 0.6 0 M M 40-50 1.1 0 M 1 50 -100 0.6 0 1 0 50 -100 0.7 0 1 M 50 -100 0.8 0 1 1 Power Down -- 1 1 0 0 0 M 50 -100 50 -100 0.9 1.1 1 0 1 100-165 0.7 1 M 0 100-165 0.6 1 M M 100-165 1.1 1 M 1 100-165 1.35 1 1 0 100-165 0.8 1 1 M 100-165 0.9 1 1 1 Power Down -- 0 = connect to GND M = unconnected (floating) has internal Pull up resistor to VDD and is considered as a 1 state 1 = connect directly to VDD 2 MDS 1709 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator Pin Descriptions (MK1709S) Pin Number Pin Name Pin Type Pin Description 1 ICLK Input Connect to graphics input clock. 2 VDD Power Connect to +3.3 V. 3 GND Power Connect to ground. 4 CLK Output Spread spectrum clock output per table above. 5 LEE Input Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor. 6 S0 Input Function select 0 input. Selects spread amount and direction per table above. Internal mid-level. 7 S1 Input Function select 1 input. Selects spread amount and direction per table above. Internal mid-level. 8 S2 Input Function select 2 input. Selects spread amount and direction per table above. Pin Descriptions (MK1709AG) Pin Number Pin Name Pin Type Pin Description 1 GND Power Connect to ground. 2 CLK Output Spread spectrum clock output per table above. 3 LEE Input Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor. 4 S0 Input Function select 0 input. Selects spread amount and direction per table above. Internal mid-level. 5 S1 Input Function select 1 input. Selects spread amount and direction per table above. Internal mid-level. 6 S2 Input Function select 2 input. Selects spread amount and direction per table above. 7 ICLK Input Connect to graphics input clock. 8 VDD Power Connect to +3.3 V. 3 MDS 1709 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator External Components The MK1709 requires a minimum number of external components for proper operation. Decoupling Capacitor A decoupling capacitor of 0.01F must be connected between VDD and GND on pins 2 and 3 for the MK1709S, or pins 1 and 8 for the MK1709AG. Place the capacitor as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. PCB layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Series Termination Resistor 2) Place a 33 series termination resistor (if needed) close to the clock output to minimize EMI. When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the MK1709. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Select Pin Operation The S1, S0 select pins are 2-level, meaning they have three separate states to make the selections shown in the table on page 2. 4 MDS 1709 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK1709. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Typical values are at 25C. Item Rating Supply Voltage, VDD (referenced to GND) 5V All Inputs and Outputs (referenced to GND) -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +85C Storage Temperature -65 to +150C Soldering Temperature (maximum of 10 seconds) 260C Recommended Operation Conditions Parameter Min. Max. Units 0 +85 C +3.135 +3.6 V Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Typ. DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85C Parameter Symbol Conditions Min. Typ. 3.135 Max. Units 3.465 V Operating Voltage VDD Supply Current (MK1709S) IDD No load, at 3.3 V 20 mA Supply Current (MK1709AG) IDD No load, 50M 13 A IDD No load, 150M 23 Input High Voltage (ICLK) VIH (VDD/2)+1 Input High Voltage (S1, S0) VIH VDD-0.5 V Input High Voltage (other inputs) VIH 2 V Input Low Voltage (ICLK) VIL Input Low Voltage VIL Output High Voltage (CMOS) VOH IOH = -4mA Output High Voltage VOH IOH = -12 mA Output Low Voltage VOL IOL = 12 mA Input Capacitance CIN S0, S1, S2, LEE pins VDD/2 V (VDD/2)-1 V 0.5 V VDD-0.4 V 2.4 V 0.4 7 525 Race Street, San Jose, CA 95126 V pF 5 MDS 1709 D Integrated Circuit Systems, Inc. VDD/2 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator AC Electrical Characteristics (MK1709S) Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85 C Parameter Symbol Conditions Min. Input/Output Clock Frequency Typ. Max. Units 80 167 MHz 80 % 60 % Input Clock Duty Cycle Time above VDD/2 20 Output Clock Duty Cycle Time above 1.5 V 40 50 Output Clock Rise Time tOR 0.8 to 2.0V 1.5 ns Output Clock Fall Time tOF 2.0 to 0.8V 1.5 ns 7 to 14 dB EMI Peak Frequency Reduction 3rd - 19th odd harmonics AC Electrical Characteristics (MK1709AG) Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85 C Parameter Symbol Conditions Min. Input/Output Clock Frequency Typ. Max. Units 25 165 MHz 80 % 55 % Input Clock Duty Cycle Time above VDD/2 20 Output Clock Duty Cycle Time above 1.5 V, 40 MHz - 100 MHz 40 50 Time above 1.5 V, 100 MHz - 150 MHz 45 % Time above 1.5 V, >150 MHz 35 % Output Clock Rise Time tOR 0.8 to 2.0V 1.5 ns Output Clock Fall Time tOF 2.0 to 0.8V 1.5 ns EMI Peak Frequency Reduction 3rd - 19th odd harmonics Marking Diagrams dB (Marking for lead (Pb) free device shown below) 8 5 MK1709S YYWW ###### 1 7 to 14 1 8 MK1709AG YYWWLF ###### 4 5 4 6 MDS 1709 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 8 Millimeters Symbol E Min A A1 B C D E e H h L H INDEX AREA 1 2 D A Inches Max 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8 Min Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8 h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) 7 MDS 1709 D Integrated Circuit Systems, Inc. C 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator Package Outline and Package Dimensions (8-pin TSSOP, 173 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 Symbol E1 E IN D EX AR EA 1 2 D A 2 Min A A1 A2 b C D E E1 e L aaa Inches Max -1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 3.90 3.10 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0 8 0.10 Min Max -0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.114 0.122 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0 8 0.004 A A 1 c -C e S E A T IN G P LA N E b L aaa 8 MDS 1709 D Integrated Circuit Systems, Inc. C 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com MK1709 Low EMI Clock Generator Ordering Information Part / Order Number MK1709S MK1709STR MK1709AG MK1709AGTR MK1709AGLF MK1709AGLFTR Marking (see page 6) Shipping packaging Package Temperature Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin TSSOP 8-pin TSSOP 8-pin TSSOP 8-pin TSSOP 0 to +85 C 0 to +85 C 0 to +85 C 0 to +85 C 0 to +85 C 0 to +85 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 9 MDS 1709 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 031204 tel (408) 297-1201 www.icst.com