Pacific Silicon Sensor Series 9 Data Sheet Part Description AD500-9-TO52-S1 Order # 06-008 ACTIVE AREA: 0.196 mm 2 (500 m DIA) O 2.54 PIN CIRCLE PIN 1 CATHODE O0.46 3 PL 108 VIEWING ANGLE 2.70 FRONTSIDE VIEW BACKSIDE VIEW DESCRIPTION APPLICATIONS * * * * 0.196 mm High Speed, Low Noise Avalanche Photodiode with N on P construction. Hermetically packaged in a TO-52-S1 with a clear borosilicate glass window cap. * High speed optical communications * Laser range finder * Medical equipment * High speed photometry ABSOLUTE MAXIMUM RATING SYMBOL PARAMETER MIN TSTG TOP TSOLDERING IPH (DC) IPH (AC) Storage Temp Operating Temp Soldering Temp 10 seconds Electrical Power Dissipation @ 22C Optical Peak Value, once for 1 second Continuous Optical Operation Pulsed Signal Input 50 s "on" / 1 ms "off" SPECTRAL RESPONSE at M = 100 MAX UNITS +125 +100 C C 70 +260 C 60 - 100 mW - 200 mW -55 -40 - 250 A - 1 mA RESPONSIVITY (A/W) 500 m active area Low slope multiplication curve High speed, low noise NIR enhanced C S PLI A NT OM FEATURES 2 PIN 3 ANODE PIN 4 CASE 1 12.7 3 PL 3.60 H O 3.00 O 4.70 Ro O 5.40 50 40 30 20 10 0 400 500 600 700 800 900 1000 1100 WAVELENGTH (nm) ELECTRO-OPTICAL CHARACTERISTICS @ 22 C SYMBOL CHARACTERISTIC TEST CONDITIONS MIN TYP MAX UNITS ID C VBR Dark Current M = 100* --0.5 5.0 nA Capacitance M = 100* --1.2 --pF Breakdown Voltage ID = 2 A 160 240 --V Temperature Coefficient of VBR --1.55 --V/K 55 --60 A/W Responsivity M = 100; = 0 V; = 905 nm Bandwidth -3dB --0.5 --GHz 3dB Rise Time M = 100 --550 --ps tr Optimum Gain 50 60 ------"Excess Noise" factor M = 100 2.5 ----"Excess Noise" index M = 100 0.2 1/2 ----Noise Current M = 100 1.0 pA/Hz --Max Gain 200 ---14 1/2 ----NEP Noise Equivalent Power 2.0 X 10 M = 100; = 905 nm W/Hz * Measurement conditions: Setup of photo current 10 nA at M = 1 and irradiated by a 880 nm, 80 nm bandwidth LED. Increase the photo current up to 1 A, (M = 100) by internal multiplication due to an increasing bias voltage. Disclaimer: Due to our policy of continued development, specifications are subject to change without notice. 8/24/2010 Page 1 of 2 TYPICAL GAIN vs BIAS VOLTAGE QUANTUM EFFICIENCY for M = 100 10000 1.00 0.90 0.80 1000 0.60 QE GAIN 0.70 100 0.50 0.40 0.30 10 0.20 0.10 1 10 30 50 70 90 110 130 150 170 190 210 230 250 0.00 400 500 600 BIAS VOLTAGE (V) DEVICE SCHEMATIC 700 800 900 1000 1100 WAVELENGTH (nm) SUGGESTED CIRCUIT SCHEMATIC BIAS SUPPLY VOLTAGE CURRENT LIMITING RESISTOR PIN 1 PIN 4 MIN. 0.1 F CAPACITOR CLOSEST TO APD APD PIN 3 DIODE, PROTECTIVE CIRCUIT READ-OUT CIRCUIT OR 50 Ohm LOAD RESISTANCE APPLICATION NOTES * Current should be limited by a protecting resistor or current limiting IC inside the power supply. * Use of low noise read-out IC. * For high gain applications (M>50) bias voltage should be temperature compensated. * For low light level applications, blocking of ambient light should be used. HANDLING PRECAUTIONS: * Soldering temperature - 260C for 10 seconds max. The device must be protected against solder flux vapor. * Minimum pin length - 2 mm * ESD protection - Standard precautionary measures are sufficient. * Storage - Store devices in conductive foam. * Avoid skin contact with window. * Clean window with Ethyl alcohol if necessary. * Do not scratch or abrade window. USA: International sales: Pacific Silicon Sensor, Inc. 5700 Corsa Avenue, #105 Westlake Village, CA 91362 USA Phone (818) 706-3400 Fax (818) 889-7053 Email: sales@pacific-sensor.com www.pacific-sensor.com Silicon Sensor International AG Peter-Behrens-Str. 15 D-12459 Berlin, Germany Phone +49 (0)30-63 99 23 10 Fax +49 (0)30-63 99 23 33 Email: sales@silicon-sensor.de www.silicon-sensor.de Proud Members of the Silicon Sensor International AG Group of companies 8/24/2010 Page 2 of 2