DRV421RTJR - Texas Instruments - Datasheet.Directory

compensation

coil

primary

current

conductor

magnetic

core

DRV421

return current

conductor

(optional)

3.3 V or 5 V

ADC

optional

Fluxgate

Sensor

Integrator

and

Filter

Device Control and Degaussing Reference

H-Bridge

Driver

Shunt

Sense

Amplifier

Fluxgate Sensor Front-End

RSHUNT

Product

Folder

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

DRV421

SBOS704B –MAY 2015–REVISED MARCH 2016

DRV421 Integrated Magnetic Fluxgate Sensor for Closed-Loop Current Sensing

1 Features

1• High-Precision Integrated Fluxgate Sensor

– Offset and Drift: ±8 µT max, ±5 nT/°C typ

• Extended Current Measurement Range

– H-Bridge Output Drive: ±250 mA typ at 5 V

• Precision Shunt Sense Amplifier

– Offset and Drift (max): ±75 µV, ±2 µV/°C

– Gain Error and Drift (max): ±0.3%, ±5 ppm/°C

• Precision Reference

– Accuracy and Drift (max): ±2%, ±50 ppm/°C

– Pin-Selectable Voltage: 2.5 V or 1.65 V

– Selectable Ratiometric Mode: VDD / 2

• Magnetic Core Degaussing Feature

• Diagnostic Features: Overrange and Error Flags

• Supply Voltage Range: 3.0 V to 5.5 V

• Fully Specified Over the Extended Industrial

Temperature Range of –40°C to +125°C

2 Applications

• Closed-Loop DC- and AC-Current Sensor

Modules

• Leakage Current Sensors

• Industrial Monitoring and Control Systems

• Overcurrent Detection

• Frequency, Voltage, and Solar Inverters

3 Description

The DRV421 is designed for magnetic closed-loop

current sensing solutions, enabling isolated, precise

dc- and ac-current measurements. This device

provides both, a proprietary integrated fluxgate

sensor, and the required analog signal conditioning,

thus minimizing component count and cost. The low

offset and drift of the fluxgate sensor, along with an

optimized front-end circuit results in unrivaled

measurement precision.

The DRV421 provides all the necessary circuit blocks

to drive the current-sensing feedback loop. The

sensor front-end circuit is followed by a filter that can

be configured to work with a wide range of magnetic

cores. The integrated 250-mA H-Bridge drives the

compensation coil and doubles the current

measurement range, as compared to conventional

single-ended drive methods. The device also

provides a precision voltage reference and shunt

sense amplifier to generate and drive the analog

output signal.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

DRV421 WQFN (20) 4.00 mm × 4.00 mm

(1) For all available packages, see the package option addendum

at the end of the datasheet.

Typical Application

DRV421

SBOS704B –MAY 2015–REVISED MARCH 2016

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Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Typical Characteristics.............................................. 7

7 Detailed Description............................................ 16

7.1 Overview................................................................. 16

7.2 Functional Block Diagram....................................... 16

7.3 Feature Description................................................. 17

7.4 Device Functional Modes........................................ 26

8 Application and Implementation ........................ 27

8.1 Application Information............................................ 27

8.2 Typical Application ................................................. 29

9 Power-Supply Recommendations...................... 34

9.1 Power-Supply Decoupling....................................... 34

9.2 Power-On Start Up and Brownout .......................... 34

9.3 Power Dissipation ................................................... 34

10 Layout................................................................... 35

10.1 Layout Guidelines ................................................. 35

10.2 Layout Example .................................................... 36

11 Device and Documentation Support................. 37

11.1 Documentation Support ....................................... 37

11.2 Community Resources.......................................... 37

11.3 Trademarks........................................................... 37

11.4 Electrostatic Discharge Caution............................ 37

11.5 Glossary................................................................ 37

12 Mechanical, Packaging, and Orderable

Information........................................................... 37

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision A (July 2015) to Revision B Page

• Added TI Design .................................................................................................................................................................... 1

• Added last two Applications bullets ....................................................................................................................................... 1

• Changed QFN to WQFN in pin configuration drawing .......................................................................................................... 3

• Changed QFN to WQFN in Thermal Information table ......................................................................................................... 4

• Changed QFN to WQFN in Power Dissipation section ....................................................................................................... 34

Changes from Original (May 2015) to Revision A Page

• Released to production........................................................................................................................................................... 1

ICOMP2

GSEL0

RSEL1

RSEL0

REFOUT

REFIN

VOUT

GND

VDD

GND

ICOMP1

AINP

AINN

GSEL1

DEMAG

GND

(Thermal Pad)

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5 Pin Configuration and Functions

RTJ Package

20-Pin WQFN

Top View

Pin Functions

PIN I/O DESCRIPTION

NAME NO.

AINN 14 I Inverting input of shunt sense amplifier

AINP 13 I Noninverting input of shunt sense amplifier

DEMAG 18 I Degauss control input

ER 19 O Error flag; open-drain, active low output

GND 7, 10, 16, 17 — Ground reference

GSEL0 1 I Gain and bandwidth selection input 0

GSEL1 20 I Gain and bandwidth selection input 1

ICOMP1 12 O Output 1 of compensation coil driver

ICOMP2 11 O Output 2 of compensation coil driver

OR 15 O Shunt sense amplifier overrange indicator; open-drain, active-low output

REFIN 5 I Common-mode reference input for the shunt sense amplifier

REFOUT 4 O Voltage reference output

RSEL0 3 I Voltage reference mode selection input 0

RSEL1 2 I Voltage reference mode selection input 1

VDD 8, 9 — Supply voltage, 3.0 V to 5.5 V. Decouple both pins using 1-µF ceramic capacitors placed as

close as possible to the device. See the Power-Supply Decoupling and Layout sections for

further details.

VOUT 6 O Shunt sense amplifier output

PowerPAD™ — Connect thermal pad to GND

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SBOS704B –MAY 2015–REVISED MARCH 2016

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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must

be current limited, except for the shunt sense amplifier input pins.

(3) These inputs are not diode-clamped to the power supply rails.

(4) Power-limited; observe maximum junction temperature.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)

MIN MAX UNIT

Voltage Supply voltage (VDD to GND) –0.3 7 VInput voltage, except pins AINP and AINN (2) GND – 0.5 VDD + 0.5

Shunt sense amplifier inputs (pins AINP and AINN) (3) GND – 6.0 VDD + 6.0

Current Pins ICOMP1 and ICOMP2 (short circuit current ISC)(4) –300 300 mA

Shunt sense amplifier inputs pins AINP and AINN –5 5

All remaining pins –25 25

Temperature Junction, TJmax –50 150 °C

Storage, Tstg –65 150

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings VALUE UNIT

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT

VDD Supply voltage 3.0 5.0 5.5 V

TASpecified ambient temperature range –40 125 °C

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.4 Thermal Information

THERMAL METRIC (1) SBOS704

UNITSRTJ (WQFN)

20 PINS

RθJA Junction-to-ambient thermal resistance 34.1 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 33.1 °C/W

RθJB Junction-to-board thermal resistance 11.0 °C/W

ψJT Junction-to-top characterization parameter 0.3 °C/W

ψJB Junction-to-board characterization parameter 11.0 °C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance 2.1 °C/W

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(1) Fluxgate sensor front-end offset can be reduced using the feature.

(2) Parameter value referred to output (RTO).

6.5 Electrical Characteristics

All minimum and maximum specifications at TA= +25°C, VDD = 3.0 V to 5.5 V, and ICOMP1 = ICOMP2 = 0 mA (unless otherwise

noted). Typical values are at VDD = 5.0 V.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

FLUXGATE SENSOR FRONT-END

Offset (1) No magnetic field –8 ±2 8 µT

Offset drift No magnetic field ±5 nT/°C

Noise f = 0.1 Hz to 10 Hz 17 nTrms

Noise density f = 1 kHz 1.5 nT/√Hz

Saturation trip level for pin ER 1.7 mT

AOL DC open-loop gain 16 V/µT

AC open-loop gain

GSEL[1:0] = 00, at 3.8 kHz,

integration-to-flatband corner frequency 8.5

V/mT

GSEL[1:0] = 01, at 3.8 kHz,

integration-to-flatband corner frequency 38

GSEL[1:0] = 10, at 1.9 kHz,

integration-to-flatband corner frequency 25

GSEL[1:0] = 11, at 1.9 kHz,

integration-to-flatband corner frequency 70

IICOMP Peak current at pins ICOMP1 and

ICOMP2

VICOMP1 – VICOMP2 = 4.2 VPP,VDD = 5 V,

TA= –40°C to +125°C 210 250 mA

VICOMP1 – VICOMP2 = 2.5 VPP, VDD = 3.3 V,

TA= –40°C to +125°C 125 150

VICOMP Voltage swing at pins ICOMP1 and

ICOMP2 20-Ωload, VDD = 5 V, TA= –40°C to +125°C 4.2 VPP

20-Ωload, VDD = 3.3 V, TA= –40°C to +125°C 2.5

Common-mode output voltage at pins

ICOMP1 and ICOMP2 VREFOUT V

SHUNT SENSE AMPLIFIER

VOO Output offset voltage VAINP = VAINN = VREFIN, VDD = 3.0 V –0.075 ±0.01 0.075 mV

Output offset voltage drift –2 ±0.4 2 µV/°C

CMRR Common-mode rejection ratio, RTO (2) VCM =−1 V to VDD + 1 V, VREFIN = VDD / 2 –250 ±50 250 µV/V

PSRRAMP Power-supply rejection ratio, RTO VDD = 3.0 V to 5.5 V, VCM = VREFIN –50 ±4 50 µV/V

VIC Common-mode input voltage range –1 VDD + 1 V

ZIND Differential input impedance 16.5 20 23.5 kΩ

ZIC Common-mode input impedance 40 50 60 kΩ

G Gain, VOUT / (VAINP – VAINN) 4 V/V

EGGain error –0.3% ±0.02% 0.3%

Gain error drift –5 ±1 5 ppm/°C

Linearity error RL= 1 kΩ12 ppm

Voltage output swing from negative rail

(OR pin trip level) VDD = 5.5 V, IVOUT = 2.5 mA 48 85 mV

VDD = 3.0 V, IVOUT = 2.5 mA 56 100

Voltage output swing from positive rail

(OR pin trip level) VDD = 5.5 V, IVOUT = –2.5 mA VDD – 85 VDD – 48 mV

VDD = 3.0 V, IVOUT = –2.5 mA VDD – 100 VDD – 56

ISC Short-circuit current VOUT connected to GND –18 mA

VOUT connected to VDD 20

Signal overrange indication delay (OR pin) VIN = 1-V step 2.5 to 3.5 µs

BW–3dB Bandwidth 2 MHz

SR Slew rate 6.5 V/µs

Settling time, large-signal ΔV = ± 2 V to 1% accuracy, no external filter 0.9 µs

Settling time, small-signal ΔV = ± 0.4 V to 0.01% accuracy 8 µs

enOutput voltage noise density, RTO f = 1 kHz, compensation loop disabled 170 nV/√Hz

VREFIN Input voltage range at pin REFIN TA= –40°C to +125°C GND VDD V

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Electrical Characteristics (continued)

All minimum and maximum specifications at TA= +25°C, VDD = 3.0 V to 5.5 V, and ICOMP1 = ICOMP2 = 0 mA (unless otherwise

noted). Typical values are at VDD = 5.0 V.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VOLTAGE REFERENCE

VREFOUT Reference output voltage at pin REFOUT

RSEL[1:0] = 00, no load 2.45 2.5 2.55 V

RSEL[1:0] = 01, no load 1.6 1.65 1.7

RSEL[1:0] = 1x, no load 45 50 55 % of VDD

Reference output voltage drift RSEL[1:0] = 00, 01 –50 ±10 50 ppm/°C

Voltage divider gain error drift RSEL[1:0] = 1x –50 ±10 50 ppm/°C

PSRRREF Power-supply rejection ratio RSEL[1:0] = 00, 01 –300 ±15 300 µV/V

Load regulation

RSEL[1:0] = 0x, load to GND or VDD,

ΔILOAD = 0 mA to 5 mA, TA= –40°C to +125°C 0.15 0.35 mV/mA

RSEL[1:0] = 1x, load to GND or VDD,

ΔILOAD = 0 mA to 5 mA, TA= –40°C to +125°C 0.3 0.8

ISC Short-circuit current REFOUT connected to VDD 20 mA

REFOUT connected to GND –18

DIGITAL INPUTS/OUTPUTS

Logic Inputs (CMOS)

VIH High-level input voltage TA= –40°C to +125°C 0.7 × VDD VDD + 0.3 V

VIL Low-level input voltage TA= –40°C to +125°C –0.3 0.3 × VDD V

Input leakage current 0.01 µA

Logic Outputs (Open-Drain)

VOH High-level output voltage Set by external pull-up resistor V

VOL Low-level output voltage 4-mA sink 0.3 V

POWER SUPPLY

IQQuiescent current

IICOMP1 = IICOMP2 = 0 mA, 3.0 V ≤VDD ≤3.6 V,

TA= –40°C to +125°C 6.5 9 mA

IICOMP1 = IICOMP2 = 0 mA, 4.5 V ≤VDD ≤5.5 V,

TA= –40°C to +125°C 8.1 11

VRST Power-on reset threshold 2.4 V

Offset Drift (nT/qC)

Devices (%)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

D005

Noise Frequency (kHz)

Noise Density (nT/—Hz)

0.0001 0.001 0.01 0.1 1 10 100

0.1

100

D006

Supply Voltage (V)

Offset (PT)

3 3.5 4 4.5 5 5.5

-4

-3

-2

-1

D003

Temperature (°C)

Offset (PT)

-40 -25 -10 5 20 35 50 65 80 95 110 125

-4

-3

-2

-1

D004

Device 1

Device 2

Device 3

Offset (PT)

Devices (%)

-8

-7

-6

-5

-4

-3

-2

-1

D001

Offset (PT)

Devices (%)

-8

-7

-6

-5

-4

-3

-2

-1

D002

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6.6 Typical Characteristics

at VDD = 5 V and TA= +25°C (unless otherwise noted)

VDD = 5 V

Figure 1. Fluxgate Sensor Front-End Offset Histogram

VDD = 3.3 V

Figure 2. Fluxgate Sensor Front-End Offset Histogram

Figure 3. Fluxgate Sensor Front-End Offset vs

Supply Voltage Figure 4. Fluxgate Sensor Front-End Offset vs

Temperature

Figure 5. Fluxgate Sensor Front-End Offset Drift

Histogram

Figure 6. Fluxgate Sensor Front-End Noise Density vs

Noise Frequency

Negative Peak Current (mA)

Voltage Swing (VPP)

-250 -225 -200 -175 -150 -125 -100 -75 -50 -25 0

D011

VDD = 5 V

VDD = 3.3 V

Positive Peak Current (mA)

Voltage Swing (VPP)

0 25 50 75 100 125 150 175 200 225 250

-5

-4

-3

-2

-1

D012

VDD = 5 V

VDD = 3.3 V

Temperature (°C)

DC Open-Loop Gain (V/PT)

-40 -25 -10 5 20 35 50 65 80 95 110 125

D009

Frequency (kHz)

AC Open-Loop Gain (dB)

0.001 0.01 0.1 1 10 100

100

120

140

160

D010

GSEL[1:0]=00

GSEL[1:0]=01

GSEL[1:0]=10

GSEL[1:0]=11

Saturation Trip Level (mT)

Devices (%)

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2.1

D007

DC Open-Loop Gain (V/PT)

Devices (%)

-10

-5

D008

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

Figure 7. Fluxgate Sensor Saturation (ER Pin) Trip Level

Histogram Figure 8. Fluxgate Sensor Front-End DC Open-Loop Gain

Histogram

Figure 9. Fluxgate Sensor Front-End DC Open-Loop Gain vs

Temperature Figure 10. Fluxgate Sensor Front-End AC Open-Loop Gain

vs Frequency

Figure 11. Voltage Swing at ICOMPx Pins vs

Negative Peak Current Figure 12. Voltage Swing at ICOMPx Pins vs

Positive Peak Current

Temperature (°C)

Output Offset (PV)

-40 -25 -10 5 20 35 50 65 80 95 110 125

-75

-50

-25

D017

Device 1

Device 2

Device 3

Supply Voltage (V)

Output Offset (PV)

3 3.5 4 4.5 5 5.5

-75

-50

-25

D018

Output Offset (PV)

Devices (%)

-50

-40

-30

-20

-10

D015

Output Offset (PV)

Devices (%)

-50

-40

-30

-20

-10

D016D015

Temperature (°C)

Voltage Swing (VPP)

-40 -25 -10 5 20 35 50 65 80 95 110 125

-5

-4

-3

-2

-1

D013

VDD = 5 V

VDD = 3.3 V

Temperature (°C)

Voltage Swing (VPP)

-40 -25 -10 5 20 35 50 65 80 95 110 125

D014

VDD = 5 V

VDD = 3.3 V

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

RLOAD = 20 Ω

Figure 13. Negative Voltage Swing at ICOMPx Pins vs

Temperature

RLOAD = 20 Ω

Figure 14. Positive Voltage Swing at ICOMPx Pins vs

Temperature

VDD = 5 V

Figure 15. Shunt Sense Amplifier Offset Histogram

VDD = 3.3 V

Figure 16. Shunt Sense Amplifier Offset Histogram

Figure 17. Shunt Sense Amplifier Offset vs Temperature Figure 18. Shunt Sense Amplifier Offset vs Supply Voltage

AINP Input Impedance (k:)

Devices (%)

100

D023

Temperature (°C)

AINP Input Impedance (k:)

-40 -25 -10 5 20 35 50 65 80 95 110 125

49.2

49.4

49.6

49.8

50.2

50.4

50.6

50.8

D024

Power-Supply Rejection Ratio (PV/V)

Devices (%)

-50

-40

-30

-20

-10

D021

Ripple Frequency (kHz)

Power-Supply Rejection Ratio (dB)

0.01 0.1 1 10 100 1000

100

D022

Common-Mode Rejection Ratio (PV/V)

Devices (%)

-250

-225

-200

-175

-150

-125

-100

-75

-50

-25

100

125

150

175

200

225

250

D019

Input Signal Frequency (kHz)

Common-Mode Rejection Ratio (dB)

0.01 0.1 1 10 100 1000

100

D020

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

Figure 19. Shunt Sense Amplifier Common-Mode Rejection

Ratio Histogram

Figure 20. Shunt Sense Amplifier Common-Mode Rejection

Ratio vs Input Signal Frequency

Figure 21. Shunt Sense Amplifier Power-Supply Rejection

Ratio Histogram

Figure 22. Shunt Sense Amplifier Power-Supply Rejection

Ratio vs Ripple Frequency

Figure 23. Shunt Sense Amplifier AINP Input Impedance

Histogram

Figure 24. Shunt Sense Amplifier AINP Input Impedance vs

Temperature

Input Signal Frequency (kHz)

Gain (dB)

0.01 0.1 1 10 100 1000 10000

D029

Supply Voltage (V)

Linearity Error (ppm)

3 3.5 4 4.5 5 5.5

D030

Gain Error (%)

Devices (%)

100

-0.1

-0.08

-0.06

-0.04

-0.02

0.02

0.04

0.06

0.08

0.1

D027

Temperature (°C)

Gain Error (%)

-40 -25 -10 5 20 35 50 65 80 95 110 125

-0.3

-0.25

-0.2

-0.15

-0.1

-0.05

0.05

0.1

0.15

0.2

0.25

0.3

D028

AINN Input Impedance (k:)

Devices (%)

8.25

8.5

8.75

9.25

9.5

9.75

10.25

10.5

10.75

11.25

11.5

11.75

D025

Temperature (°C)

AINN Input Impedance (k:)

-40 -25 -10 5 20 35 50 65 80 95 110 125

9.2

9.4

9.6

9.8

10.2

10.4

10.6

10.8

D026

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

Figure 25. Shunt Sense Amplifier AINN Input Impedance

Histogram Figure 26. Shunt Sense Amplifier AINN Input Impedance vs

Temperature

Figure 27. Shunt Sense Amplifier Gain Error Histogram Figure 28. Shunt Sense Amplifier Gain Error vs Temperature

Figure 29. Shunt Sense Amplifier Gain vs

Frequency Figure 30. Shunt Sense Amplifier Linearity vs

Supply Voltage

Supply Voltage (V)

Short-Circuit Current (mA)

3 3.5 4 4.5 5 5.5

-40

-30

-20

-10

D035

VOUT to GND

VOUT to VDD

Time (Ps)

Voltage (V)

-2.5 0 2.5 5 7.5 10 12.5 15 17.5

-0.25

-0.2

-0.15

-0.1

-0.05

0.05

0.1

0.15

0.2

0.25

D048

VOUT

VIN

Temperature (°C)

Trip Delay (Ps)

-40 -25 -10 5 20 35 50 65 80 95 110 125

2.25

2.5

2.75

3.25

3.5

3.75

D033

Temperature (°C)

Short-Circuit Current (mA)

-40 -25 -10 5 20 35 50 65 80 95 110 125

-40

-30

-20

-10

D034

VOUT to GND

VOUT to VDD

Output Current (mA)

Voltage Difference to VDD or GND (V)

0 1 2 3 4 5 6 7 8 9 10

0.1

0.2

0.3

0.4

0.5

D031

VDD = 5.5 V

VDD = 3.0 V

Temperature (°C)

Voltage Difference to VDD or GND (V)

-40 -25 -10 5 20 35 50 65 80 95 110 125

0.1

0.2

0.3

0.4

0.5

D032

VDD = 5.5 V

VDD = 3.0 V

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

Figure 31. OR Pin Trip Level vs Output Current Figure 32. OR Pin Trip Level vs Temperature

Figure 33. OR Pin Trip Delay vs Temperature Figure 34. Shunt Sense Amplifier Output Short-Circuit

Current vs Temperature

Figure 35. Shunt Sense Amplifier Output Short-Circuit

Current vs Supply Voltage

Rising Edge

Figure 36. Shunt Sense Amplifier Small-Signal

Settling Time

Time (ms)

Voltage (V)

-0.1 -0.075 -0.05 -0.025 0 0.025 0.05 0.075 0.1

-5

-4

-3

-2

-1

D037

VIN

VOUT

Noise Frequency (Hz)

Output Voltage Noise Density (nV/—Hz)

10 100 1000 10000 100000

100

1000

10000

D038

Time (Ps)

Voltage (V)

-0.5 0 0.5 1 1.5 2 2.5

-1.25

-1

-0.75

-0.5

-0.25

0.25

0.5

0.75

1.25

D051

VOUT

VIN

Time (ms)

Voltage (V)

-0.1 -0.075 -0.05 -0.025 0 0.025 0.05 0.075 0.1

-5

-4

-3

-2

-1

D036

VIN

VOUT

Time (Ps)

Voltage (V)

-2.5 0 2.5 5 7.5 10 12.5 15 17.5

-0.25

-0.2

-0.15

-0.1

-0.05

0.05

0.1

0.15

0.2

0.25

D049

VOUT

VIN

Time (Ps)

Voltage (V)

-0.5 0 0.5 1 1.5 2 2.5

-1.25

-1

-0.75

-0.5

-0.25

0.25

0.5

0.75

1.25

D050

VOUT

VIN

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

Falling Edge

Figure 37. Shunt Sense Amplifier Small-Signal

Settling Time

Rising Edge

Figure 38. Shunt Sense Amplifier Large-Signal

Settling Time

Falling Edge

Figure 39. Shunt Sense Amplifier Large-Signal

Settling Time

VDD = 5 V

Figure 40. Shunt Sense Amplifier Overload Recovery

Response

VDD = 3.3 V

Figure 41. Shunt Sense Amplifier Overload Recovery

Response Figure 42. Shunt Sense Amplifier Output Voltage Noise

Density vs Noise Frequency

Power-Supply Rejection Ratio (PV/V)

Devices (%)

-300

-270

-240

-210

-180

-150

-120

-90

-60

-30

120

150

180

210

240

270

300

D044

Referene Current (mA)

Reference Voltage (V)

-5 -4 -3 -2 -1 0 1 2 3 4 5

1.4

1.6

1.8

2.2

2.4

2.6

2.8

D043

RSEL[1:0] = 00

RESL[1:0] = 01

RSEL[1:0] = 1x

Reference Voltage Drift (ppm/qC)

Devices (%)

-20

-18

-16

-14

-12

-10

-8

-6

-4

-2

D041

Supply Voltage (V)

Reference Voltage (V)

3 3.5 4 4.5 5 5.5

1.4

1.6

1.8

2.2

2.4

2.6

2.8

D042

RSEL[1:0] = 00

RSEL[1:0] = 01

Reference Voltge (V)

Devices (%)

2.495

2.496

2.497

2.498

2.499

2.5

2.501

2.502

2.503

2.504

2.505

D039

Temperature (°C)

Reference Voltage (V)

-40 -25 -10 5 20 35 50 65 80 95 110 125

2.45

2.46

2.47

2.48

2.49

2.5

2.51

2.52

2.53

2.54

2.55

D040

Device 1

Device 2

Device 3

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

Figure 43. Reference Voltage Histogram Figure 44. Reference Voltage vs Temperature

Figure 45. Reference Voltage Drift Histogram Figure 46. Reference Voltage vs Supply Voltage

Figure 47. Reference Voltage vs Reference Output Current Figure 48. Reference Voltage Power-Supply Rejection Ratio

Histogram

Temperature (°C)

Reset Threshold (V)

-40 -25 -10 5 20 35 50 65 80 95 110 125

2.25

2.35

2.45

2.55

D047

Load Regulation (mV/mA)

Devices (%)

100

-0.35

-0.3

-0.25

-0.2

-0.15

-0.1

-0.05

0.05

0.1

0.15

0.2

0.25

0.3

0.35

D045

Temperature (°C)

Quiescent Current (mA)

-40 -25 -10 5 20 35 50 65 80 95 110 125

5.5

6.5

7.5

8.5

9.5

D046

VDD = 3 V

VDD = 5.5 V

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Typical Characteristics (continued)

at VDD = 5 V and TA= +25°C (unless otherwise noted)

Figure 49. Reference Voltage Load Regulation Histogram Figure 50. Quiescent Current vs Temperature

Figure 51. Power-On Reset Threshold vs Temperature

compensation

coil

primary

current

conductor

magnetic

core

Integrator and Filter

Fluxgate

Sensor H-Bridge

Driver

1.65 V or 2.5 V

Voltage Reference

Device Control and Degaussing

VOUT

REFIN

REFOUT

RSEL0 RSEL1

VDD GND ICOMP1 ICOMP2 AINP AINN

OR ER DEMAG GSEL0 GSEL1

DRV421

return current

conductor

(optional)

Shunt

Sense

Amplifier

Fluxgate Sensor Front-End

RSHUNT

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7 Detailed Description

7.1 Overview

The DRV421 is a fully-integrated, magnetic fluxgate sensor, with the necessary sensor conditioning and

compensation circuitry for closed-loop current sensors. The device is inserted into an air gap of an external

ferromagnetic toroid core to sense the magnetic field. A compensation coil wrapped around the magnetic core

generates a magnetic field opposite to the one generated by the current flow to be measured.

At dc and low-frequencies, the magnetic field induced by the current in the primary conductor generates a flux in

the magnetic core. The fluxgate sensor detects the flux in the DRV421. The device filters the sensor output to

provide loop stability. The filter output connects to the built-in H-bridge driver that drives an opposing current

through the external compensation coil. The compensation coil generates an opposite magnetic field that brings

the original magnetic flux in the core back to zero.

At higher frequencies, the inductive coupling between the primary conductor and compensation coil directly

drives a current through the compensation coil.

The compensation current is proportional to the primary current (IPRIMARY), with a value that is calculated using

Equation 1:

IICOMP = IPRIMARY / NWINDING

where

• NWINDING = the number of windings of the compensation coil (1)

This compensation current generates a voltage drop across a small external shunt resistor, RSHUNT. An

integrated difference amplifier with a fixed gain of 4 V/V measures this voltage and generates an output voltage

that is referenced to REFIN and proportional to the primary current. The Functional Block Diagram section shows

the DRV421 used as a closed-loop current sensor, for both single-ended and differential primary currents.

7.2 Functional Block Diagram

CORE WINDING

MOD G N

D421

TI Date

Code

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7.3 Feature Description

7.3.1 Fluxgate Sensor

The fluxgate sensor of the DRV421 is uniquely suited for closed-loop current sensors because of its high

sensitivity, low noise, and low offset. The fluxgate principle relies on repeatedly driving the sensor in and out of

saturation; therefore, the sensor is free of any significant magnetic hysteresis. The feedback loop accurately

drives the magnetic flux inside the core to zero.

The DRV421 package is free of any ferromagnetic materials in order to prevent magnetization by external fields

and to obtain accurate and hysteresis-free operation. Select nonmagnetizable materials for the printed circuit

board (PCB) and passive components in the direct vicinity of the DRV421; see the Layout Guidelines section for

more details.

Figure 52 shows the orientation of the fluxgate sensor and the direction of magnetic sensitivity inside of the

package. This orientation is marked by a straight line on top of the package.

Figure 52. Orientation and Magnetic Sensitivity Direction of the Integrated Fluxgate Sensor

7.3.2 Integrator-Filter Function and Compensation Loop Stability

The DRV421 and the magnetic core are components of the system feedback loop that compensates the

magnetic flux generated by the primary current. Therefore, the loop properties and stability depend on both

components. Four key parameters determine the stability and effective loop gain at high frequencies:

GSEL[1:0] Filter gain setting pins of the DRV421

GCORE Open-loop, current-to-field transfer of the magnetic core

Amount of magnetic field generated by 1 A of uncompensated primary current (unit is T/A).

NWINDING Number of compensation coil windings

LCompensation coil inductance

A minimum inductance of 100 mH is required for stability. Higher inductance improves

overload current robustness (see the Overload Detection and Control section).

To properly select the filter gain of the DRV421, combine these three parameters into a modified gain factor

(GMOD) using Equation 2:

(2)

The effective loop gain is proportional to the current-to-field transfer of the magnetic core (larger field means

larger gain) and number of compensation coil windings (larger number of windings means larger compensation

field for a given input current). The compensation coil inductance adds a low-frequency pole to the system, thus

a larger inductance reduces the effective loop gain at higher frequencies. A more detailed review of system loop

stability is provided in application report SLOA224,Designing with the DRV421: Control Loop Stability.

For stable operation with a wide range of magnetic cores, the DRV421 features an adjustable loop filter

controlled with pins GSEL1 and GSEL0. Table 1 lists the different filter settings and the related core properties.

For standard closed-loop current transducer modules with medium inductance and small shunt resistor value,

use gain setting 10. Gain setting 01 features a higher integrator-filter crossover frequency of 3.8 kHz, and is

recommended for fault-current sensors with a large shunt resistor and medium inductance.

ICOMP1

ICOMP2

VOUT ER

ICOMP1

ICOMP2

VOUT ER

ICOMP1

ICOMP2

VOUT ER

ICOMP1

ICOMP2

VOUT ER

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Feature Description (continued)

Table 1. DRV421 Loop Gain Filter Settings and Relation to Magnetic Core Parameters

GSEL1 GSEL0

COMPENSATION LOOP PROPERTIES RANGE OF

MODIFIED GAIN

FACTOR GMOD

RANGE OF COMPENSATION

COIL INDUCTANCE L

(NWINDING = 1000

and GCORE = 0.6 mT/A)

INTEGRATOR CORNER

FREQUENCY AC OPEN-LOOP GAIN

0 0 3.8 kHz 8.5 3 < GMOD < 12 100 mH < L < 200 mH

0 1 3.8 kHz 38 1 < GMOD < 3 200 mH < L < 600 mH

1 0 1.9 kHz 25 1 < GMOD <3 200 mH < L < 600 mH

1 1 1.9 kHz 70 0.3 < GMOD < 1 600 mH < L < 2 H

Table 1 gives an initial gain-setting recommendation based on a simulation model of a generic magnetic core.

Secondary magnetic effects, such as eddy current losses and core hysteresis, can lead to different optimal

settings. Therefore, make sure to verify the correct gain setting by measuring the response of the current sensor

to an input current step at compensation driver output pins ICOMP1 and ICOMP2. Examples of measurement

results with a magnetic core of 300 mH, 1000 compensation coil windings, and different DRV421 gain settings

are shown in Figure 53 to Figure 56.

Figure 53. Settling of ICOMP1 and ICOMP2

with GSEL[1:0] = 00 Figure 54. Settling of ICOMP1 and ICOMP2

with GSEL[1:0] = 01

Figure 55. Settling of ICOMP1 and ICOMP2

with GSEL[1:0] = 10 Figure 56. Settling of ICOMP1 and ICOMP2

with GSEL[1:0] = 11

These measurement examples show a stable response for both GSEL[1:0] = 10 and 11 settings. However,

inductive coupling between the primary current and compensation coil makes it difficult to measure high-

frequency instability. Therefore, use the lowest gain setting that yields a stable response; in this case, use gain

setting 10.

4 5

1 SHUNT 3

R + R

4 = =

R R + R

Shunt Sense

Amplifier VOUT

REFIN

AINN

RSHUNT

AINP

ICOMP2

Compensation

Coil

10 k

40 k

10 k

40 k

REFIN (compensated)

DRV421

500 

optional

ADC

(Dummy Shunt)

10 nF

ICOMP1

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7.3.3 H-Bridge Driver for Compensation Coil

The H-bridge compensation coil driver provides the current for the compensation coil at pins ICOMP1 and

ICOMP2. A fully-differential driver stage maximizes the driving voltage that is needed to overcome the wire

resistance and inductance of the coil with a single 3.3-V or 5-V supply. The low impedance of the H-bridge driver

outputs over a wide frequency range provides a smooth transition between the compensation frequency range of

the integrator-filter stage and the high-frequency range of the primary current that directly couples into the

compensation coil according to the winding ratio (transformer effect).

The common-mode voltage of the H-bridge driver outputs is set by the RSEL pins (see the Voltage Reference

section). Thus, the common-mode voltage of the shunt sense amplifier is matched if the internal reference is

used.

The two compensation driver outputs are protected and accept inductive energy. However, for high-current

sensors, add external protection diodes (see the Protection Recommendations section).

Consider the polarity of the compensation coil connection to the output of the H-bridge driver. If the polarity is

incorrect, the H-bridge output drives to the power supply rails, even at low primary-current levels. In this case,

interchange the connection of pins ICOMP1 and ICOMP2 to the compensation coil.

7.3.4 Shunt Sense Amplifier

The compensation coil current creates a voltage drop across the external shunt resistor, RSHUNT. The internal

differential amplifier senses this voltage drop. This differential amplifier offers wide bandwidth and a high slew

rate for fast current sensors. Excellent dc stability and accuracy result from an autozero technique. The voltage

gain is 4 V/V, set by precisely-matched and thermally-stable internal resistors.

Both AINN and AINP differential amplifier inputs are connected to the shunt resistor. This resistor, in series with

the internal 10-kΩresistor, affects the overall gain and causes an additional gain error; this gain error is often

negligible. However, if a common-mode rejection of 70 dB is desired, the match of both divider ratios must be

higher than 1/3000. Therefore, for best common-mode rejection performance, place a dummy shunt resistor (R5)

with a value higher than the shunt resistor in series with the REFIN pin to restore matching of both resistor

dividers, as shown in Figure 57.

Figure 57. Internal Difference Amplifier with Example of a Decoupling Filter

For an overall gain of 4 V/V, calculate the value of R5using Equation 3:

where:

• R2/ R1= R4/ R3= 4

• R5= RSHUNT × 4 (3)

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If the input signal is large, the amplifier output drives close to the supply rails. The amplifier output is able to drive

the input of a successive approximation register (SAR) analog-to-digital converter (ADC). For best performance,

add an RC low-pass filter stage between the shunt sense amplifier output and the ADC input. This filter limits the

noise bandwidth and decouples the high-frequency sampling noise of the ADC input from the amplifier output.

For filter resistor RFand filter capacitor CFvalues, refer to the specific converter recommendations in the

respective product data sheet.

The shunt sense amplifier output drives 100 pF directly and shows 50% overshoot with a 1-nF capacitance. Filter

resistor RFextends the capacitive load range. Note that with an RFof only 20 Ω, the load capacitor must be

either less than 1 nF or more than 33 nF to avoid overshoot; with an RFof 50 Ω, this transient area is avoided.

Reference input REFIN is the common-mode voltage node for output signal VOUT. Use the internal voltage

reference of the DRV421 by connecting the REFIN pin to reference output REFOUT. To avoid mismatch errors,

use the same reference voltage for REFIN and the ADC. Alternatively, use an ADC with a pseudodifferential

input, with the positive input of the ADC connected to the VOUT and the negative input connected to REFIN of

the DRV421.

7.3.5 Overrange Comparator

High peak current across the shunt resistor can generate a voltage drop that overloads the shunt sense amplifier

input. The open-drain, active-low output overrange pin (OR) indicates an overvoltage condition of the amplifier.

The output of this flag is suppressed for 3 μs, preventing unwanted triggering from transients and noise. This pin

returns to high as soon as the overload condition is removed; an external pull-up resistor is required to return the

OR pin to high.

This OR output can be used as a window comparator to actively shut off circuits in the system. The value of the

shunt resistor defines the operating window for the current, and sets the ratio between the nominal signal and the

trip level of the overrange comparator. The trip level (IMAX) of this window comparator is calculated using

Equation 4:

IMAX = Input Voltage Swing / RSHUNT

where

• Input Voltage Swing = Output Voltage Swing / Gain (4)

For example, with a 5-V supply, the output voltage swing is approximately ±2.45 V (load and supply voltage-

dependent).

The gain of 4 V/V enables an input voltage swing of ±0.6125 V.

The resulting trip level is IMAX = 0.6125 V / RSHUNT.

See Figure 32 and Figure 33 in the Typical Characteristics section for details.

Common window comparators use a preset level to detect an overrange condition. The DRV421 internally

detects an overrange condition as soon as the amplifier exceeds the linear operating range, not just at a preset

voltage level. Therefore, the error is reliably indicated in faults such as output-short, low-load, or low-supply

conditions. This configuration is a safety improvement if compared to a standard voltage-level comparator.

The internal resistance of the compensation coil may prevent high compensation current flow because of H-

bridge driver overload; therefore, the shunt sense amplifier might not overload. However, a fast rate of change of

the primary current transmitted through transformer effect safely triggers the overload flag.

VOUT

REFOUT

Internal

Voltage

Reference

600 

REFIN

Current Sense Module

VDD

GND

External

Voltage

Reference

Shunt Sense

Amplifier VOUT

REFIN

DRV421

(Dummy Shunt)

GND

VDDAINN

RSHUNT

AINP

ICOMP2

Compensation

Coil

ICOMP1

REFOUT EXT

REFOUT V V

I600 



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7.3.6 Voltage Reference

The internal precision voltage reference circuit offers low drift performance at the REFOUT output pin and is

used for internal biasing. The reference output is intended to be the common-mode voltage of the output (VOUT

pin) to provide a bipolar signal swing. This low-impedance output tolerates sink and source currents of ±5 mA.

However, fast load transients can generate ringing on this line. A small series resistor of a few ohms improves

the response, particularly for capacitive loads equal to or greater than 1 μF.

Adjust the value of the voltage reference output to the power supply of the DRV421 using mode selection pins

RSEL0 and RSEL1, as shown in Table 2.

Table 2. Reference Output Voltage Selection

MODE RSEL1 RSEL0 DESCRIPTION

VREFOUT = 2.5 V 0 0 Use with sensor module supply of 5 V

VREFOUT = 1.65 V 0 1 Use with sensor module supply of 3.3 V

Ratiometric output 1 x Provides output centered on VDD / 2

In ratiometric output mode, an internal resistor divider divides the power supply voltage by a factor of two.

For current sensor modules with a reference input pin, the DRV421 also allows overwriting the internal reference

with an external reference voltage, VEXT, as shown in Figure 58. If there is a significant difference between the

external and the internal voltage, resistor R5limits the current flow from the internal reference. In this case, the

internal reference sources current IREFOUT shown in Equation 5:

(5)

Figure 58. DRV421 with External Reference

The example of 600 Ωfor R6was chosen for illustration purposes; different values are possible. If no external

reference is connected, R6has little impact on the common-mode rejection of the shunt sense amplifier;

therefore, use a resistor value that is as small as possible.

Primary Current Compensation Current

Magnetic Field in the Core

Fluxgate Sensor Output

1000 A

0 A

1 A

0 A

1.7 mT

0 mT

t t

Saturation Detection Level

1 mT

-1 mT

Normal

operation

area

Fluxgate

sensor

saturated

Fluxgate

sensor

saturated

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7.3.7 Overload Detection and Control

Magnetic fluxgate sensors have a very high sensitivity and allow detection of small magnetic fields. These

sensors are ideally suited for use in closed-loop current modules appllications because the high sensitivity makes

sure that the field inside the core gap is accurately driven to zero. However, for large fields, the fluxgate

saturates and causes the output to return to zero, as shown in Figure 59.

Figure 59. Typical Fluxgate Sensor Response to Magnetic Fields

In normal operation, the feedback loop keeps the magnetic field close to zero. However, large overload currents

that exceed the measurement range (for example, short-circuit currents) saturates the fluxgate. The behavior is

shown in Figure 60, where the compensation current, magnetic field in the core, and fluxgate output are shown

for the case of a 1000-A primary current step.

Figure 60. Closed-Loop Current Sensor Response to an Overloaded Step Current

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Use the inverse of Equation 1 to calculate the current measurement range. For example, if the compensation coil

has 1000 windings, the maximum measurement range is 210 A at a 5-V supply (210-mA minimum compensation

driver capability × 1000 windings). The inductive coupling between primary current and compensation coil initially

provides a correct compensation current. However, over time, the compensation current drops to 210 mA and

the field inside the core increases beyond the measurement range of the fluxgate. Thus, the sensor output

returns to zero because of saturation.

This zero output causes unpredictable behavior in the analog control loop. For example, as a result of an invalid

fluxgate output, the H-bridge drives the wrong compensation current and generates a large magnetic field

through the compensation coil. This magnetic field keeps the fluxgate in saturation and leads to system lockup.

This unpredicatable behavior exists for any fluxgate-based current sensor.

For proper handling of overload currents, the DRV421 features a two-step overload detection and control

function. Firstly, the polarity of the last four fluxgate sensor outputs exceeding a threshold value of approximately

13 µT are internally stored. Secondly, the DRV421 features an additional circuitry that verifies every 4 µs whether

the fluxgate is saturated. If saturation is detected, digital circuitry overrides the fluxgate output and provides a

high output according to the polarity detected during the last valid sensor output. As a result, the H-brigde drives

the outputs to the supply rails, making sure that the magnetic field returns to within the fluxgate range as soon as

the current returns to within the measurement range. After this happens, the fluxgate is no longer saturated, and

normal analog feedback loop operation resumes. During fluxgate saturation, the error pin is pulled low to signal

that the current exceeds the measurement range (see the Error Flag section).

For correct operation of this overload control feature, at least 10 µs are required between the time the field

exceeds the polarity detection threshold (13 µT) and the saturation trip level (1.7 mT). Initially, fast primary

current steps are inductively coupled to the compensation coil (transformer effect); therefore, the primary current

rise time is not limited. Instead, the rise time is determined by the compensation coil inductance; a larger

inductance leads to a slower compensation current decrease. The minimum required inductance is 100 mH; for

optimal robustness, use 300 mH (see the Magnetic Core Design section for detailed requirements).

Time (ms)

Voltage (V)

-0.1 0 0.1 0.2 0.3 0.4 0.5 0.6

-8

D052

VDD

VOUT

VICOMP1

VICOMP2

1000 mA

100 mA

10 mA

1 mA

Error Current Level

before Demagnetization

Repeatable Error Current

Level after Demagnetization

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7.3.8 Magnetic Core Demagnetization

Ferromagnetic cores can have a significant remanence (residual magnetism in the absence of any currents).

This core magnetization is caused by strong external magnetic fields, overcurrent conditions in the system, or if a

significant primary current flows when the sensor is not powered. This remaining magnetic field is

indistinguishable from an actual primary current, and creates a magnetic offset error. This magnetic offset error

limits the precision and the dynamic range of the current sensor, and is independent of the fluxgate sensor front-

end offset specified in this data sheet.

To reduce errors caused by core magnetization, the DRV421 features a unique closed-loop demagnetization

feature. Conventional open-loop demagnetization techniques rely on driving a fixed ac waveform through the

compensation coil. Instead, the DRV421 demagnetization feature first measures the magnetic offset using its

integrated fluxgate sensor, and then drives a controlled ac waveform to reduce the measured magnetization.

This method results in significantly better results. Moreover, any fluxgate offset is part of the closed-loop

demagnetization measurement, and therefore removed along with core magnetization, leaving only fluxgate

offset drift over temperature as an error source.

Start the demagnetization feature on demand by pulling the DEMAG pin high for at least 25 µs. This process

starts a 500-ms demagnetization cycle. During this time, the error pin (ER) is pulled low to indicate that the

output is not valid. When DEMAG is high during power up, the demagnetization cycle initiates immediately after

the supply voltage crosses the power-up threshold. Hold DEMAG low to avoid this cycle during start up. To abort

the demagnetization cycle, pull DEMAG low for longer than 25 µs. Figure 61 shows the ICOMPx output behavior

during a demagnetization sequence. Figure 62 shows the reduced error resulting from core demagnetization.

Figure 61. Demagnetization Sequence Figure 62. Impact of Demagnetization on Error Current

During a demagnetization cycle, the primary current must be zero because the resulting magnetic field cannot be

distinguished from the remanence of the core. A demagnetization cycle in the presence of primary current (or

any other sources of magnetic field) leads to residual errors because the demagnetization feature attempts to

reduce the primary-generated field to zero, but significantly magnetizes the core instead of demagnetizing the

core. If a primary current is present that is large enough to saturate the fluxgate sensor during start up, the

DRV421 skips demagnetization (regardless of the level on the DEMAG pin), and the search function starts

instead (see the Search Function section for more details).

To reduce effects from the earth's magnetic field, degauss in the same orientation as nominal operation of the

system.

VDD

VICOMP1

VICOMP2

VER

Search Function

with Wrong Polarity

Inverted

Polarity

Normal

Operation

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7.3.9 Search Function

Closed-loop current sensors usually require primary current to be applied only after the sensor is powered up.

This requirement allows the feedback loop to start from zero current operation; the magnetic core is maintained

at zero flux at all times, thus preventing magnetization. Moreover, the DRV421 integrated fluxgate has a limited

measurement range of 1.7 mT. As a result, the presence of a significant primary current at power up saturates

the fluxgate, and the system feedback loop does not work; similar to the presence of an overload current (see

the Overload Detection and Control section).

The DRV421 search function allows for a power up in presence of primary dc current. If the fluxgate is saturated

at power up, the digital logic of the DRV421 connects ICOMP1 to VDD and COMP2 to GND for 30 ms. Because

of the compensation coil inductance, the compensation current slowly increases during this time, and depending

on the primary current polarity, may at some point compensate the primary current. In this case, the fluxgate

sensor desaturates and normal operation initiates. If the fluxgate sensor is still saturated after 30 ms, the voltage

polarity on ICOMPx pins is inverted (ICOMP1 = GND, ICOMP2 = VDD) and the process repeats for opposite

primary current polarity. If the fluxgate remains saturated after 60 ms, the error state persists and the error pin

ER remains active low. Figure 63 shows a search sequence starting with the wrong polarity.

Figure 63. Search Sequence Starting with Wrong Polarity

The search funciton cannot be used for primary ac currents. Moreover, the presence of primary current before

the sensor is powered up may lead to core magnetization, and thus offset shift. Therefore, for robust operation,

do not power up in the presence of primary currents.

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7.3.10 Error Flag

The DRV421 features an error output (ER pin) that is activated under multiple conditions. The error flag is active

when the output voltage is not proportional to the primary current; during a power fail or brownout; during a

demagnetization cycle; or when the magnetic field on the fluxgate is greater than 1.7 mT (saturation of the

fluxgate). Saturation is usually caused by either the consequence of an overload current (see the Overload

Detection and Control section) or results from a power-up in the presence of a primary current (see the Search

Function section).

The error flag resets as soon as the error condition is no longer present and the circuit has returned to normal

operation. The error flag is an open-drain logic output. Connect the error flag to the overrange flag for a wired-

OR; for proper operation, use an external pull-up resistor. The following conditions result in error flag activation

(ER asserts low):

1. For 80 µs after power-up

2. If a supply-voltage brownout condition (VDD < 2.4 V) lasts for more than 20 µs

3. If the sensed magnetic field is > 1.7 mT because:

– Overload control is active

– Search function is active

4. Demagnetization cycle is active (see the Magnetic Core Demagnetization section)

7.4 Device Functional Modes

The DRV421 has a single functional mode and is operational when the power-supply voltage is greater than 3 V.

The maximum power supply voltage for the DRV421 is 5.5 V.

DRV421

www.ti.com

SBOS704B –MAY 2015–REVISED MARCH 2016

Product Folder Links: DRV421

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Magnetic Core Design

The high sensitivity, low offset, and low noise of the DRV421 fluxgate sensor enable a high-performance closed-

loop current sensor module. For good module performance, an appropriate magnetic core design is required.

Table 3 lists the DRV421 and magnetic core specifications with relation to the overall current module

specifications.

Table 3. Current-Sensor Module Performance versus

DRV421 Specifications and Magnetic Core Performance

CURRENT SENSOR MODULE

PARAMETER PERFORMANCE DETERMINED BY:

Offset and offset drift DRV421 fluxgate sensor front-end: offset and offset drift

Offset on start-up and after

overload condition Magnetic core: magnetization (see the Magnetic Core Demagnetization section)

Noise DRV421 fluxgate sensor front-end: noise

Linearity error DRV421 fluxgate sensor front-end: AC open-loop gain

Gain error Magnetic core: Permeability, geometry, and actual number of compensation coil windings

Measurement range 1) DRV421 fluxgate sensor front-end: H-bridge peak current

2) Compensation coil: number of windings and resistance

3) Value of the external shunt resistor

Neighbor-current rejection

(crosstalk) Magnetic core: permeability, sensor gap design, and magnetic shielding

Bandwidth and gain flatness 1) DRV421 fluxgate sensor front-end: AC open-loop gain setting

2) Magnetic core: high-frequency behavior of the core and inductance of the compensation coil

3) Value of the external shunt resistor

Common-mode current rejection

(for fault current sensors) Magnetic core: permeability, actual position of the primary current conductors, and magnetic shielding

For further details, see application report SLOA223,Designing with the DRV421: Closed Loop Current Sensor

Specifications.

VDD

DRV421

SBOS704B –MAY 2015–REVISED MARCH 2016

www.ti.com

Product Folder Links: DRV421

Application Information (continued)

8.1.2 Protection Recommendations

Inputs AINP and AINN require external protection to limit the voltage swing to within 6 V beyond both supply

rails. Driver outputs ICOMP1 and ICOMP2 handle high-current pulses protected by internal clamp circuits to the

supply voltage. If large magnitude overcurrents are expected, connect external Schottky diodes to the supply

rails to protect the DRV421 from damage.

CAUTION

Large overcurrents may drive the power supply above the normal operating voltage.

Route large overcurrent pulses away from the device using diodes connected to the

supply, as shown in the typical application on the front page. To prevent these pulses

from driving up the supply voltage, and prevent damage to the DRV421 and other

components in the circuit, use an additional supply clamp, as shown in Figure 64. All

other pins offer standard protection; see the Absolute Maximum Ratings.

Figure 64. Additonal Supply Clamp for the DRV421

compensation

coil

primary

current

conductor

magnetic

core

DRV421

VDD optional

RSHUNT

Closed-Loop Current Module

VOUT

REFIN

REFOUT

RSEL0

RSEL1

VDD

GND

ICOMP1

ICOMP2

AINP

AINN

DEMAG

GSEL0

GSEL1 DRV421

ADC

MCU

GPIO0

GPIO1

GPIO2

VDD

GND

VDD

R1 R2

DRV421

www.ti.com

SBOS704B –MAY 2015–REVISED MARCH 2016

Product Folder Links: DRV421

8.2 Typical Application

8.2.1 Closed-Loop Current Sensing Module

Closed-loop current sensor modules (Figure 65) measure currents over a wide frequency range, including dc

currents. These sensor modules offer a contact-free sensing method and excellent galvanic isolation

performance, combined with high resolution, accuracy, and reliability. The DRV421 is designed for use in this

kind of application.

At dc and in low-frequency range, the magnetic field induced by the primary current is sensed by the DRV421

fluxgate sensor. The sensed signal is filtered by the DRV421 and the internal H-bridge driver generates a

proportional compensation current. The compensation current flows through the compensation coil, and

generates a magnetic field. This magnetic field drives the original magnetic flux in the core back to zero. The

value of this magnetic field is increased by the number of compensation coil windings. Therefore, use Equation 1

to calculate the required compensation current for a given primary current.

At higher frequencies, the magnetic field induced by the primary current directly couples into the compensation

coil and generates a current. The low impedance of the H-bridge driver does not influence the value of this

current. Also in this case, the value of the compensation current is the value of the primary current divided by the

number of compensation coil windings.

Figure 65. Closed-Loop Current Sensing Module

Frequency (Hz)

Normalized Gain (dB)

1 10 100 1000 10000 100000

0.94

0.96

0.98

1.02

1.04

1.06

D053

Primary Current (A)

Current Error referred to Primary Current (%)

0.0001 0.001 0.01 0.1 1 10 100

-0.03

-0.02

-0.01

0.01

0.02

0.03

D054

ICOMP(MIN)

SHUNT COIL ICOMP

R R I

 d

PRIM

OUT PRIM SHUNT

WINDING

V I R G

§ ·

u u u

¨ ¸

DRV421

SBOS704B –MAY 2015–REVISED MARCH 2016

www.ti.com

Product Folder Links: DRV421

Typical Application (continued)

8.2.1.1 Design Requirements

A closed-loop current sensing module contains the DRV421, the magnetic core with a compensation coil, and a

shunt resistor. To increase the robustness of the module to high primary current peaks, use additional protection

diodes. See application report SLOA223,Designing with the DRV421: Closed Loop Current Sensor

Specifications, for additional information on the magnetic core and compensation coil design. The DRV421

output voltage is calculated as described in Equation 6:

where:

• IPRIM = primary current value

• NPRIM = the number of windings of the primary current conductor

• NWINDING = the number of windings of the compensation coil

• RSHUNT = shunt resistor value

• G = shunt sense amplifier gain; default value is 4 (6)

8.2.1.2 Detailed Design Procedure

The compensation current creates a voltage drop across the shunt resistor. The maximum shunt resistor value is

limited by supply voltage VDD, the compensation current range, and the resistance of the compensation coil, as

described in Equation 7:

(7)

The voltage drop across the shunt resistor is sensed by the DRV421 shunt sense amplifier with a gain of four.

For proper operation, keep the resulting output voltage at VOUT pin within the voltage output swing range

specified in the Electrical Characteristics.

8.2.1.3 Application Curves

Figure 66. Gain Flatness of a DRV421-Based Closed-Loop

Current Sensing Module Figure 67. Current Error of a DRV421-Based Closed-Loop

Current Sensing Module

compensation

coil

primary

current

conductor

magnetic

core

DRV421

return

current

conductor

VDD optional

RSHUNT

Differential Closed-Loop Current Module

VOUT

REFIN

REFOUT

RSEL0

RSEL1

VDD

GND

ICOMP1

ICOMP2

AINP

AINN

DEMAG

GSEL0

GSEL1 DRV421

ADC

MCU

GPIO0

GPIO1

GPIO2

VDD

GND

VDD

R1 R2

DRV421

www.ti.com

SBOS704B –MAY 2015–REVISED MARCH 2016

Product Folder Links: DRV421

Typical Application (continued)

8.2.2 Differential Closed-Loop Current Sensing Module

The differential closed-loop current sensing module (Figure 68) measures the difference between two or more

currents. Typical end-applications for such modules are leakage or residual current sensors. The high sensitivity

of the fluxgate sensor and the low temperature drift make the DRV421 a suitable choice for this type of modules.

The principle operation is the same as that of the closed-loop current module described in the Closed-Loop

Current Sensing Module section. The compensation current corresponds to the current difference between the

primary conductors.

Figure 68. Differential Closed-Loop Current Sensing Module

Primary Current (A)

Current Error referred to Primary Current (%)

0.0001 0.001 0.01 0.1 1

-0.03

-0.02

-0.01

0.01

0.02

0.03

D055

DRV421

SBOS704B –MAY 2015–REVISED MARCH 2016

www.ti.com

Product Folder Links: DRV421

Typical Application (continued)

8.2.2.1 Design Requirements

As with the previous application, the compensation current creates a voltage drop across the shunt resistor. The

maximum shunt resistor value is limited by supply voltage VDD, the compensation current range, and the

resistance of the compensation coil; see Equation 7.

However, in applications that sense leakage or residual currents, the difference between the primary currents is

zero in normal operation. In fault condition only, there is a small difference current that is sensed in order to shut

down the system to prevent damage to the device or the user. In this case, the compensation current is also very

low, usually only in the range of few mA. Therefore, use a higher shunt resistor value in this case to support high

sensitivity on system level. Consider the impact of shunt resistor value on gain and gain flatness as decribed in

application report SLOA223,Designing with the DRV421: Closed Loop Current Sensor Specifications.

8.2.2.2 Detailed Design Procedure

For differential current sensing modules with a large shunt resistor and medium compensation coil inductance,

use the gain setting that features the higher cross-over frequency of 3.8 kHz: GSEL[1:0] = 01.

8.2.2.3 Application Curve

Figure 69. Current Error of a DRV421-Based

Differential Closed-Loop Current Sensing Module

H-Bridge

Driver

ICOMP1

GND

Fluxgate

Sensor

RSHUNT

ICOMP2

VDD

External

Driver

DRV421

Compensation

Coil

LDO 5 V

+15 V

-15 V

DRV421

www.ti.com

SBOS704B –MAY 2015–REVISED MARCH 2016

Product Folder Links: DRV421

Typical Application (continued)

8.2.3 Using the DRV421 in ±15-V Sensor Applications

The DRV421 is designed for 3.3-V or 5-V nominal operation. To support a wider module current range, the

device is also used in ±15-V application, as shown in Figure 70. In this application, an external regulator

generates the 5-V supply for the DRV421. An additional external ±15-V power driver stage drives the

compensation coil. These techniques allow the design of exceptionally precise and stable ±15-V current-sense

modules.

Figure 70. ±15-V Current-Sense Modules

DRV421

SBOS704B –MAY 2015–REVISED MARCH 2016

www.ti.com

Product Folder Links: DRV421

9 Power-Supply Recommendations

9.1 Power-Supply Decoupling

Decouple both VDD pins of the DRV421 with 1-uF X7R-type ceramic capacitors to the adjacent GND pin as

illustrated in Figure 71. For best performance, place both decoupling capacitors as close to the related power-

supply pins as possible. Connect these capacitors to the power-supply source in a way that allows the current to

flow through the pads of the decoupling capacitors.

9.2 Power-On Start Up and Brownout

Power-on is detected when the supply voltage exceeds 2.4 V at VDD pin. At this point, DRV421 initiates

following start-up sequence:

1. Digital logic starts up and waits for 26 μs for the supply to settle.

2. Fluxgate sensor powers up.

3. If fluxgate sensor saturation is detected, search function starts as described in the Search Function section.

4. If DEMAG pin is set high, demagnetization cycle starts as described in the Magnetic Core Demagnetization

section.

5. The compensation loop is active after the demagnetization cycle, or 80 μs after the supply voltage exceeds

2.4 V.

During this startup sequence, the ICOMP1 and ICOMP2 outputs are pulled low to prevent undesired signals on

the compensation coil, and the ER pin is asserted low.

The DRV421 tests for low supply voltages with a brownout voltage level of 2.4 V. Use a power-supply source

capable of supporting large current pulses driven by the DRV421, and low ESR bypass capacitors for stable

supply voltage in the system. A supply drop below 2.4-V that lasts longer than 20 μs generates a power-on reset;

the device ignores shorter voltage drops. A voltage drop on the VDD pin to below 1.8 V immediately initiates a

power-on reset. After the power supply returns to 2.4 V, the device initiates a start-up cycle, as described at the

beginning of this section.

9.3 Power Dissipation

The thermally-enhanced, PowerPAD, WQFN package reduces the thermal impedance from junction to case.

This package has a downset lead frame on which the die is mounted. The lead frame has an exposed thermal

pad (PowerPAD) on the underside of the package, and provides a good thermal path for the heat dissipation.

The power dissipation on both linear outputs ICOMP1 and ICOMP2 is calculated with Equation 8:

PD(ICOMP) = IICOMP × (VICOMP – VSUPPLY)

where

• VSUPPLY = voltage potential closer to VICOMP, VDD, or GND (8)

CAUTION

Output short-circuit conditions are particularly critical for the H-bridge driver output pins

ICOMP1 and ICOMP2. The full supply voltage occurs across the conducting transistor

and the current is only limited by the current density limitation of the FET; permanent

damage can occur. The DRV421 does not feature temperature protection or thermal

shut-down.

9.3.1 Thermal Pad

Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but

board layout greatly influences the overall heat dissipation. Technical details are described in application report

SLMA002,PowerPad Thermally Enhanced Package, available for download at www.ti.com.

DRV421

www.ti.com

SBOS704B –MAY 2015–REVISED MARCH 2016

Product Folder Links: DRV421

10 Layout

10.1 Layout Guidelines

The DRV421 unique, integrated fluxgate has a very high sensitivity to magnetic fields in order to enable design of

a closed-loop current sensor with best-in-class precision and linearity. Observe proper PCB layout techniques

because any current-conducting wire in the direct vicinity of the DRV421 generates a magnetic field that may

distort measurements. Common passive components and some PCB plating materials contain ferromagnetic

materials that are magnetizable. For best performance, use the following layout guidelines:

• Route current conducting wires in pairs: route a wire with an incoming supply current next to, or on top of its

return current path. The opposite magnetic field polarity of these connection cancel each other. To facilitate

this layout approach, the DRV421 positive and negative supply pins are located next to each other.

• Route the compensation coil connections close to each other as a pair to reduce coupling effects.

• Route currents parallel to the fluxgate sensor sensitivity axis as shown in Figure 71. As a result, magnetic

fields are perpendicular to the fluxgate sensitivity, and have limited impact.

• Vertical current flow (for example, through vias) generates a field in the fluxgate-sensitive direction. Minimize

the number of vias in vincinity of the DRV421.

• Place all passive components (for example, decoupling capacitors and the shunt resistor) outside of the

portion of the PCB that is inserted into the magnetic core gap. Use nonmagnetic components to prevent

magnetizing effects.

• Do not use PCB trace finishes using nickel-gold plating because of the potential for magnetization.

• Connect all GND pins to a local ground plane.

Ferrite beads in series to the power-supply connection reduce interaction with other circuits powered from the

same supply voltage source. However, to prevent influence of the magnetic fields if ferrite beads are used, do

not place them next to the DRV421.

The reference output (REFOUT pin) refers to GND. Use a low-impedance and star-type connection to reduce the

driver current and the fluxgate sensor current modulating the voltage drop on the ground track. The REFOUT

and VOUT outputs are able to drive some capacitive load, but avoid large direct capacitive loading because of

increased internal pulse currents. Given the wide bandwidth of the shunt sense amplifier, isolate large capacitive

loads with a small series resistor.

Solder the exposed PowerPAD, on the bottom of the package to the ground layer because the PowerPAD is

internally connected to the substrate that must be connected to the most-negative potential.

Figure 71 illustrates a generic layout example that highlights the placement of components that are critical to the

DRV421 performance. For specific layout examples, see SLOU409,DRV421EVM Users Guide, and TIDUA92,

TIPD196 Design Guide.

Compensation

Coil

Keep this area free of components

creating magnetic fields.

LEGEND

Top Layer:

Copper Pour and Traces

Via to Ground Plane

Via to Supply Plane

GSEL1

DEMAG

GND

AINN

AINP

ICOMP1

ICOMP2

GSEL0

RSEL1

RSEL0

REFOUT

REFIN

VOUT

GND

VDD

GND

1 µF

X7R

0603

1 µF

X7R

0603

RSHUNT

1206

To ADC

Fluxgate sensor sensitivity axis

DRV421

SBOS704B –MAY 2015–REVISED MARCH 2016

www.ti.com

Product Folder Links: DRV421

10.2 Layout Example

Figure 71. Generic Layout Example (Top View)

DRV421

www.ti.com

SBOS704B –MAY 2015–REVISED MARCH 2016

Product Folder Links: DRV421

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

• DRV421EVM Users Guide, SLOU409

• TIPD196 Design Guide, TIDUA92

•Designing with the DRV421: Closed Loop Current Sensor Specifications,SLOA223

•Designing with the DRV421: Control Loop Stability,SLOA224

11.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.3 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.5 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM

www.ti.com 11-Mar-2016

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

DRV421RTJR ACTIVE QFN RTJ 20 3000 Green (RoHS

& no Sb/Br) CU Level-3-260C-168 HR -40 to 125 ----->

DRV421

DRV421RTJT ACTIVE QFN RTJ 20 250 Green (RoHS

& no Sb/Br) CU Level-3-260C-168 HR -40 to 125 ----->

DRV421

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

PACKAGE OPTION ADDENDUM

www.ti.com 11-Mar-2016

Addendum-Page 2

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

DRV421RTJR QFN RTJ 20 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2

DRV421RTJT QFN RTJ 20 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

DRV421RTJR QFN RTJ 20 3000 367.0 367.0 35.0

DRV421RTJT QFN RTJ 20 250 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 2

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Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949

and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.

Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such

products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards

and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must

ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in

life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.

Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life

support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all

medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.

TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).

Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications

and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory

requirements in connection with such selection.

Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-

compliance with the terms and provisions of this Notice.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

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