SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D - JUNE 2000 - REVISED DECEMBER 2000 D D D D DBV OR DCK PACKAGE (TOP VIEW) Supports 5-V VCC Operation Input and Open-Drain Output Accept Voltages up to 5.5 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) NC A GND 1 5 VCC 4 Y 2 3 NC - No internal connection description This single inverter buffer/driver is designed for 1.65-V to 5.5-V VCC operation. The output of the SN74LVC1G06 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA. ORDERING INFORMATION -40C 40C to 85C ORDERABLE PART NUMBER PACKAGE TA TOP-SIDE MARKING SOP (SOT-23) - DBV Tape and reel SN74LVC1G06DBVR C06_ SOP (SC-70) - DCK Tape and reel SN74LVC1G06DCKR CT_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE INPUT A OUTPUT Y H L L H logic symbol A 2 4 1 Y This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) A 2 4 Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D - JUNE 2000 - REVISED DECEMBER 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 3): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions VCC VIH VIL VI VO Supply voltage High level input voltage High-level Low level input voltage Low-level Operating Data retention only VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MIN MAX 1.65 5.5 1.5 t/v TA 2 V 0.65 x VCC 1.7 V 2 0.7 x VCC 0.35 x VCC VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0.8 V 0.3 x VCC Input voltage 0 5.5 V Output voltage 0 5.5 V VCC = 1.65 V VCC = 2.3 V IOL UNIT Low-level output current Input transition rise or fall rate 4 8 16 VCC = 3 V VCC = 4.5 V VCC = 1.8 V 0.15 V, 2.5 V 0.2 V 32 VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V 10 Operating free-air temperature 20 * DALLAS, TEXAS 75265 ns/V 5 -40 POST OFFICE BOX 655303 mA 24 85 C SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D - JUNE 2000 - REVISED DECEMBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOL = 100 mA IOL = 4 mA 0.45 2.3 V 0.3 0.4 3V VI = 5.5 V or GND, One input at VCC - 0.6 V, IO = 0 Other inputs at VCC or GND UNIT V 0.55 4.5 V IOL = 32 mA VI = 5.5 V or GND ICC Ci MAX 1.65 V IOL = 24 mA II ICC TYP 0.1 IOL = 8 mA IOL = 16 mA VOL MIN 1.65 V to 5.5 V 0.55 0 to 5.5 V 5 mA 1.65 V to 5.5 V 10 mA 500 mA 3 V to 5.5 V VI = VCC or GND VO = VCC or GND Co All typical values are at VCC = 3.3 V, TA = 25C. 3.3 V 4 pF 3.3 V 5 pF switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 through 4) PARAMETER FROM (INPUT) TO (OUTPUT) A Y tpd VCC = 1.8 V 0.15 V VCC = 2.5 V 0.2 V VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX 2.2 5.6 1.1 4 1.2 4 1 3 ns operating characteristics, TA = 25C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS f = 10 MHz POST OFFICE BOX 655303 VCC = 1.8 V TYP VCC = 2.5 V TYP 3 * DALLAS, TEXAS 75265 3 VCC = 3.3 V TYP 4 VCC = 5 V TYP 6 UNIT pF 3 SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D - JUNE 2000 - REVISED DECEMBER 2000 PARAMETER MEASUREMENT INFORMATION VCC = 1.8 V 0.15 V 2 x VCC S1 1 k From Output Under Test Open TEST S1 tPZL (see Note F) 2 x VCC tPLZ (see Note G) 2 x VCC tPHZ/tPZH 2 x VCC GND CL = 30 pF (see Note A) 1 k LOAD CIRCUIT tw VCC Timing Input VCC/2 VCC/2 VCC/2 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC/2 VCC/2 0V tPLH Output Control (low-level enabling) tPLZ VCC VCC/2 tPZH VCC VCC/2 VOL VCC/2 0V Output Waveform 1 S1 at 2 x VCC (see Note B) tPHL VCC/2 VCC VCC/2 tPZL VCC Input VOLTAGE WAVEFORMS PULSE DURATION th VCC Data Input VCC/2 0V 0V tsu Output VCC VCC/2 Input Output Waveform 2 S1 at 2 x VCC (see Note B) VOL + 0.15 V VOL tPHZ VCC/2 VCC VCC - 0.15 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2 ns, tf 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.15 V. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D - JUNE 2000 - REVISED DECEMBER 2000 PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V 0.2 V 2 x VCC S1 500 From Output Under Test Open TEST S1 tPZL (see Note F) 2 x VCC tPLZ (see Note G) 2 x VCC tPHZ/tPZH 2 x VCC GND CL = 30 pF (see Note A) 500 LOAD CIRCUIT tw VCC Timing Input VCC/2 VCC/2 VCC/2 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC/2 VCC/2 0V tPLH Output Control (low-level enabling) tPLZ VCC VCC/2 tPZH VCC VCC/2 VOL VCC/2 0V Output Waveform 1 S1 at 2 x VCC (see Note B) tPHL VCC/2 VCC VCC/2 tPZL VCC Input VOLTAGE WAVEFORMS PULSE DURATION th VCC Data Input VCC/2 0V 0V tsu Output VCC VCC/2 Input Output Waveform 2 S1 at 2 x VCC (see Note B) VOL + 0.15 V VOL tPHZ VCC/2 VCC VCC - 0.15 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2 ns, tf 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.15 V. Figure 2. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D - JUNE 2000 - REVISED DECEMBER 2000 PARAMETER MEASUREMENT INFORMATION VCC = 3.3 V 0.3 V 6V 500 From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 TEST S1 tPZL (see Note F) 6V tPLZ (see Note G) 6V tPHZ/tPZH 6V LOAD CIRCUIT tw 3V 3V Timing Input 0V 0V 3V 1.5 V 1.5 V 0V 1.5 V 1.5 V 0V tPLH Output Control (low-level enabling) tPLZ 3V 1.5 V tPZH 3V 1.5 V VOL 1.5 V 0V Output Waveform 1 S1 at 6 V (see Note B) tPHL 1.5 V 3V 1.5 V tPZL 3V Output VOLTAGE WAVEFORMS PULSE DURATION th VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Input 1.5 V 1.5 V tsu Data Input 1.5 V Input Output Waveform 2 S1 at 6 V (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V 2.7 V 3V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at 1.5 V. G. tPLZ is measured at VOL + 0.3 V. Figure 3. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D - JUNE 2000 - REVISED DECEMBER 2000 PARAMETER MEASUREMENT INFORMATION VCC = 5 V 0.5 V 500 From Output Under Test S1 9V Open GND CL = 50 pF (see Note A) 500 TEST S1 tPZL (see Note F) 9V tPLZ (see Note G) 9V tPHZ/tPZH 9V LOAD CIRCUIT tw 4.5 V 4.5 V Timing Input VOLTAGE WAVEFORMS PULSE DURATION th 4.5 V 2.5 V 2.5 V 0V 2.5 V Output Control (low-level enabling) 4.5 V 2.5 V 2.5 V 0V tPLH Output Waveform 1 S1 at 11 V (see Note B) tPLZ 4.5 V 2.5 V 4.5 V 2.5 V tPZH tPHL 2.5 V VOL 2.5 V 0V tPZL 4.5 V Output 2.5 V 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Input 2.5 V 2.5 V tsu Data Input Input Output Waveform 2 S1 at 11 V (see Note B) VOL + 0.3 V VOL tPHZ 4.5 V 2.5 V 4.2 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.3 V. Figure 4. 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