5.16 8
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 MILITARY AND COMMERCIAL TEMPERATURE RANGES
(
WEN
) are held LOW then data is written into the Full offset
register on the second LOW-to-HIGH transition of the write
clock (WCLK). The third transition of the write clock (WCLK)
again writes to the Empty offset register.
However, writing all offset registers does not have to occur
at one time. One or two offset registers can be written and then
by bringing the
LD
pin HIGH, the FIFO is returned to normal
read/write operation. When the LD pin is set LOW, and
WEN
is LOW, the next offset register in sequence is written.
When the
LD
pin is LOW and
WEN
is HIGH, the WCLK input
is disabled; then a signal at this input can neither increment the
write offset register pointer, nor execute a write.
The contents of the offset registers can be read on the
output lines when the
LD
pin is set LOW and
REN
is set LOW;
then, data can be read on the LOW-to-HIGH transition of the
read clock (RCLK). The act of reading the control registers
employs a dedicated read offset register pointer. (The read
and write pointers operate independently).
A read and a write should not be performed simultaneously
to the offset registers.First Load (FL)
First Load (
FL
) is grounded to indicate operation in the
Single Device or Width Expansion mode. In the Depth Expan-
sion configuration,
FL
is grounded to indicate it is the first
device loaded and is set to HIGH for all other devices in the
daisy chain. (See Operating Configurations for further de-
tails.)
WRITE EXPANSION INPUT (
WXI
WXI
)
This is a dual purpose pin. Write Expansion In (
WXI
) is
grounded to indicate operation in the Single Device or Width
Expansion mode.
WXI
is connected to Write Expansion Out
(
WXO
) of the previous device in the Depth Expansion or Daisy
Chain mode.
READ EXPANSION INPUT (RXI)
This is a dual purpose pin. Read Expansion In (
RXI
) is
grounded to indicate operation in the Single Device or Width
Expansion mode.
RXI
is connected to Read Expansion Out
(
RXO
) of the previous device in the Depth Expansion or Daisy
Chain mode.
NOTE: 2766 drw 06
1. Any bits of the offset register not being programmed should be set to zero.
EMPTY OFFSET REGISTER
17 11 0
001FH (72205) 003FH (72215):
007FH (72225/72235/72245)
FULL OFFSET REGISTER
17 11 0
001FH (72205) 003FH (72215):
007FH (72225/72235/72245)
DEFAULT VALUE
DEFAULT VALUE
TABLE I — STATUS FLAGS
Number of Words in FIFO
72205 72215 72225 72235 72245
FF
FF PAF
PAF HF
HF PAE
PAE EF
EF
00 0 0 0HHHLL
1 to n(1) 1 to n(1) 1 to n(1) 1 to n(1) 1 to n(1) HH H LH
(n + 1) to 128 (n + 1) to 256 (n + 1) to 512 (n + 1) to 1024 (n + 1) to 2048 H H H H H
129 to (256-(m+1)) 257 to (512-(m+1)) 513 to (1024-(m+1)) 1025 to (2048-(m+1)) 2049 to (4096-(m+1)) H H L H H
(256-m)(2) to 255 (512-m)(2) to 511 (1024-m)(2) to 1023 (2048-m)(2) to 2047 (4096-m)(2) to 4095 H L L H H
256 512 1024 2048 4096 L L L H H
NOTES: 2766 tbl 09
1. n = Empty Offset (Default Values : 72205 n=31, 72215 n = 63, 72225/72235/72245 n = 127)
2. m = Full Offset (Default Values : 72205 n=31, 72215 n = 63, 72225/72235/72245 n = 127)
Figure 3. Offset Register Location and Default Values
EMPTY FLAG (EF)
The Empty Flag (
EF
) will go LOW, inhibiting further read
operations, when the read pointer is equal to the write pointer,
indicating the device is empty.
The
EF
is updated on the LOW-to-HIGH transition the read
clock (RCLK).
PROGRAMMABLE ALMOST-FULL FLAG (
PAF
PAF
)
The Programmable Almost-Full Flag (
PAF
) will go LOW
when FIFO reaches the Almost-Full condition. If no reads are
performed after Reset (
RS
), the
PAF
will go LOW after (256-
OUTPUTS:
FULL FLAG (
FF
FF
)
The Full Flag (
FF
) will go LOW, inhibiting further write
operation, indicating that the device is full. If no reads are
performed after Reset (
RS
), the Full Flag (
FF
) will go LOW
after 256 writes for the IDT72205LB, 512 writes for the
IDT72215LB, 1024 writes for the IDT72225LB, 2048 writes for
the IDT72235LB and 4096 writes for the IDT72245LB.
The Full Flag (
FF
) is updated on the LOW-to-HIGH transi-
tion of the write clock (WCLK).