Data Sheet No. PD60045-O
Typical Connection
Product Summary
VOFFSET 600V max.
IO+/- 130 mA / 270 mA
VOUT 10 - 20V
ton/off (typ.) 680 & 150 ns
Deadtime (typ.) 520 ns
HALF-BRIDGE DRIVER
Features
•Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
•Gate drive supply range from 10 to 20V
•Undervoltage lockout
•3.3V, 5V and 15V logic compatible
•Cross-conduction prevention logic
•Matched propagation delay for both channels
•Internal set deadtime
•High side output in phase with HIN input
•Low side output out of phase with LIN input
•Also available LEAD-FREE
Description
The IR2103(S) are high voltage, high speed power
MOSFET and IGBT drivers with dependent high and low
side referenced output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible with
standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer
stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
www.irf.com 1
VCC VB
VS
HO
LOCOM
HIN
LIN
LIN
HIN
up to 600V
TO
LOAD
VCC
IR2103(S) & (PbF)
(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only .
Please refer to our Application Notes and DesignT ips for proper circuit board layout.
Packages
8-Lead SOIC
IR2103S 8-Lead PDIP
IR2103
IR2103(S) & (PbF)
2www.irf.com
Symbol Definition Min. Max. Units
VBHigh side floating absolute voltage -0.3 625
VSHigh side floating supply offset voltage VB - 25 VB + 0.3
VHO High side floating output voltage VS - 0.3 VB + 0.3
VCC Low side and logic fixed supply voltage -0.3 25
VLO Low side output voltage -0.3 VCC + 0.3
VIN Logic input voltage (HIN & LIN) -0.3 VCC + 0.3
dVs/dt Allowable offset supply voltage transient — 50 V/ns
PDPackage power dissipation @ TA ≤ +25°C (8 Lead PDIP) — 1.0
(8 Lead SOIC) — 0.625
RthJA Thermal resistance, junction to ambient (8 Lead PDIP) — 125
(8 Lead SOIC) — 200
TJJunction temperature — 150
TSStorage temperature -55 150
TLLead temperature (soldering, 10 seconds) — 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
VBHigh side floating supply absolute voltage VS + 10 VS + 20
VSHigh side floating supply offset voltage Note 1 600
VHO High side floating output voltage VSVB
VCC Low side and logic fixed supply voltage 10 20
VLO Low side output voltage 0 VCC
VIN Logic input voltage (HIN & LIN)0V
CC
TAAmbient temperature -40 125
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
°C
V
V
W
°C/W
°C
IR2103(S) & (PbF)
www.irf.com 3
Symbol Definition Min. Typ. Max. Units Test Conditions
VIH Logic “1” (HIN) & Logic “0” (LIN) input voltage 3 — — VCC = 10V to 20V
VIL Logic “0” (HIN) & Logic “1” (LIN) input voltage — — 0.8 VCC = 10V to 20V
VOH High level output voltage, VBIAS - VO— — 100 IO = 0A
VOL Low level output voltage, VO— — 100 IO = 0A
ILK Offset supply leakage current — — 50 VB = VS = 600V
IQBS Quiescent VBS supply current — 30 55 VIN = 0V or 5V
IQCC Quiescent VCC supply current — 150 270 VIN = 0V or 5V
IIN+ Logic “1” input bias current — 3 10 HIN = 5V, LIN = 0V
IIN- Logic “0” input bias current — — 1 HIN = 0V, LIN = 5V
VCCUV+ VCC supply undervoltage positive going 8 8.9 9.8
threshold
VCCUV- VCC supply undervoltage negative going 7.4 8.2 9
threshold
IO+ Output high short circuit pulsed current 130 210 — VO = 0V, VIN = VIH
PW ≤ 10 µs
IO- Output low short circuit pulsed current 270 360 — VO = 15V , VIN = VIL
PW ≤ 10 µs
Symbol Definition Min. Typ. Max. Units Test Conditions
ton T urn-on propagation delay — 680 820 VS = 0V
toff Turn-off propagation delay — 150 220 VS = 600V
trTurn-on rise time — 100 170
tfTurn-off fall time — 50 90
DT Deadtime, LS turn-off to HS turn-on & 400 520 650
HS turn-on to LS turn-off
MT Delay matching, HS & LS turn-on/off — — 60
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
mV
V
ns
V
mA
µA
IR2103(S) & (PbF)
4www.irf.com
Functional Block Diagram
Lead Definitions
Symbol Description
HIN Logic input for high side gate driver output (HO), in phase
Logic input for low side gate driver output (LO), out of phase
VBHigh side floating supply
HO High side gate drive output
VSHigh side floating supply return
VCC Low side and logic fixed supply
LO Low side gate drive output
COM Low side return
LIN
Lead Assignments
8 Lead PDIP 8 Lead SOIC
IR2103 IR2103S
1
2
3
4
8
7
6
5
VCC
HIN
LIN
COM
VB
HO
VS
LO
1
2
3
4
8
7
6
5
VCC
HIN
LIN
COM
VB
HO
VS
LO
VB
HO
VS
VCC
IHN
LIN
DEAD TIME &
SHOOT-THROUGH
PREVENTION
PULSE
GEN
PULSE
FILTER
HV
LEVEL
SHIFT R
S
Q
VCC
LO
COM
UV
DETECT
IR2103(S) & (PbF)
www.irf.com 5
Figure 1. Input/Output Timing Diagram
LIN
HO
LO
HIN
Figure 4. Deadtime Waveform Definitions
HIN
LIN
HO
50% 50%
90%
10%
LO 90%
10%
DT DT
Figure 2. Switching Time Waveform Definitions
HIN
LIN
50% 50%
50% 50%
tr
ton tf
toff
LO
90% 90%
10% 10%
tr
ton tf
toff
HO
90% 90%
10% 10%
IR2103(S) & (PbF)
6www.irf.com
T urn-On Delay T ime (ns)
Figure 6A. Turn-On Time vs T emperature
VBIAS Supply Voltage (V)
Figure 6B. Turn-On Time vs Supply Voltage
Turn-Of f Delay T ime (ns)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
M ax.
Typ.
Turn-Of f Delay T ime (ns)
Temperature (oC)
Figure 7A. Turn-Off Time vs T emperature
VBIAS Supply V oltage (V)
Figure 7B. T urn-Off T ime vs Supply Voltage
0
200
400
600
800
1000
1200
1400
10 12 14 16 18 20
Max.
Typ.
0
100
200
300
400
500
10 12 14 16 18 20
Max.
Typ.
0
200
400
600
800
1000
0 2 4 6 8 101214161820
Turn-On Delay Time (ns
)
Input Voltage ( V)
Max.
Typ.
0
200
400
600
800
1000
1200
1400
-50 -25 0 25 50 75 100 125
M ax.
Typ.
Temperature (oC)
T urn-On Delay T ime (ns)
Figure 6C. Turn-On Time vs Input Voltage
0
200
400
600
800
1000
02468101214161820
Turn-Off Delay Time (ns
In put V oltage (V )
Max.
Typ
Figure 7C. Turn-Off Time vs Input Voltage
IR2103(S) & (PbF)
www.irf.com 7
Figure 10A. Turn Off Fall Time
vs Temperature
T urn-Of f Fall T ime (ns)
T urn-Of f Fall T ime (ns)
Figure 10B. Turn Off Fall Time vs Voltage
Temperature (oC) VBIAS Supply V oltage (V)
Deadtime (ns)
Figure 11B. Deadtime vs Voltage
Deadtime (ns)
Figure 11A. Deadtime vs Temperature
0
50
100
150
200
-50 -25 0 25 50 75 100 125
Max.
Typ.
Temperature (oC)
0
50
100
150
200
10 12 14 16 18 20
M ax.
Typ.
VBIAS Supply Voltage (V)
0
200
400
600
800
1000
1200
1400
10 12 14 16 18 20
Max.
Typ.
Min.
0
200
400
600
800
1000
1200
1400
-50-250 255075100125
Max.
Ty
Min.
p.
T urn-On Rise Time (ns)
Figure 9A. Turn-On Rise Time
vs T emperature
T urn-On Rise Time (ns)
Figure 9B. Turn-On Rise Time
vs V oltage
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Max.
Typ.
Temperature (oC)
0
100
200
300
400
500
10 12 14 16 18 20
M ax.
Typ.
VBIAS Supply Voltage (V)
IR2103(S) & (PbF)
8www.irf.com
Input V oltage (V)
Figure 13B. Logic "0"(HIN) & Logic "1"(LIN)
Input V oltage vs Voltage
Figure 14A. High Level Output
vs T emperature Figure 14B. High Level Output vs Voltage
High Level Output V oltage (V)
High Level Output V oltage (V)
Vcc Supply V oltage (V)
Input V oltage (V)
0
0.8
1.6
2.4
3.2
4
10 12 14 16 18 20
Max.
Vcc Supply V oltage (V)
0
0.8
1.6
2.4
3.2
4
-50 -25 0 25 50 75 100 125
M ax.
Temperature (oC)
0
0.2
0.4
0.6
0.8
1
10 12 14 16 18 20
Max.
Figure 13A. Logic "0"(HIN) & Logic "1"(LIN)
Input Voltage vs T emperature
0
0.2
0.4
0.6
0.8
1
-50 -25 0 25 50 75 100 125
M ax.
Temperature (oC)
Temperature (oC)
Input V oltage (V)
Input V oltage (V)
0
1
2
3
4
5
6
7
8
-50 -25 0 25 50 75 100 125
Min.
Temperature (oC)
Figure12A. Logic "1" (HIN) & Logic "0" (LIN)
Input Voltage vs T emperature Figure 12B. Logic "1" (HIN) & Logic "0" (LIN)
Input Voltage vs Voltage
0
1
2
3
4
5
6
7
8
10 12 14 16 18 20
Min.
Min.
VBIAS Supply Voltage (V)
IR2103(S) & (PbF)
www.irf.com 9
Offset Supply Leakge Current (µA)
0
100
200
300
400
500
0 200 400 600 800
Max.
Figure 16A. Offset Supply Current
vs T emperature Figure 16B. Offset Supply Current vs Voltage
Figure 17A. VBS Supply Current
vs T emperature Figure 17B. VBS Supply Current vs Voltage
Temperature (oC)
Temperature (oC)
VBS Supply Current (µA)
Offset Supply Leakge Current (µA)
VB Boost Voltage (V)
VBS Supply Current (µA)
VBS Floating Supply V oltage (V)
0
30
60
90
120
150
10 12 14 16 18 20
Max.
Typ.
0
30
60
90
120
150
-50-250 255075100125
Max.
Typ.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Max.
Figure 15A. Low Level Output
vs T emperature Figure 15B. Low Level Output vs Voltage
Low Level Output V oltage (V)
Low Level Output V oltage (V)
0
0.2
0.4
0.6
0.8
1
10 12 14 16 18 20
Max.
Vcc Supply V oltage (V)
0
0.2
0.4
0.6
0.8
1
-50 -25 0 25 50 75 100 125
Max.
Temperature (oC)
IR2103(S) & (PbF)
10 www.irf.com
Vcc Supply V oltage (V)
Figure 19A. Logic "1" Input Current
vs T emperature Figure 19B. Logic "1" Input Current
vs V oltage
Figure 20A. Logic "0" Input Current
vs T emperature Figure 20B. Logic "0" Input Current
vs V oltage
Logic “1” Input Current (µA)
Temperature (oC)
Temperature (oC)
Logic “0” Input Current (µA)
Logic “1” Input Current (µA)
Logic “0” Input Current (µA)
0
1
2
3
4
5
10 12 14 16 18 20
Max.
Vcc Supply V oltage (V)
0
5
10
15
20
25
30
-50 -25 0 25 50 75 100 125
Max.
Typ.
Max
0
5
10
15
20
25
30
10 12 14 16 18 20
M ax.
Typ.
0
1
2
3
4
5
-50 -25 0 25 50 75 100 125
Max.
Figure 18A. Vcc Supply Current
vs T emperature Figure 18B. Vcc Supply Current vs Voltage
VCC Supply Current (µA)
VCC Supply Current (µA)
0
100
200
300
400
500
600
700
-50-25 0 25 50 75100125
Max.
Typ.
Temperature (oC)
0
100
200
300
400
500
600
700
10 12 14 16 18 20
M ax.
Typ.
Vcc Supply V oltage (V)
IR2103(S) & (PbF)
www.irf.com 11
Output Source Current (mA)
Figure 22A. Output Source Current vs
Temperature Figure 22B. Output Source Current
vs V oltage
Figure 23A. Output Sink Current
vs T emperature Figure 23B. Output Sink Current
vs V oltage
Temperature (oC) VBIAS Supply Voltage (V)
Output Sink Current (mA)
Output Source Current (mA)
Output Sink Current (mA)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Typ.
Min.
Temperature (oC)
0
100
200
300
400
500
10 12 14 16 18 20
Typ.
Min.
VBIAS Supply Voltage (V)
0
100
200
300
400
500
600
700
10 12 14 16 18 20
Typ.
Min.
0
100
200
300
400
500
600
700
-50-250 255075100125
Typ.
Min.
Figure 21A. Vcc Undervoltage Threshold(+)
vs T emperature Figure 21B. Vcc UndervoltageThreshold (-)
vs T emperature
Temperature (oC)
Temperature (oC)
VCC UVLO Threshold +(V)
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Min.
Max.
Typ.
Typ.
VCC UVLO Threshold -(V)
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Max.
Typ.
Min.
Typ.
IR2103(S) & (PbF)
12 www.irf.com
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
87
5
65
D B
E
A
e
6X
H
0. 25 [. 010] A
6
4312
4 . OUTLINE CONFORMS T O JED EC OUTLINE MS-0 12 A A.
NOTES:
1. DI MENSI ONING & TOLERANCI NG PER ASME Y14.5M-1994.
2 . CONTROLLING DIMENSION: MILL IMET ER
3 . D IMENSIONS ARE SHOW N IN MILLIMET ERS [INCHES].
7
K x 45°
8X L 8X c
y
FOOTPRINT
8X 0.72 [ . 02 8]
6. 46 [ . 2 55]
3X 1.27 [ . 05 0] 8X 1.78 [ . 07 0]
5 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSI ONS NOT TO EXCEED 0.25 [.010].
7 D IMENSION IS T HE L ENGT H OF L EAD FOR SOLDER ING TO
A SUBSTRATE.
MOLD PROTRUSI ONS NOT TO EXCEED 0.15 [.006].
0. 25 [. 010] CAB
e1 A
A1
8X b
C
0. 10 [. 004]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASI C
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX MILLIMETERSINC HE S MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASI C 0.635 BASIC
Case outlines
IR2103(S) & (PbF)
www.irf.com 13
LEADFREE PART MARKING INFORMATION
ORDER INFORMATION
Lead Free Released
Non-Lead Free
Released
Part number
Date code
IRxxxxxx
YWW?
?XXXX
Pin 1
Identifier
IR logo
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
P
?MARKING CODE
Basic Part (Non-Lead Free)
8-Lead PDIP IR2103 order IR2103
8-Lead SOIC IR2103S order IR2103S
Leadfree Part
8-Lead PDIP IR2103 order IR2103PbF
8-Lead SOIC IR2103S order IR2103SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice. 4/2/2004
