NVMFS5826NL Power MOSFET 60 V, 24 mW, 26 A, Single N-Channel Features * * * * * * Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses NVMFS5826NLWF - Wettable Flanks Product AEC-Q101 Qualified and PPAP Capable These are Pb-Free Devices and RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX 24 mW @ 10 V 60 V Symbol Value Unit Drain-to-Source Voltage VDSS 60 V Gate-to-Source Voltage VGS 20 V ID 26 A Continuous Drain Current RYJ-mb (Notes 1, 2, 3, 4) Power Dissipation RYJ-mb (Notes 1, 2, 3) Continuous Drain Current RqJA (Notes 1, 3, 4) Power Dissipation RqJA (Notes 1 & 3) Pulsed Drain Current Tmb = 25C Steady State Tmb = 100C Tmb = 25C 19 PD 39 ID 8.0 Tmb = 100C TA = 25C Steady State TA = 25C Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 24 V, VGS = 10 V, IL(pk) = 20 A, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s) G (4) W S (1,2,3) A PD 1.8 IDM 130 A TJ, Tstg -55 to + 175 C IS 32 A EAS 20 mJ TL 260 C THERMAL RESISTANCE MAXIMUM RATINGS Junction-to-Mounting Board (top) - Steady State (Notes 2, 3) Junction-to-Ambient - Steady State (Note 3) MARKING DIAGRAM W 3.6 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Parameter N-CHANNEL MOSFET 6.0 TA = 100C TA = 25C, tp = 10 ms D (5,6) 19 TA = 100C 26 A 32 mW @ 4.5 V MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Parameter ID MAX Symbol Value Unit RYJ-mb 3.9 C/W RqJA 42 1 DFN5 (SO-8FL) CASE 488AA STYLE 1 A Y W ZZ D S S S G D XXXXXX AYWZZ D D = Assembly Location = Year = Work Week = Lot Traceability ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51-12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface-mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. (c) Semiconductor Components Industries, LLC, 2013 May, 2013 - Rev. 3 1 Publication Order Number: NVMFS5826NL/D NVMFS5826NL ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = 250 mA 60 Typ Max Unit OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Zero Gate Voltage Drain Current IDSS Gate-to-Source Leakage Current VGS = 0 V, VDS = 60 V V TJ = 25C 1.0 TJ = 125C 10 mA IGSS VDS = 0 V, VGS = 20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA 2.5 V Drain-to-Source On Resistance RDS(on) VGS = 10 V, ID = 10 A 18 24 mW VGS = 4.5 V, ID = 10 A 24 32 gFS VDS = 15 V, ID = 5 A 8.0 S Input Capacitance Ciss 850 pF Output Capacitance Coss VGS = 0 V, f = 1 MHz, VDS = 25 V 100 nA ON CHARACTERISTICS (Note 5) Forward Transconductance 1.5 CHARGES AND CAPACITANCES Reverse Transfer Capacitance Total Gate Charge Crss 50 QG(TOT) 9.1 Threshold Gate Charge QG(TH) Gate-to-Source Charge QGS Gate-to-Drain Charge QGD Total Gate Charge 85 QG(TOT) VGS = 4.5 V, VDS = 48 V, ID = 10 A 1.0 nC 3.0 4.0 VGS = 10 V, VDS = 48 V, ID = 10 A 17 nC SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) 9.0 VGS = 4.5 V, VDS = 48 V, ID = 10 A, RG = 2.5 W tf 32 ns 15 24 DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25C 0.8 TJ = 125C 0.7 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 10 A 1.2 V 15 VGS = 0 V, dIs/dt = 100 A/ms, IS = 10 A QRR 11 4.0 11 5. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns nC NVMFS5826NL TYPICAL CHARACTERISTICS VDS 10 V 4.5 V ID, DRAIN CURRENT (A) 4.0 V 40 30 3.5 V 20 10 30 20 0 1 2 3 4 TJ = 125C 0 5 2 1 TJ = -55C 3 4 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.050 ID = 10 A TJ = 25C 0.040 0.030 0.020 0.010 2 4 6 8 0.040 TJ = 25C 0.030 VGS = 4.5 V 0.020 0.010 10 VGS, GATE-TO-SOURCE VOLTAGE (V) VGS = 10 V 5 10 10000 VGS = 10 V ID = 10 A 1.8 1.6 1.4 1.2 1.0 20 25 30 35 40 45 Figure 4. On-Resistance vs. Drain Current and Gate Voltage 2.4 2.0 15 ID, DRAIN CURRENT (A) Figure 3. On-Resistance vs. Gate-to-Source Voltage 2.2 TJ = 25C 10 VGS = 3.0 V RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 10 V 50 0 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 40 TJ = 25C IDSS, LEAKAGE (nA) ID, DRAIN CURRENT (A) 60 VGS = 0 V TJ = 150C 1000 TJ = 125C 0.8 0.6 -50 -25 0 25 50 75 100 125 150 175 100 10 20 30 40 50 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage http://onsemi.com 3 60 NVMFS5826NL TYPICAL CHARACTERISTICS C, CAPACITANCE (pF) VGS = 0 V TJ = 25C Ciss 1000 VGS, GATE-TO-SOURCE VOLTAGE (V) 1200 800 600 400 Coss 200 0 Crss 0 10 20 30 40 50 60 td(off) td(on) VDD = 48 V VGS = 4.5 V ID = 10 A 1 10 2 0.1 0.1 VDS = 48 A ID = 10 A TJ = 25C 0 0 50 2 4 6 8 12 10 14 16 VGS = 0 V TJ = 25C 30 20 10 0 0.5 0.6 0.8 0.7 0.9 RG, GATE RESISTANCE (W) VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 ms 1 ms 10 ms EAS, SINGLE PULSE DRAIN-TO- SOURCE AVALANCHE ENERGY (mJ) VGS = 10 V Single Pulse TC = 25C 10 ms RDS(on) Limit Thermal Limit Package Limit dc 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 100 1.0 20 ID = 20 A 15 10 5 0 25 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 18 40 100 10 1 Qgd Qg, TOTAL GATE CHARGE (nC) tr tf 100 Qgs 4 Figure 8. Gate-to-Source Voltage vs. Total Charge IS, SOURCE CURRENT (A) t, TIME (ns) 6 Figure 7. Capacitance Variation 1000 ID, DRAIN CURRENT (A) 8 60 10 QT VDS, DRAIN-TO-SOURCE VOLTAGE (V) 100 1.0 10 175 NVMFS5826NL TYPICAL CHARACTERISTICS RqJA(t) (C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE 100 Duty Cycle = 0.5 10 0.2 0.1 0.05 1 0.02 0.01 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Response DEVICE ORDERING INFORMATION Marking Package Shipping NVMFS5826NLT1G V5826L DFN5 (Pb-Free) 1500 / Tape & Reel NVMFS5826NLWFT1G 5826LW DFN5 (Pb-Free) 1500 / Tape & Reel NVMFS5826NLT3G V5826L DFN5 (Pb-Free) 5000 / Tape & Reel NVMFS5826NLWFT3G 5826LW DFN5 (Pb-Free) 5000 / Tape & Reel Device For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NVMFS5826NL PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO-8FL) CASE 488AA ISSUE H 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D 2 A B D1 2X 0.20 C 4X E1 2 1 2 3 DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q q E c A1 4 TOP VIEW C 3X e 0.10 C SEATING PLANE DETAIL A A 0.10 C SIDE VIEW 8X C A B 0.05 c 4X e/2 1 0.965 4 K G 4X 0.750 1.000 L PIN 5 (EXPOSED PAD) 3X 1.270 b 0.10 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN SOLDERING FOOTPRINT* DETAIL A MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.70 4.90 5.10 3.80 4.00 4.20 6.15 BSC 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.61 0.71 1.20 1.35 1.50 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _ 1.330 2X 0.905 2X E2 L1 M 0.495 4.530 3.200 0.475 D2 2X 1.530 BOTTOM VIEW 4.560 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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