NC7SZ19 TinyLogic UHS 1-of-2 Decoder / Demultiplexer Description The NC7SZ19 is a 1-of-2 decoder with a common output enable. The device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive while maintaining low static power dissipation over a broad VCC operating range. The device is specified to operate over the 1.65 V to 5.5 V VCC range. The inputs and outputs are high impedance when VCC is 0 V. Inputs tolerate voltages up to 5.5 V independent of VCC operating voltage. www.onsemi.com MARKING DIAGRAMS SIP6 1.45x1.0 CASE 127EB Features * * * * * * * Ultra High-Speed: tPD 2.7 ns Typical at 5 V VCC Broad VCC Operating Range: 1.65 V to 5.55 V Power Down High Impednce Inputs / Outputs Over-Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation Proprietary Noise / EMI Reduction Circuitry Ultra-Small MicroPakTM Packages These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant B4KK XYZ Pin 1 UDFN6 1.0X1.0, 0.35P CASE 517DP B4KK XYZ Pin 1 SC-88 (SC-70 6 Lead) 1.25x2 CASE 419AD-01 B4, Z19 KK XY Z T Z19T = Specific Device Code = 2-Digit Lot Run Traceability Code = 2-Digit Date Code Format = Assembly Plant Code = Year Coding Scheme = Plant Code Identifier = Die Run Code = Eight-Week Datacoding Scheme ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. (c) Semiconductor Components Industries, LLC, 1999 July, 2019 - Rev. 2 1 Publication Order Number: NC7SZ19/D NC7SZ19 Pin Configurations A 1 6 Y0 GND 2 5 VCC E 3 4 Y1 A 1 GND 2 5 VCC E 3 Figure 1. SC70 (Top View) (Top View) 6 Y0 4 Y1 Figure 2. MicroPak (Top Through View) AAA Pin One NOTES: 1. AAA represents product code top mark (see Ordering Information). 2. Orientation of top mark determines pin one location. 3. Reading the top mark left to right, pin one is the lower left pin. Figure 3. Pin 1 Orientation PIN DEFINITIONS FUNCTION TABLE Pin # SC70 Pin # MicroPak Name 1 1 A Description Inputs Decoder Address / Demultiplexer Select 2 2 GND Ground 3 3 /E Decoder Output Enable / Demultiplexer Data 4 4 Y1 Output 5 5 VCC 6 6 Y0 A /E Y0 = A + /E Y1 = /A + /E L L L H H L H L X H H H H = HIGH Logic Level L = LOW Logic Level X = 3-STATE Supply Voltage Output www.onsemi.com 2 Output NC7SZ19 ABSOLUTE MAXIMUM RATINGS Symbol Min Max Unit VCC Supply Voltage -0.5 6.5 V VIN DC Input Voltage -0.5 6.5 V DC Output Voltage -0.5 6.5 V VOUT Parameter IIK DC Input Diode Current VIN < 0.5 V - -50 mA IOK DC Output Diode Current VOUT < -0.5 V - -50 mA IOUT DC Output Current - 50 mA DC VCC or Ground Current - 100 mA -65 +150 C ICC or IGND TSTG Storage Temperature Range TJ Junction Temperature Under Bias - +150 C TL Junction Lead Temperature (Soldering, 10 Seconds) - +260 C PD Power Dissipation at +85C SC70-6 - 190 mW MicroPak-6 - 327 MicroPak2TM-6 - 327 Human Body Model, JEDEC: JESD22-A114 - 4000 Charge Device Model, JEDEC: JESD22-C101 - 2000 ESD V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VOUT tr, tf Parameter Conditions Min Max Unit Supply Voltage Operating 1.65 5.50 V Supply Voltage Data Retention 1.5 5.5 0 5.5 Input Voltage Output Voltage Input Rise and Fall Times TA Operating Temperature qJA Thermal Resistance V 0 VCC V VCC at 1.8 V 0.15 V, 2.5 V 0.2 V 0 20 ns/V VCC at 3.3 V 0.3 V 0 10 VCC at 5.0 V 0.5 V 0 5 -40 +85 C SC70-6 - 659 C/W MicroPak-6 - 382 MicroPak2-6 - 382 C/W Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 3 NC7SZ19 DC ELECTICAL CHARACTERISTICS TA = +25C Symbol VIH VIL VOH Typ Max Min Max Unit 1.65 0.65 VCC - - 0.65 VCC - V 2.30 to 5.50 0.70 VCC - - 0.70 VCC - 1.65 - - 0.35 VCC - 0.35 VCC 2.30 to 5.50 - - 0.30 VCC - 0.30 VCC 1.55 1.65 - 1.55 - 2.20 2.30 - 2.20 - 3.00 2.90 3.00 - 2.90 - 4.50 4.40 4.50 - 4.40 - Parameter VCC (V) HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage Conditions VIN = VIH, or VOL, IOH = -100 mA 1.65 2.30 VOL LOW Level Output Voltage 1.65 IOH = -4 mA 1.29 1.52 - 1.29 - 2.30 IOH = -8 mA 1.90 2.15 - 1.90 - 3.00 IOH = -16 mA 2.40 2.80 - 2.40 - 3.00 IOH = -24 mA 2.30 3.68 - 2.30 - 4.50 IOH = -32 mA 3.80 4.20 - 3.80 - 1.65 VIN = VIL, or VIH, IOL = 100 mA - 0.00 0.10 - 0.10 - 0.00 0.10 - 0.10 - 0.00 0.10 - 0.10 2.30 3.00 4.50 IIN Input Leakage Current IOFF Power Off Leakage Current ICC Quiescent Supply Current TA = -40 to +85C Min V V V - 0.00 0.10 - 0.10 1.65 IOL = 4 mA - 0.08 0.24 - 0.24 2.30 IOL = 8 mA - 0.10 0.30 - 0.30 3.00 IOL = 16 mA - 0.15 0.40 - 0.40 3.00 IOL = 24 mA - 0.22 0.55 - 0.55 4.50 IOL = 32 mA - 0.22 0.55 - 0.55 VIN = 5.5 V, GND - - 0.1 - 1.0 mA VIN or VOUT = 5.5 V - - 1 - 10 mA VIN = 5.5 V, GND - - 1 - 10 mA 1.65 to 5.5 0 1.65 to 5.50 AC ELECTRICAL CHARACTERISTICS TA = +25C Symbol Parameter tPLH, tPHL Propagation Delay A or /E to Output (Figure 5, 6) VCC (V) 1.80 0.15 2.50 0.20 CPD Power Dissipation Capacitance (Note 4) (Figure 5) Typ Max Min Max Unit - 5.9 10.5 - 11.0 ns - 3.5 6.0 - 6.4 - 2.7 4.1 - 4.5 5.00 0.50 - 2.1 3.2 - 3.5 - 3.2 5.1 - 5.4 - 2.7 4.0 - 4.3 0 - 2.3 - - - pF 3.30 - 10.5 - - - pF 5.00 - 12.8 - - - 5.00 0.50 Input Capacitance Min 3.30 0.30 3.30 0.30 CIN Conditions CL = 15 pF, RL = 1 MW TA = -40 to +85C CL = 50 pF, RL = 500 W ns 4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD) (VCC) (fIN) + (ICCstatic). www.onsemi.com 4 NC7SZ19 AC Loading and Waveforms VCC INPUT OUTPUT CL RL tr = 3 ns NOTES: 5. CL includes load and stray capacitance. 6. Input PRR = 1.0 MHz, tW = 500 ns. tf = 3 ns 90% 50% INPUT Figure 4. AC Test Circuit 90% 10% VCC VCC 50% 10% tW tPHL GND tPLH VOH A INPUT A 50% 50% Out of Phase OUTPUT VOL OUTPUT tPLH NOTE: 7. Input = AC Waveform; tr = tf = 1.8 ns. 8. PRR = 10 MHz; Duty Cycle = 50%. 9. /E Input = GND. In Phase OUTPUT tPHL 50% VOH 50% VOL Figure 5. ICCD Test Circuit Figure 6. AC Waveforms ORDERING INFORMATION Top Mark Packages Shipping NC7SZ19P6X Z19 6-Lead SC70, EIAJ SC88, 1.25 mm Wide 3000 / Tape & Reel NC7SZ19L6X B4 6-Lead MicroPak, 1.00 mm Wide 5000 / Tape & Reel NC7SZ19FHX B4 6-Lead, MicroPak2, 1x1 mm Body, .35 mm Pitch 5000 / Tape & Reel Device For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MicroPak and MicroPak2 are trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SIP6 1.45X1.0 CASE 127EB ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13590G SIP6 1.45X1.0 DATE 31 AUG 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. (c) Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC-88/SC70-6/SOT-363 CASE 419B-02 ISSUE Y 1 SCALE 2:1 DATE 11 DEC 2012 2X aaa H D D H A D 6 5 GAGE PLANE 4 1 2 L L2 E1 E DETAIL A 3 aaa C 2X bbb H D 2X 3 TIPS e B 6X b ddd TOP VIEW C A-B D M A2 DETAIL A A 6X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END. 4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP. 7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. ccc C A1 SIDE VIEW C SEATING PLANE END VIEW c RECOMMENDED SOLDERING FOOTPRINT* 6X DIM A A1 A2 b C D E E1 e L L2 aaa bbb ccc ddd MILLIMETERS MIN NOM MAX --- --- 1.10 0.00 --- 0.10 0.70 0.90 1.00 0.15 0.20 0.25 0.08 0.15 0.22 1.80 2.00 2.20 2.00 2.10 2.20 1.15 1.25 1.35 0.65 BSC 0.26 0.36 0.46 0.15 BSC 0.15 0.30 0.10 0.10 GENERIC MARKING DIAGRAM* 6 XXXMG G 6X 0.30 INCHES NOM MAX --- 0.043 --- 0.004 0.035 0.039 0.008 0.010 0.006 0.009 0.078 0.086 0.082 0.086 0.049 0.053 0.026 BSC 0.010 0.014 0.018 0.006 BSC 0.006 0.012 0.004 0.004 MIN --- 0.000 0.027 0.006 0.003 0.070 0.078 0.045 0.66 1 2.50 0.65 PITCH XXX = Specific Device Code M = Date Code* G = Pb-Free Package (Note: Microdot may be in either location) DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *Date Code orientation and/or position may vary depending upon manufacturing location. *This information is generic. Please refer to device data sheet for actual part marking. Pb-Free indicator, "G" or microdot "G", may or may not be present. Some products may not follow the Generic Marking. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC-88/SC70-6/SOT-363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. (c) Semiconductor Components Industries, LLC, 2019 www.onsemi.com SC-88/SC70-6/SOT-363 CASE 419B-02 ISSUE Y DATE 11 DEC 2012 STYLE 1: PIN 1. EMITTER 2 2. BASE 2 3. COLLECTOR 1 4. EMITTER 1 5. BASE 1 6. COLLECTOR 2 STYLE 2: CANCELLED STYLE 3: CANCELLED STYLE 4: PIN 1. CATHODE 2. CATHODE 3. COLLECTOR 4. EMITTER 5. BASE 6. ANODE STYLE 5: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 6: PIN 1. ANODE 2 2. N/C 3. CATHODE 1 4. ANODE 1 5. N/C 6. CATHODE 2 STYLE 7: PIN 1. SOURCE 2 2. DRAIN 2 3. GATE 1 4. SOURCE 1 5. DRAIN 1 6. GATE 2 STYLE 8: CANCELLED STYLE 9: PIN 1. EMITTER 2 2. EMITTER 1 3. COLLECTOR 1 4. BASE 1 5. BASE 2 6. COLLECTOR 2 STYLE 10: PIN 1. SOURCE 2 2. SOURCE 1 3. GATE 1 4. DRAIN 1 5. DRAIN 2 6. GATE 2 STYLE 11: PIN 1. CATHODE 2 2. CATHODE 2 3. ANODE 1 4. CATHODE 1 5. CATHODE 1 6. ANODE 2 STYLE 12: PIN 1. ANODE 2 2. ANODE 2 3. CATHODE 1 4. ANODE 1 5. ANODE 1 6. CATHODE 2 STYLE 13: PIN 1. ANODE 2. N/C 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 14: PIN 1. VREF 2. GND 3. GND 4. IOUT 5. VEN 6. VCC STYLE 15: PIN 1. ANODE 1 2. ANODE 2 3. ANODE 3 4. CATHODE 3 5. CATHODE 2 6. CATHODE 1 STYLE 16: PIN 1. BASE 1 2. EMITTER 2 3. COLLECTOR 2 4. BASE 2 5. EMITTER 1 6. COLLECTOR 1 STYLE 17: PIN 1. BASE 1 2. EMITTER 1 3. COLLECTOR 2 4. BASE 2 5. EMITTER 2 6. COLLECTOR 1 STYLE 18: PIN 1. VIN1 2. VCC 3. VOUT2 4. VIN2 5. GND 6. VOUT1 STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF STYLE 20: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR STYLE 21: PIN 1. ANODE 1 2. N/C 3. ANODE 2 4. CATHODE 2 5. N/C 6. CATHODE 1 STYLE 22: PIN 1. D1 (i) 2. GND 3. D2 (i) 4. D2 (c) 5. VBUS 6. D1 (c) STYLE 23: PIN 1. Vn 2. CH1 3. Vp 4. N/C 5. CH2 6. N/C STYLE 24: PIN 1. CATHODE 2. ANODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE STYLE 25: PIN 1. BASE 1 2. CATHODE 3. COLLECTOR 2 4. BASE 2 5. EMITTER 6. COLLECTOR 1 STYLE 26: PIN 1. SOURCE 1 2. GATE 1 3. DRAIN 2 4. SOURCE 2 5. GATE 2 6. DRAIN 1 STYLE 27: PIN 1. BASE 2 2. BASE 1 3. COLLECTOR 1 4. EMITTER 1 5. EMITTER 2 6. COLLECTOR 2 STYLE 28: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN STYLE 29: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE/ANODE 6. CATHODE STYLE 30: PIN 1. SOURCE 1 2. DRAIN 2 3. DRAIN 2 4. SOURCE 2 5. GATE 1 6. DRAIN 1 Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC-88/SC70-6/SOT-363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. (c) Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS UDFN6 1.0X1.0, 0.35P CASE 517DP ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13593G UDFN6 1.0X1.0, 0.35P DATE 31 AUG 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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