DATA SH EET
Product specification
Supersedes data of 2002 Jun 17 2002 Oct 02
DISCRETE SEMICONDUCTORS
BLA1011-10
Avionics LDMOS transistor
M3D381
2002 Oct 02 2
Philips Semiconductors Product specification
Avionics LDMOS transistor BLA1011-10
FEATURES
High power gain
Easy power control
Excellent ruggedness
Source on mounting base eliminates DC isolators,
reducing common mode inductance.
APPLICATIONS
Avionics transmitter applications in the
1030 to 1090 MHz frequency range.
DESCRIPTION
Silicon N-channel enhancement mode lateral D-MOS
transistor encapsulated in a 2-lead flange package
(SOT467C) with a ceramic cap. The common source is
connected to the flange.
PINNING - SOT467C
PIN DESCRIPTION
1 drain
2 gate
3 source, connected to flange
1
3
2
Top view
MBK584
Fig.1 Simplified outline (SOT467C).
QUICK REFERENCE DATA
RF performance at Th=25°C in a common source test circuit.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
MODE OF OPERATION f
(MHz) VDS
(V) PL
(W) Gp
(dB) ηD
(%)
Pulsed class-AB;
tp=50µs; δ=2% 1030 to 1090 36 10 >15 >40
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS drain-source voltage 75 V
VGS gate-source voltage −±15 V
IDdrain current (DC) 2.2 A
Ptot total power dissipation Th25 °C25 W
Tstg storage temperature 65 +150 °C
Tjjunction temperature 200 °C
2002 Oct 02 3
Philips Semiconductors Product specification
Avionics LDMOS transistor BLA1011-10
THERMAL CHARACTERISTICS
Notes
1. Thermal impedance is determined under RF operating conditions with pulsed bias.
2. Typical value for SOT467C mounted with thermal compound and 0.6 Nm fastening torque.
CHARACTERISTICS
Tj=25°C unless otherwise specified.
APPLICATION INFORMATION
RF performance in a common source class-AB circuit. Th=25°C; Rth mb-h = 0.55 K/W unless otherwise specified.
Ruggedness in class-AB operation
The BLA1011-10 is capable of withstanding a load mismatch corresponding to VSWR =5:1 through all phases under
the operating conditions.
Typical impedance values
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Zth j-mb thermal impedance from junction to mounting base Tmb =25°C; note 1 1.2 K/W
Rth mb-h thermal resistance from mounting base to heatsink note 2 0.55 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V(BR)DSS drain-source breakdown voltage VGS = 0; ID= 0.7 mA 75 −−V
V
GSth gate-source threshold voltage VDS =10V; I
D=20mA 4 5V
I
DSS drain-source leakage current VGS = 0; VDS =28V −−0.1 mA
IDSX on-state drain current VGS =V
GSth +9V; V
DS = 10 V 2.8 −−A
I
GSS gate leakage current VGS =±15 V; VDS =0 −−40 nA
gfs forward transconductance VDS =10V; I
D= 0.75 A 0.5 S
RDSon drain-source on-state resistance VGS = 10 V; ID= 0.75 A 1.2 −Ω
MODE OF
OPERATION f
(MHz) VDS
(V) IDQ
(mA) PL
(W) Gp
(dB) ηD
(%) tr
(ns) tf
(ns) PULSE DROOP
(dB)
Pulsed class-AB;
tp=50µs; δ=2% 1030 to 1090 36 50 10 >15 >40 <20 <20 <0.5
FREQUENCY
(MHz) ZS
()ZL
()
1030 1 + j 10.6 4.3 + j 7
1060 1.3 + j 6.99 5.99 + j 13.98
1090 1.42+j7 7+j11.58
2002 Oct 02 4
Philips Semiconductors Product specification
Avionics LDMOS transistor BLA1011-10
handbook, halfpage
00 50 150
15
5
10
100
PL
(W)
PD (mW)
MGU494
(3)
(1) (2)
Fig.2 Load power as a function of drive power;
typical values.
Th=25°C; VDS = 36 V; IDQ = 50 mA; class-AB;
tp=50µs; δ= 2%.
(1) f = 1090 MHz.
(2) f = 1060 MHz.
(3) f = 1030 MHz.
handbook, halfpage
05
G
p
(dB) ηD
(%)
15
24
0
8
16
20
4
12
60
0
20
40
50
10
30
10 PL (W)
MGU493
ηD
Gp
(3)
(2)
(1)
Fig.3 Power gain and efficiency as functions of
load power; typical values.
Th=25°C; VDS = 36 V; IDQ = 50 mA; class-AB;
tp=50µs; δ= 2%.
(1) f = 1090 MHz.
(2) f = 1060 MHz.
(3) f = 1030 MHz.
handbook, halfpage
1000 1040 1080
Gp
(dB)
f (MHz) 1120
24
0
8
16
20
4
12
MGU495
Fig.4 Power gain as a function of frequency;
typical values.
Th=25°C; VDS = 36 V; IDQ = 50 mA; class-AB;
PL= 10 W; tp=50µs; δ= 2%.
handbook, halfpage
0
12
8
4
01523
P
L
(W)
4VGS (V)
MGU496
Fig.5 Load power as a function of gate-source
voltage; typical values.
Th=25°C; VDS = 36 V; IDQ = 50 mA; class-AB;
f = 1090 MHz; tp=50µs; δ= 2%.
2002 Oct 02 5
Philips Semiconductors Product specification
Avionics LDMOS transistor BLA1011-10
handbook, full pagewidth
MGU497
C1 C2 C3 C4 C5
C6C7
C8
C9
C10
C11
C12
C13
C14
C15 60
51.75 51.75
R1
37.5 9.3
6.0
3.2 3.5
13.5
Dimensions in mm.
ThecomponentsaresituatedononesideoftheRogers 6010 printed-circuit board (thickness = 0.64 mm; εr= 6.2), the other side is unetched
and serves as a ground plane. Earth connections from the component side to the ground plane are made by through-metallization.
Fig.6 Printed-circuit board for class-AB test circuit.
List of components for class-AB test circuit (see Fig.6)
Notes
1. American Technical Ceramics type 100A or capacitor of same quality.
2. American Technical Ceramics type 200B or capacitor of same quality.
COMPONENT DESCRIPTION VALUE
C1 multilayer ceramic chip capacitor; note 1 2.7 pF
C2, C11 multilayer ceramic chip capacitor; note 1 56 pF
C3 tekelec trimmer; type 37293 0.8 to 8 pF
C4 multilayer ceramic chip capacitor; note 1 3.6 pF
C5 multilayer ceramic chip capacitor; note 1 6.2 pF
C6 multilayer ceramic chip capacitor; note 1 2 pF
C7, C13 multilayer ceramic chip capacitor; note 1 62 pF
C8 multilayer ceramic chip capacitor; note 1 11 pF
C9 multilayer ceramic chip capacitor; note 1 1.5 pF
C10 multilayer ceramic chip capacitor; note 1 6.2 pF
C12 multilayer ceramic chip capacitor; note 2 20 nF
C14 electrolytic capacitor 4.7 µF; 50 V
C15 multilayer ceramic chip capacitor; note 1 36 pF
R1 SMD resistor (0805) 22
2002 Oct 02 6
Philips Semiconductors Product specification
Avionics LDMOS transistor BLA1011-10
PACKAGE OUTLINE
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT467C 99-12-06
99-12-28
0 5 10 mm
scale
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads
0.15
0.10
5.59
5.33 9.25
9.04 1.65
1.40 18.54
17.02
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
3.43
3.18
4.67
3.94 2.21
1.96
D
D1
U1
1
3
2
A
U2E
E1
p
b
H
Q
F
c
UNIT Q
cD
9.27
9.02
D1
5.92
5.77
E
5.97
5.72
E1FH p q
mm
0.184
0.155
inch
b
14.27 20.45
20.19
U2
U1
5.97
5.72 0.25
w1
0.51
0.006
0.004
0.220
0.210 0.364
0.356 0.065
0.055 0.73
0.67 0.135
0.125 0.087
0.077
0.365
0.355 0.233
0.227 0.235
0.225 0.562 0.805
0.795 0.235
0.225 0.010 0.020
w2
A
M M
C
C
Aw1
w2
AB
M M M
q
B
SOT467C
2002 Oct 02 7
Philips Semiconductors Product specification
Avionics LDMOS transistor BLA1011-10
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL DATASHEET
STATUS(1) PRODUCT
STATUS(2)(3) DEFINITION
I Objective
data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary
data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips Semiconductors
reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order to
improve the design, manufacturing and supply. Relevant changes will be
communicated via a Customer Product/Process Change Notification (CPCN).
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratany other conditionsabovethosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationor warrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
© Koninklijke Philips Electronics N.V. 2002 SCA74
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Contact information
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Printed in The Netherlands 613524/04/pp8 Date of release: 2002 Oct 02 Document order number: 9397 750 10252