DDU222F 5TAP, TTLINTERFACED FIXED DELAY LINE (SERIES DDU222F) data (y delay VY device Ss inc. FEATURES Five equally spaced outputs Very narrow device (SIP package) Stackable for PC board economy Input & outputs fully TTL interfaced & buffered 10 T*L fan-out capability PACKAGES e345 6/7 8 TUNA TOPORINATE Vc IN T1 T2 T3 T4 TS GND DDU222F-xx Gommercial DDU222F-xxM = Military FUNCTIONAL DESCRIPTION The DDU222Fseries device is a 5-lap digitally butfered delay line. The signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an amount given by the device dash number. For dash numbers less than 25, the total delay of the line is measured from T1 to T5, with the nominal value given by the dash number. The nominal tapto-tap delay increment PIN DESCRIPTIONS IN Signal Input Ti-T5 Tap Outputs VCG +5 Volts GND Ground is given by 1/4 of this number. The inherent delay from IN to T1 is nominally 3.5ns. For dash numbers greater than or equal to 25, the total delay of the line is measured from IN to T5, with the nominal value given by the dash number. The nominal taptotap delay increment is given by 1/5 of this number. SERIES SPECIFICATIONS Minimum input pulse width: 40% of total delay Output rise time: 2ns typical Supply voltage: 5VDC +5% Supply current: = Iec. = 32ma typical lecu = 7ma typical Operating temperature: 0 to 70 C Temp. coefficient of total delay: 100 PPM/C vcc IN T1 T2 T3 T4 TS GND vcc IN T1 T2 T3 T4 T5 GND Functional diagram for dash numbers >= 25 1997 Data Delay Devices DASH NUMBER SPECIFICATIONS Part Total Delay Per Number Delay (ns) Tap (ns) DDU222F-4 4+1.0* 1040.5 DDU222F-6 6+1.0* 1540.5 DDU222F-8 8+2.0* 2.0+1.0 DDU222F-10 10+2.0* 2541.0 DDBU222F-12 124+2.0* 3.04+1.0 DDBU222F-16 16+2.0* 4041.5 DDBU222F-25 2523.0 5.0+2.0 DDU222F-30 3023.0 6022.0 DDU222F-35 3523.0 7.0220 DDBU222F40 40+3.0 8042.0 DDBU222F-45 45+ 3.0 9.0+3.0 DDU222F-50 50+3.0 10.0+3.0 DDU222F-60 60+3.0 12.0+3.0 DDU222F-75 75+4.0 15.0+3.0 DDU222F-100 100+ 5.0 20.0+3.0 DDU222F-125 1254+ 65 25.0+3.0 DDU222F-150 150+ 7.5 30.0+3.0 DDU222F-175 175+ 8.0 35.0+4.0 DDU222F-200 200+ 10.0 40.0+4.0 DDU222F-250 250+12.5 50.0+5.0 * Total delay is referenced to first tap output Input to first tap = 3.5ns + 1ns NOTE: Any dash number between 4 and 250 not shown is also available. Doc #97011 DATA DELAY DEVICES, INC. 1/27/97 3 Mt. Prospect Ave. Clifton, NJ 07013DDU222F APPLICATION NOTES HIGH FREQUENCY RESPONSE The DDU22?F tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 40% of the total delay and periods as small as 80% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data Delay Devices if your application requires device testing at a specific input condition. POWER SUPPLY BYPASSING The DDU22?F relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VCC to GND, located as close as possible to the VCC pin, is recommended. A wide VCC trace and a clean ground plane should be used. DEVICE SPECIFICATIONS TABLE 1: ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN MAX UNITS | NOTES DC Supply Voltage Voc 0.3 7.0 Vv Input Pin Voltage Vin 0.3 Vpp+0.3 V Storage Temperature Tstre 55 150 CG Lead Temperature TLEAD 300 CG 10 sec TABLE 2: DC ELECTRICAL CHARACTERISTICS (OC to 70C, 4.75V to 5.25V) PARAMETER SYMBOL MIN TYP MAX | UNITS NOTES High Level Output Voltage Vou 2.5 3.4 Vv Vee = MIN, lou = MAX Vin = MIN, Vit = MAX Low Level Output Voltage Vo 0.35 0.5 Vv Vee = MIN, lo. = MAX Vin = MIN, Vy = MAX High Level Output Current lou 1.0 mA Low Level Output Current lo. 20.0 mA High Level Input Voltage Vin 2.0 V Low Level Input Voltage Vit 0.8 V Input Clamp Voltage Vik -1.2 Vv Vee = MIN, | = Ik Input Current at Maximum lia 0.1 mA Voc = MAX, V| = 7.0V Input Voltage High Level Input Current lia 20 LA Voce = MAX, V, = 2.7V Low Level Input Current lip -0.6 mA Voce = MAX, V, = 0.5V Shortcircuit Output Current los 60 150 mA Voo = MAX Output High Fanout 25 Unit Output Low Fan-out 12.5 Load Doc #97011 DATA DELAY DEVICES, INC. 2 1/27/97 Tel: 201-773-2299 Fax: 201-773-9672 http://Wwww.datadelay.comDDU222F PACKAGE DIMENSIONS Se ee ee en ee ee ee! 200 e 2 3 ' MAX. 45 67 8: | 800 max. __4| 020 F TYP, 800 i MAX. fe FUT Te 2 MIN. ll 020 TYP. e oto 700 TYP TYP. DDU222F-xx (Commercial) Saw ee en en ca ee en oe! 200 oe: 2 3 ' MAX, 45 67 8: |.200 max. __1 005 375 MIN. MAX. F Jd | f.. ee ; +.030 Fe 018 TYP. 100 010 .700 TYP. TYP. TYP. DDU222F-xxM (Military) Doc #97011 DATA DELAY DEVICES, INC. 3 1/27/97 3 Mt. Prospect Ave. Clifton, NJ 07013DDU222F DELAY LINE AUTOMATED TESTING TEST CONDITIONS INPUT: OUTPUT: Ambient Temperature: 25C + 3C Load: 1 FAST-TTL Gate Supply Voltage (Vcc): 5.0V+0.1V Cioaa: 5pf + 10% Input Pulse: High = 3.0V+0.1V Threshold: 1.5V (Rising & Falling) Low = 0.0V+0.1V Source Impedance: 500 Max. Rise/Fall Time: 3.0 ns Max. (measured between 0.6V and 2.4V } Pulse Width: PW = 1.5 x Total Delay Period: PER = 10 x Total Delay NOTE: The above conditions are for test only and do not in any way restrict the operation of the device. PRINTER COMPUTER SYSTEM PULSE GENERATOR IN DEVICE UNDER TEST (DUT) TI TIME INTERVAL COUNTER T3 Test Setup PERI PWin TRIse INPUT Bay Vin 2ay" 5 5 SIGNAL 0.6V 0.6V Trise TRALL OUTPUT Von SIGNAL 1.5 1.5V VoL Timing Diagram For Testing Doc #97011 DATA DELAY DEVICES, INC. 1/27/97 Tel: 201-773-2299 Fax: 201-773-9672 http://Wwww.datadelay.com