EVAL-ADM3260MEBZ - Analog Devices Inc

Hot Swappable, Dual I2

C Isolators with

Integrated DC-to-DC Converter

Data Sheet

ADM3260

Rev. D Document Feedback

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FEATURES

isoPower integrated, isolated dc-to-dc converter

Regulated 3.15 V to 5.25 V output

Up to 150 mW output power

High common-mode transient immunity: >25 kV/µs

iCoupler integrated I2C digital isolator

Bidirectional I2C communication

3.0 V to 5.5 V supply/logic levels

Open-drain interfaces

Suitable for hot swap applications

30 mA current sink capability

1000 kHz maximum frequency

20-lead SSOP package with 5.3 mm creepage

High temperature operation: 105°C

Safety and regulatory approvals

UL recognition

2500 V rms for 1 minute per UL 1577

CSA Component Acceptance Notice 5A

VDE Certificate of Conformity (pending)

DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

VIORM = 560 V peak

APPLICATIONS

Isolated I2C, SMBus, and PMBus interfaces

Multilevel I2C interfaces

Central office switching

Telecommunication and data communication equipment

−48 V distributed power systems

−48 V power supply modules

Networking

FUNCTIONAL BLOCK DIAGRAM

PDIS

VDDP

VIN

VDDISO

GNDISO

GNDP

SDA1

SCL2 SCL1

VSEL

VISO

SDA2

ENCODE DECODE

DECODE ENCODE

ENCODE DECODE

DECODE ENCODE

ADM3260

PCS

OSC RECT REG

POWER ISOLATION

SIGNAL ISOLATION

11890-001

Figure 1.

Table 1. Power Levels for Isolated Converter

Input Voltage (V) Output Voltage (V) Output Power (mW)

5.0 5.0 150

5.0 3.3 100

3.3 3.3 66

GENERAL DESCRIPTION

Based on the iCoupler® and isoPower® chip scale transformer

technology, the ADM32601 is a hot swappable digital and power

isolator with two nonlatching, bidirectional communication

channels, supporting a complete isolated I2C interface, and an

integrated isolated dc-to-dc converter, supporting up to

150 mW of isolated power conversion.

iCoupler is a chip scale transformer technology with functional,

performance, size, and power consumption advantages as

compared to optocouplers. The bidirectional I2C channels

eliminate the need for splitting I2C signals into separate transmit

and receive signals for use with standalone optocouplers.

Based on the Analog Devices, Inc., isoPower technolog y, the

on-chip isolated dc-to-dc converter provides a regulated, isolated

voltage of 3.15 V to 5.25 V with up to 150 mW of output power

(see Figure 1).

With the ADM3260, the iCoupler and isoPower channels, along

with the I2C transceivers, can be integrated with semiconductor

circuitry, which enables a complete isolated I2C interface and

allows the power converter to be implemented in a small form

factor. The ADM3260 is available in 20-lead SSOP package and

has an operating temperature range of −40°C to+105°C.

isoPower uses high frequency switching elements to transfer power

through its transformer. Special care must be taken during printed

circuit board (PCB) layout to meet emissions standards. See the

AN-0971 Application Note for board layout recommendations.

1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents are pending.

ADM3260 Data Sheet

Rev. D | Page 2 of 19

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics—5 V Primary Input Supply/5 V

Secondary Isolated Supply........................................................... 3

Electrical Characteristics—5 V Primary Input Supply/3.3 V

Secondary Isolated Supply........................................................... 3

Electrical Characteristics—3.3 V Primary Input Supply/3.3 V

Secondary Isolated Supply........................................................... 4

DC-to-DC Converter Characteristics ....................................... 4

Digital Isolator DC Specifications .............................................. 5

Digital Isolator AC Specifications .............................................. 5

Package Characteristics ............................................................... 6

Regulatory Approvals ................................................................... 7

Insulation and Safety Related Specifications ............................ 7

DIN V VDE V 0884-10 (VDE V 0884-10) Insulation

Characteristics .............................................................................. 8

Recommended Operating Conditions .......................................9

Absolute Maximum Ratings ......................................................... 10

ESD Caution................................................................................ 10

VISO Voltage Truth Table ......................................................... 10

Pin Configuration and Function Descriptions ........................... 11

Typical Performance Characteristics ........................................... 12

Test Condition ................................................................................ 14

Applications Information .............................................................. 15

Functional Description .............................................................. 15

Digital Isolator Startup .............................................................. 16

Typical Application Diagram .................................................... 16

PCB Layout ................................................................................. 16

Thermal Analysis ....................................................................... 17

EMI Considerations ................................................................... 17

Insulation Lifetime ..................................................................... 17

Applications Example .................................................................... 18

Outline Dimensions ....................................................................... 19

Ordering Guide .......................................................................... 19

REVISION HISTORY

11/2017—Rev. C to Rev. D

Change to Table 1 ............................................................................. 1

3/2016—Rev. B to Rev. C

Changed VDDP (V) to VIN (V), Table 15 .................................. 10

4/2015—Rev. A to Rev. B

Changes to Features Section............................................................ 1

Changes to Table 9 and Table 10 ..................................................... 7

Changes to Functional Description Section ............................... 15

6/2014—Rev. 0 to Rev. A

Changes to Pin 8, Table 16............................................................. 11

12/2013—Revision 0: Initial Version

Data Sheet ADM3260

Rev. D | Page 3 of 19

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY

All typical specifications are at TA = 25°C, VIN = VISO = 5 V, VSEL resistor network RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ. Minimum/maximum

specifications apply over the entire recommended operation range which is 4.5 V ≤ VIN, VISO ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless

otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.

Table 2.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint VISO 5 V IISO = 15 mA, RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ

Thermal Coefficient VISO (TC) −44 µV/°C

Line Regulation VISO (LINE) 20 mV/V IISO = 15 mA, VIN = 4.5 V to 5.5 V

Load Regulation VISO (LOAD) 1.3 3 % IISO = 3 mA to 27 mA

Output Ripple VISO (RIP) 75 mV p-p 20 MHz bandwidth, COUTPUT_BYPASS = 0.1 µF||10 µF,

IISO = 27 mA

Output Noise

ISO (NOISE)

200

mV p-p

OUTPUT_BYPASS

= 0.1 µF||10 µF, I

ISO

= 27 mA

Switching Frequency fOSC 125 MHz

Pulse-Width Modulation Frequency fPWM 600 kHz

Output Current IISO (MAX) 30 mA VISO > 4.5 V

Efficiency at IISO (MAX) 29 % IISO = 27 mA

VIN

, No V

ISO

Load

VIN (Q)

6.8

IVIN, Full VISO Load IVIN (MAX) 104 mA

Thermal Shutdown

Shutdown Temperature TSHUTDOWN 154 °C

Thermal Hysteresis THYST 10 °C

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

All typical specifications are at TA = 25°C, VIN = 5 V, VISO = 3.3 V, VSEL resistor network RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ. Minimum/

maximum specifications apply over the entire recommended operation range, which is 4.5 V ≤ VIN ≤ 5.5 V, 3 V ≤ VISO ≤ 3.6 V, a n d −40°C ≤ TA

≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.

Table 3.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint VISO 3.3 V IISO = 15 mA, RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ

Thermal Coefficient VISO (TC) −26 µV/°C

Line Regulation VISO (LINE) 20 mV/V IISO = 15 mA, VIN = 4.5 V to 5.5 V

Load Regulation VISO (LOAD) 1.3 3 % IISO = 3 mA to 27 mA

Output Ripple VISO (RIP) 50 mV p-p 20 MHz bandwidth, COUTPUT_BYPASS = 0.1 µF||10 µF,

IISO = 27 mA

Output Noise VISO (NOISE) 130 mV p-p COUTPUT_BYPASS = 0.1 µF||10 µF, IISO = 27 mA

Switching Frequency fOSC 125 MHz

Pulse-Width Modulation Frequency fPWM 600 kHz

Output Current IISO (MAX) 30 mA 3 V < VISO< 3.6 V

Efficiency at IISO (MAX) 24 % IISO = 27 mA

IVIN, No VISO Load IVIN (Q) 3.2 8 mA

IVIN, Full VISO Load IVIN (MAX) 85 mA

Thermal Shutdown

Shutdown Temperature TSHUTDOWN 154 °C

Thermal Hysteresis THYST 10 °C

ADM3260 Data Sheet

Rev. D | Page 4 of 19

ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

All typical specifications are at TA = 25°C, VIN = VISO = 3.3 V, VSEL resistor network RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ. Minimum/maximum

specifications apply over the entire recommended operation range which is 3.0 V ≤ VIN, VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless

otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.

Table 4.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint VISO 3.3 V IISO = 10 mA, RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ

Thermal Coefficient VISO (TC) −26 µV/°C IISO = 20 mA

Line Regulation VISO (LINE) 20 mV/V IISO = 10 mA, VIN = 3.0 V to 3.6 V

Load Regulation VISO (LOAD) 1.3 3 % IISO = 2 mA to 18 mA

Output Ripple VISO (RIP) 50 mV p-p 20 MHz bandwidth, COUTPUT_BYPASS = 0.1 µF||10 µF,

IISO = 18 mA

Output Noise VISO (NOISE) 130 mV p-p COUTPUT_BYPASS = 0.1 µF||10 µF, IISO = 18 mA

Switching Frequency

OSC

125

MHz

Pulse-Width Modulation Frequency fPWM 600 kHz

Output Current IISO (MAX) 20 mA 3.6 V > VISO > 3 V

Efficiency at IISO (MAX) 27 % IISO = 18 mA

IVIN, No VISO Load IVIN (Q) 3.3 10.5 mA

IVIN, Full VISO Load IVIN (MAX) 77 mA

Thermal Shutdown

Shutdown Temperature TSHUTDOWN 154 °C

Thermal Hysteresis THYST 10 °C

DC-TO-DC CONVERTER CHARACTERISTICS

All typical specifications are at TA = 25°C. Minimum/maximum specifications apply over the entire recommended operation range unless

otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.

Table 5.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

UNDERVOLTAGE LOCKOUT VIN, VISO supply

Positive Going Threshold VUV+ 2.7 V

Negative Going Threshold VUV− 2.4 V

PDIS PIN

Input Threshold

Logic High VIH 0.7 VIN V

Logic Low

0.3 VIN

Input Current IPDIS −10 +0.01 +10 µA 0 V ≤ VPDIS ≤ VIN

Data Sheet ADM3260

Rev. D | Page 5 of 19

DIGITAL ISOLATOR DC SPECIFICATIONS

All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are

at TA = 25°C, VDDISO = 3.3 V or 5 V, and VDDP = 3.3 V or 5 V, unless otherwise noted. All voltages are relative to their respective ground.

Table 6.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

I2C SIGNAL ISOLATION BLOCK

Input Supply Current

Side 1 (5 V) IDDISO1 2.8 5.0 mA VDDISO = 5 V

Side 2 (5 V) IDDP1 2.7 5.0 mA VDDP = 5 V

Side 1 (3.3 V) IDDISO2 1.9 3.0 mA VDDISO = 3.3 V

Side 2 (3.3 V) IDDP2 1.7 3.0 mA VDDP = 3.3 V

LEAKAGE CURRENTS ISDA1, ISDA2, ISCL1, ISCL2 0.01 10 µA VSDA1 = VDDISO, VSDA2 = VDDP,

VSCL1 = VDDISO, VSCL2 = VDDP

SIDE 1 LOGIC LEVELS

Logic Input Threshold1 VSDA1T, VSCL1T 500 700 mV

Logic Low Output Voltages VSDA1OL, VSCL1OL 600 900 mV ISDA1 = ISCL1 = 3.0 mA

600 850 mV ISDA1 = ISCL1 = 0.5 mA

Input/Output Logic Low Level Difference2 ΔVSDA1, ΔVSCL1 50 mV

SIDE 2 LOGIC LEVELS

Input Voltage

Logic Low VSDA2IL, VSCL2IL 0.3 VDDP V

Logic High VSDA2IH, VSCL2IH 0.7 VDDP V

Output Voltage

Logic Low VSDA2OL, VSCL2OL 400 mV ISDA2 = ISCL2 = 30 mA

1 VIL < 0.5 V, VIH > 0.7 V.

2 ΔVSDA1 = VSDA1OL – VSDA1T, ΔVSCL1 = VSCL1OL – VSCL1T. This is the minimum difference between the output logic low level and the input logic threshold within a given

component. This ensures that there is no possibility of the device latching up the bus to which it is connected.

DIGITAL ISOLATOR AC SPECIFICATIONS

All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications

are at TA = 25°C, VDDISO = 3.3 V or 5 V, and VDDP = 3.3 V or 5 V, unless otherwise noted. Refer to Figure 17. All voltages are relative to

their respective ground.

Table 7.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

MAXIMUM FREQUENCY 1000 kHz

OUTPUT FALL TIME

5 V Operation 4.5 V ≤ VDDISO, VDDP ≤ 5.5 V, CL1 = 40 pF,

R1 = 1.6 kΩ, CL2 = 400 pF, R2 = 180 Ω

Side 1 Output (0.9 VDDISO to 0.9 V) tf1 13 26 120 ns

Side 2 Output (0.9 VDDP to 0.1 VDDP) tf2 32 52 120 ns

3 V Operation 3.0 V ≤ VDDISO, VDDP ≤ 3.6 V, CL1 = 40 pF,

R1 = 1.0 kΩ, CL2 = 400 pF, R2 = 120 Ω

Side 1 Output (0.9 VDDISO to 0.9 V) tf1 13 32 120 ns

Side 2 Output (0.9 VDDP to 0.1 VDDP) tf2 32 61 120 ns

PROPAGATION DELAY

5 V Operation 4.5 ≤ VDDISO, VDDP ≤ 5.5 V, CL1 = CL2 = 0 pF,

R1 = 1.6 kΩ, R2 = 180 Ω

Side 1 to Side 2

Rising Edge1 tPLH12 95 130 ns

Falling Edge2 tPHL12 162 275 ns

ADM3260 Data Sheet

Rev. D | Page 6 of 19

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Side 2 to Side 1

Rising Edge3 tPLH21 31 70 ns

Falling Edge4 tPHL21 85 155 ns

3 V Operation 3.0 V ≤ VDDISO, VDDP ≤ 3.6 V, CL1 = CL2 = 0 pF,

R1 = 1.0 kΩ, R2 = 120 Ω

Side 1 to Side 2

Rising Edge1 tPLH12 82 125 ns

Falling Edge2 tPHL12 196 340 ns

Side 2 to Side 1

Rising Edge3 tPLH21 32 75 ns

Falling Edge

PHL21

110

210

PULSE WIDTH DISTORTION

5 V Operation 4.5 V ≤ VDDISO, VDDP ≤ 5.5 V, CL1 = CL2 = 0 pF,

R1 = 1.6 kΩ, R2 = 180 Ω

Side 1 to Side 2, |tPLH12 − tPHL12| PWD12 67 145 ns

Side 2 to Side 1, |tPLH21 − tPHL21| PWD21 54 85 ns

3 V Operation 3.0 V ≤ VDDISO, VDDP ≤ 3.6 V, CL1 = CL2 = 0 pF,

R1 = 1.0 kΩ, R2 = 120 Ω

Side 1 to Side 2, |t

PLH12

− t

PHL12

PWD

114

215

Side 2 to Side 1, |tPLH21 − tPHL21| PWD21 77 135 ns

COMMON-MODE TRANSIENT IMMUNITY5 |CMH|, |CML| 25 35 kV/µs

1 tPLH12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.7 VDDP.

2 tPHL12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.4 V.

3 tPLH21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.7 VDDISO.

4 tPHL21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.9 V.

5 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDP. |CML| is the maximum common-mode voltage slew

rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The

transient magnitude is the range over which the common mode is slewed.

PACKAGE CHARACTERISTICS

Table 8. Thermal and Isolation Characteristics

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Resistance (Input to Output)1 RI-O 1012 Ω

Capacitance (Input to Output)1 CI-O 2.2 pF f = 1 MHz

Input Capacitance2 CI 4.0 pF

IC Junction-to-Ambient Thermal Resistance θJA 50 °C/W Thermocouple located at center of package underside,

test conducted on 4-layer board with thin traces3

1 The device is considered a 2-terminal device: Pin 1 through Pin 10 are shorted together; and Pin 11 through Pin 20 are shorted together.

2 Input capacitance is from any input data pin to ground.

3 See the Thermal Analysis section for thermal model definitions.

Data Sheet ADM3260

Rev. D | Page 7 of 19

REGULATORY APPROVALS

Table 9.

UL1 CSA VDE (Pending)2

Recognized Under 1577 Component

Recognition Program1

Approved under CSA Component Acceptance

Notice 5A

Certified according to DIN V VDE V 0884-10

(VDE V 0884-10):2006-122

Single Protection, 2500 V RMS

Isolation Voltage

Basic insulation per CSA 60950-1-03 and IEC 60950-1,

400 V rms (565 V peak) maximum working voltage

Reinforced insulation, 560 V peak

File E214100

File 205078

File 2471900-4880-0001

1 In accordance with UL 1577, each ADM3260 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 10 µA).

2 In accordance with DIN V VDE V 0884-10, ADM3260 is proof tested by applying an insulation test voltage ≥1590 V peak for 1 second (partial discharge detection limit =

5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.

INSULATION AND SAFETY RELATED SPECIFICATIONS

Table 10. Critical Safety Related Dimensions and Material Properties

Parameter Symbol Value Unit Test Conditions/Comments

Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration

Minimum External Air Gap (Clearance) L(I01) 5.1 mm Measured from input terminals to output terminals,

shortest distance through air

Minimum External Tracking (Creepage) L(I02) 5.1 mm Measured from input terminals to output terminals,

shortest distance path along body

Minimum Clearance in the Plane of the Printed

Circuit Board (PCB Clearance)

L(PCB) 5.5 mm Measured from input terminals to output terminals,

shortest distance through air, line of sight, in the PCB

mounting plane (for information only)

Minimum Internal Gap (Internal Clearance) 0.017 min mm Distance through insulation

Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303, Part 1

Isolation Group II Material group (DIN VDE 0110, 1/89, Table 1)

ADM3260 Data Sheet

Rev. D | Page 8 of 19

DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS

This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by the

protective circuits. The asterisk (*) marking on packages denotes DIN V VDE V 0884-10 approval.

Table 11. VDE Characteristics

Description Test Conditions/Comments Symbol Characteristic Unit

Installation Classification per DIN VDE 0110

For Rated Mains Voltage ≤ 150 V rms I to IV

For Rated Mains Voltage ≤ 300 V rms I to III

For Rated Mains Voltage ≤ 400 V rms I to II

Climatic Classification 40/105/21

Pollution Degree per DIN VDE 0110, Table 1 2

Maximum Working Insulation Voltage VIORM 560 V peak

Input-to-Output Test Voltage, Method b1 VIORM × 1.875 = Vpd(m), 100% production test,

tini = tm = 1 sec, partial discharge < 5 pC

Vpd(m) 1050 V peak

Input-to-Output Test Voltage, Method a

After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec,

partial discharge < 5 pC

Vpd(m) 840 V peak

After Input and/or Safety Test Subgroup 2

and Subgroup 3

VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec,

partial discharge < 5 pC

Vpd(m) 672 V peak

Highest Allowable Overvoltage VIOTM 3535 V peak

Surge Isolation Voltage

IOSM(TEST)

= 10 kV, 1.2 µs rise time, 50 µs, 50% fall time

IOSM

4000

V peak

Safety Limiting Values Maximum value allowed in the event of a

failure (see Figure 2)

Case Temperature TS 150 °C

Converter Safety Total Dissipated Power IS1 2.5 W

VDDP + VDDISO Current ITMAX 212 mA

Insulation Resistance at T

for Isolated Converter

= 500 V

>10

Ω

0.5

1.0

1.5

2.0

2.5

3.0

050 100 150 200

AMBIENT TEMPERATURE (°C)

SAFE LIMITING POWER (W)

11890-002

Figure 2. Isolated Converter Thermal Derating Curve, Dependence of Safety

Limiting Values on Case Temperature, per DIN V VDE V 0884-10

CASE TEMPERATURE (°C)

SAFETY-LIMITING CURRENT (mA)

350

50 100 150 200

300

150

100

200

250

11890-003

Figure 3. Digital Isolator Thermal Derating Curve, Dependence of Safety-

Limiting Values on Case Temperature, per DIN V VDE V 0884-10

Data Sheet ADM3260

Rev. D | Page 9 of 19

RECOMMENDED OPERATING CONDITIONS

Table 12.

Parameter Value

OPERATING TEMPERATURE

−40°C to +105°C

ISOLATED CONVERTER

Supply Voltages

VIN at VISO Set to Regulate to 3.3 V

3.0 V to 5.5 V

VIN at VISO Set to Regulate to 5 V 4.5 V to 5.5 V

DIGITAL ISOLATOR

Supply Voltages (VDDISO, VDDP)3 3.0 V to 5.5 V

Input/Output Signal Voltage (VSDA1, VSCL1, VSDA2, VSCL2) 5.5 V

Capacitive Load

Side 1 (CL1) 40 pF

Side 2 (CL2) 400 pF

STATIC OUTPUT LOADING

Side 1 (ISDA1, ISCL1) 0.5 mA to 3 mA

Side 2 (I

SDA2

, I

SCL2

)

0.5 mA to 30 mA

1 Operation at 105°C requires reduction of the maximum load current (see Table 13).

2 Each voltage is relative to its respective ground.

3 All voltages are relative to their respective ground.

ADM3260 Data Sheet

Rev. D | Page 10 of 19

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 13.

Parameter Rating

Storage Temperature (TST) −55°C to +150°C

Ambient Operating Temperature (TA) −40°C to +105°C

Supply Voltages (VIN, VISO)1 −0.5 V to +7.0 V

Supply Voltages (VDDISO, VDDP)1 −0.5 V to +7.0 V

VISO Supply Current2

TA = −40°C to +105°C 30 mA

Digital Isolator Average Output

Current per Pin3

Side 1 (IO1) ±18 mA

Side 2 (IO2) ±100 mA

Input/Output Voltage

Side 1 (VSDA1, VSCL1)3 −0.5 V to VDDISO + 0.5 V

Side 2 (VSDA2, VSCL2)3 −0.5 V to VDDP + 0.5 V

Input Voltage (PDIS, VSEL)1, 4 −0.5 V to VIN + 0.5 V

Common-Mode Transients5 −100 kV/µs to +100 kV/µs

1 All voltages are relative to their respective ground.

2 VISO provides current for dc and dynamic loads on the VISO input/output

channels. This current must be included when determining the total VISO

supply current.

3 See Figure 3 for maximum rated current values for various temperatures.

4 VCC can be either VIN or VISO depending on the whether the input is on the

primary or secondary side of the device, respectively.

5 Refers to common-mode transients across the insulation barrier. Common-mode

transients exceeding the absolute maximum ratings may cause latch-up or

permanent damage.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

ESD CAUTION

Table 14. Maximum Continuous Working Voltage Supporting 50-Year Minimum Lifetime1

Parameter Maximum Unit Applicable Certification

AC Voltage

Bipolar Waveform 560 V peak All certifications, 50-year operation

Unipolar Waveform 560 V peak

DC Voltage

|DC Peak Voltage| 560 V peak

1 Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.

VISO VOLTAGE TRUTH TABLE

Table 15. Truth Table (Positive Logic)

VIN (V) VSEL Input PDIS Input VISO Output (V) Notes

BOTTOM

= 10 kΩ, R

TOP

= 30.9 kΩ

Low

5 RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ High 0

3.3 RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ Low 3.3

3.3 RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ High 0

5 RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ Low 3.3

BOTTOM

= 10 kΩ, R

TOP

= 16.9 kΩ

High

3.3 RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ Low 5 Configuration not recommended

3.3 RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ High 0

Data Sheet ADM3260

Rev. D | Page 11 of 19

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

813

912

10 11

NOTES

1. NC = NO CONNECT. DO NOT CONNECT TO THIS PI

TOP VIEW

(Not to Scale)

11890-017

PDIS

VDDP

VIN

GNDP

SCL2

SDA2

VDDISO

GNDISO

SDA1

SCL1

VSEL

VISO

ADM3260

Figure 4. Pin Configuration

Table 16. Pin Function Descriptions

Pin No. Mnemonic Description

1, 5, 7 ,10 GNDP Ground Reference for Primary Side. Connect all GNDP pins to the primary ground reference.

2 SCL2 Clock Input/Output, Primary Side.

3 SDA2 Data Input/Output, Primary Side.

4 VDDP Digital Isolator Primary Supply Input, 3.0 V to 5.5 V.

6, 15 NC No Connect. Do not connect to this pin.

8 PDIS

Power Disable. When PDIS is tied to VIN, the power supply enters low power standby mode. When PDIS is tied

to GNDP, the power converter is active.

9 VIN

isoPower Converter Primary Supply Input, 3.0 V to 5.5 V.

11, 14, 16, 20 GNDISO Ground Reference for Isolated Side. Connect all GNDISO pins to the isolated ground reference.

12 VISO Secondary Supply Voltage Output for Digital Isolator Isolated Side Power and External Loads. The output

voltage is adjustable from 3.15 V to 5.25 V.

13 VSEL Output Voltage Set. Provide a thermally matched resistor network between VISO and GNDISO to divide the

required output voltage to match the 1.25 V reference voltage. The VISO voltage can be programmed up to

20% higher or 75% lower than VIN but must be within the allowed output voltage range.

17 VDDISO Digital Isolator Isolated Side Supply Input, 3.0 V to 5.5 V.

18 SDA1 Data Input/Output, Isolated Side.

19 SCL1 Clock Input/Output, Isolated Side.

ADM3260 Data Sheet

Rev. D | Page 12 of 19

TYPICAL PERFORMANCE CHARACTERISTICS

0 0.02 0.04 0.06 0.08

LOAD CURRENT (A)

EFFICIENCY (%)

11890-005

VIN = 5V/VISO = 3.3V

VIN = 3.3V/VISO = 3.3V

VIN = 5V/VISO = 5V

Figure 5. Typical Power Supply Efficiency at 5 V/5 V, 5 V/3.3 V, and 3.3 V/3.3 V

100

150

200

250

300

350

400

450

0 10203040

POWER DISSIPATION (mW)

ISO

(mA)

VIN = 5V/VISO = 3.3V

VIN = 3.3V/VISO = 3.3V

VIN = 5V/VISO = 5V

11890-006

Figure 6. Typical Total Power Dissipation vs. IISO

0255075100

ISO

(mA)

DDP

(mA)

VIN = 5V/VISO = 3.3V

VIN = 3.3V/VISO = 3.3V

VIN = 5V/VISO = 5V

11890-007

Figure 7. Typical Isolated Output Supply Current (IISO) as a Function of

External Load at 5 V/5 V, 5 V/3.3 V, and 3.3 V/3.3 V

0.4

0.2

0.8

0.6

1.0

1.2

1.4

1.8

1.6

2.0

0.10

0.05

0.20

0.15

0.25

0.30

0.40

0.45

0.35

0.50

3.03.54.04.55.05.56.0

VDDP SUPPLY VOLTAGE (V)

POWER DISSIPATION (W)

VIN

CURRENT (A)

11890-008

POWER DISSIPATION

VIN

Figure 8. Power Dissipation and IVIN Current vs. VDDP Supply Voltage

(1ms/DIV)

VISO (100mV/DIV)

10% LOAD

90% LOAD

11890-009

Figure 9. Typical VISO Transient Load Response, 5 V Output,

10% to 90% Load Step

(1ms/DIV)

VISO (100mV/DIV)

10% LOAD

90% LOAD

11890-010

Figure 10. Typical VISO Transient Load Response, 3.3 V Input, 3.3 V Output,

10% to 90% Load Step

Data Sheet ADM3260

Rev. D | Page 13 of 19

(1ms/DIV)

VISO (100mV/DIV)

11890-011

10% LOAD

90% LOAD

Figure 11. Typical VISO Transient Load Response, 5 V Input, 3.3 V Output,

10% to 90% Load Step

VISO (V)

TIME (µs)

4.970

4.965

4.960

4.955

4.950

4.945

4.940

10 234

11890-012

Figure 12. Typical VISO = 5 V Output Voltage Ripple at 90% Load

VISO (V)

TIME (µs)

3.280

3.278

3.276

3.274

3.272

3.270

10 2 3 4

11890-013

Figure 13. Typical VISO = 3.3 V Output Voltage Ripple at 90% Load

2.0

2.5

3.0

3.5

4.0

4.5

5.0

3.0 3.5 4.0 4.5 5.0 5.5 6.0

MINIMUM INPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

30mA LOAD

20mA LOAD

10mA LOAD

11890-014

Figure 14. Relationship Between Output Voltage and Required Input Voltage,

Under Load to Maintain >80% Duty Factor in the PWM

500

450

400

350

300

250

200

150

100

–20 020 40

AMBIENT TEMPERATURE (°C)

POWER DISSIPATION (mW)

60 80 100 120–40

VIN = 5V/VISO = 5V

VIN = 5V/VISO = 3.3V

11890-015

Figure 15. Power Dissipation with a 30 mA Load vs. Ambient Temperature

500

450

400

350

300

250

200

150

100

–20 020 40

AMBIENT TEMPERATURE (°C)

POWER DISSIPATION (mW)

60 80 100 120–40

11890-016

VIN = 5V/VISO = 3.3V

VIN = 3.3V/VISO = 3.3V

VIN = 5V/VISO= 5V

Figure 16. Power Dissipation with a 20 mA Load vs. Ambient Temperature

ADM3260 Data Sheet

Rev. D | Page 14 of 19

TEST CONDITION

ENCODE DECODE

DECODE ENCODE

ENCODE DECODE

DECODE ENCODE

VDDP

SDA1

SCL1

VDDISO

SDA2

SCL2

GNDISO GNDP C

R2 R2

R1 R1

11890-004

Figure 17. Timing Test Diagram

Data Sheet ADM3260

Rev. D | Page 15 of 19

APPLICATIONS INFORMATION

FUNCTIONAL DESCRIPTION

The digital isolator block on the ADM3260 interfaces on each

side to a bidirectional I2C signal. Internally, the I2C interface is

split into two unidirectional channels communicating in

opposing directions via a dedicated iCoupler isolation channel

for each. One channel (the bottom channel of each channel pair

shown in Figure 17) senses the voltage state of the Side 1 I2C pin

(SCL1 or SDA1) and transmits its state to its respective Side 2

I2C pin (SCL2 or SDA2).

Both the Side 1 (isolated side) and the Side 2 (primary side) I2C

pins interface to an I2C bus operating in the 3.0 V to 5.5 V range.

A logic low on either pin causes the opposite pin to pull low

enough to comply with the logic low threshold requirements of the

other I2C devices on the bus. To avoid I2C bus contention, input

a low threshold at SDA1 or SCL1 to guarantee at least 50 mV

less than the output low signal at the same pin. This step prevents

an output logic low at Side 1 from transmitting back to Side 2

and pulling down the I2C bus.

Because the Side 2 logic levels or thresholds are standard I2C

values, multiple ADM3260 devices connected to a bus by their

Side 2 pins communicate with each other and with other I2C-

compatible devices. I2C compatibility refers to situations in

which the logic levels of a component do not necessarily meet

the requirements of the I2C specification but still allow the

component to communicate with an I2C-compliant device.

I2C compliance refers to situations in which the logic levels of

a component meet the requirements of the I2C specification.

However, because the Side 1 pin has a modified output level/

input threshold, this side of the ADM3260 communicates only

with devices that conform to the I2C standard. In other words,

Side 2 of the ADM3260 is I2C compliant, whereas Side 1 is only

I2C compatible.

The output logic low levels are independent of the VDDISO and

VDDP voltages. The input logic low threshold at Side 1 is also

independent of VDDISO. However, the input logic low threshold at

Side 2 is at 0.3 VDDP, consistent with I2C requirements. The Side 1

and Side 2 pins have open-collector outputs whose high levels

are set via pull-up resistors to their respective supply voltages.

The dc-to-dc converter section of the ADM3260 works on

principles that are common to most modern power supplies.

It has a split controller architecture with isolated pulse-width

modulation (PWM) feedback. VIN power is supplied to an

oscillating circuit that switches current into a chip-scale air core

transformer. Power transferred to the secondary side is rectified

and regulated to a value between 3.15 V and 5.25 V depending

on the setpoint supplied by an external voltage divider (see

Equation 1). The secondary (VISO) side controller regulates

the output by creating a PWM control signal that is sent to the

primary (VIN) side by a dedicated iCoupler data channel.

The PWM modulates the oscillator circuit to control the power

being sent to the secondary side. Feedback allows for significantly

higher power and efficiency.

(V)1.23

BOTTOM

BOTTOMTOP

VISO +

×=

(1)

where:

RTOP is a resistor between VSEL and VISO.

RBOTTOM is a resistor between VSEL and GNDISO.

Because the output voltage is adjusted continuously, there are an

infinite number of operating conditions. This data sheet

addresses three discrete operating conditions in the Specifications

section. Many other combinations of input and output voltage are

possible; Figure 14 depicts the supported voltage combinations

at room temperature. Figure 14 was generated by using a fixed

VISO load and decreasing the input voltage until the PWM was

at 80% duty cycle. Each of the curves represents the minimum

input voltage that is required for operation under this criterion.

For example, if the application requires 30 mA of output current

at 5 V, the minimum input voltage at VIN is 4.25 V. Figure 14

also illustrates that a configuration with VIN = 3.3 V and VISO =

5 V is not recommended. Even at 10 mA of output current, the

PWM cannot maintain less than 80% duty factor, leaving no

margin to support load or temperature variations.

Typically, the dc-to-dc converter section of the ADM3260

dissipates about 17% more power between room temperature

and maximum temperature; therefore, the 20% PWM margin

covers temperature variations.

The isolated converter implements undervoltage lockout (UVLO)

with hysteresis on the input/output pins of the primary and

secondary sides as well as the VIN power input. This feature

ensures that the converter does not go into oscillation due to

noisy input power or slow power-on ramp rates.

ADM3260 Data Sheet

Rev. D | Page 16 of 19

DIGITAL ISOLATOR STARTUP

Both the VDDISO and VDDP supplies of the digital isolator

block have an undervoltage lockout feature to prevent the signal

channels from operating unless certain criteria are met. This

feature prevents input logic low signals from pulling down the

I2C bus inadvertently during power-up/power-down.

To enable the signal channels, the following two criteria must be met:

 Both supplies must be at least 2.5 V.

 At least 40 μs must elapse after both supplies exceed the

internal start-up threshold of 2.0 V.

Until both criteria are met for both supplies, pull the outputs of

the digital isolator block of the ADM3260 high, ensuring a startup

that avoids any disturbances on the bus.

Figure 18 and Figure 19 illustrate the supply conditions for fast

and slow input supply slew rates.

MINIMUM RECOMMENDED

OPERATING SUPPLY, 3.0V

MINIMUM VALID SUPPLY, 2.5V

INTERNAL START-UP

THRESHOLD, 2.0V

40µs

SUPPLY VALID

11890-018

Figure 18. Digital Isolator Start-Up Condition, Supply Slew Rate > 12.5 V/ms

40µs

SUPPLY VALID

MINIMUM RECOMMENDED

OPERATING SUPPLY, 3.0V

MINIMUM VALID SUPPLY, 2.5V

INTERNAL START-UP

THRESHOLD, 2.0V

11890-019

Figure 19. Digital Isolator Start-Up Condition, Supply Slew Rate < 12.5 V/ms

TYPICAL APPLICATION DIAGRAM

Figure 20 shows a typical application circuit including the pull-up

resistors required for both Side 1 and Side 2 buses. Bypass capacitor

with values from 0.01 μF to 0.1 μF are required between VDDP

and GNDP and between VDDISO and GNDISO.

ISOLATION

BARRIER

5V 5V_ISO

ON/OFF PDIS

VIN

VDDP VDDISO

VSEL

GNDP GNDISO

SDA2

SCL2

VISO

SCL1

SDA1

ADM3260

SDA_ISO

GNDP GNDISO

SCL_ISO

SDA

SCL

11890-020

Figure 20. Typical Isolated I2C Interface Using the ADM3260

PCB LAYOUT

Supply bypassing of the 0.15 W isoPower integrated dc-to-dc

converter with a low ESR capacitor is required as near the chip

pads as possible. The isoPower inputs require several passive

components to bypass the power effectively, as well as to set the

output voltage and to bypass the core voltage regulator (see

Figure 21 through Figure 23).

PDIS

VIN

GNDP

10µF 0.1µF

11890-021

Figure 21. VIN Bias and Bypass Components

VSEL

VISO

GNDISO

0.1µF +

10kΩ10µF

30kΩ

11890-022

Figure 22. VISO Bias and Bypass Components

The power supply section of the ADM3260 uses a 125 MHz

oscillator frequency to efficiently pass power through its chip-scale

transformers. Choose bypass capacitors carefully because they must

perform more than one function. Noise suppression requires a low

inductance, high frequency capacitor; ripple suppression and

proper regulation require a large value bulk capacitor. Connect

these capacitors most conveniently between Pin VIN and

Pin GNDP for VIN and between Pin VISO and Pin GNDISO for

VISO. To suppress noise and reduce ripple, a parallel combination

of at least two capacitors is required. The recommended capacitor

values are 0.1 μF and 10 μF for VIN. The smaller capacitor must

have a low ESR; for example, use of an NP0 or X5R ceramic

capacitor is advised. Ceramic capacitors are also recommended

for the 10 mF bulk capacitance. Add an additional 10 nF

capacitor in parallel if further EMI/EMC control is desired.

Do not exceed 2 mm for the total lead length between the ends

of the low ESR capacitor and the input power supply.

VDDP

SDA2

SCL2

SDA1

SCL1

GNDP

VDDISO

GNDISO

VSEL

PDIS

VIN VISO

GNDP

BYPASS < 2mm

GNDISO

ADM3260

11890-023

Figure 23. Recommended PCB Layout

Data Sheet ADM3260

Rev. D | Page 17 of 19

In applications involving high common-mode transients, design

the board layout such that any coupling that does occur affects all

pins on a given component side equally. Failure to ensure this can

cause voltage differentials between pins, exceeding the absolute

maximum ratings specified in Table 13, and thereby leading to

latch-up and/or permanent damage.

THERMAL ANALYSIS

The ADM3260 consist of four internal die attached to a split lead

frame with four die attach paddles. For the purposes of thermal

analysis, treat the chip as a thermal unit, with the highest junction

temperature reflected in the θJA value from Table 8. The value of θJA

is based on measurements taken with the devices mounted on a

JEDEC standard, 4-layer board with fine width traces and still

air. Under normal operating conditions, the ADM3260 operates

at a full load across the full temperature range without derating

the output current.

Power dissipation in the device varies with ambient temperature

due to the characteristics of the switching and rectification

elements. Figure 15 and Figure 16 show the relationship

between total power dissipation at two load conditions and

ambient temperature. Use this information to determine the

junction temperature at various operating conditions to ensure

that the device does not go into thermal shutdown unexpectedly.

EMI CONSIDERATIONS

The dc-to-dc converter section of the ADM3260 components

must operate at a very high frequency to allow efficient power

transfer through the small transformers. This high frequency

operation creates high frequency currents that propagate in

circuit board ground and power planes, causing edge and dipole

radiation. Grounded enclosures are recommended for applications

that use these devices. If grounded enclosures are not possible,

follow good RF design practices in the layout of the PCB. See

the AN-0971 Application Note for the most current PCB layout

recommendations for the ADM3260.

INSULATION LIFETIME

All insulation structures eventually break down when subjected to

voltage stress over a sufficiently long period. The rate of insulation

degradation is dependent on the characteristics of the voltage

waveform applied across the insulation. Analog Devices conducts

an extensive set of evaluations to determine the lifetime of the

insulation structure within the ADM3260.

Accelerated life testing is performed using voltage levels higher

than the rated continuous working voltage. Acceleration factors for

several operating conditions are determined, allowing calculation

of the time to failure at the working voltage of interest. The values

shown in Table 14 summarize the peak voltages for 50 years of

service life in several operating conditions. In many cases, the

working voltage approved by agency testing is higher than the

50-year service life voltage. Operation at working voltages

higher than the service life voltage listed leads to premature

insulation failure.

The insulation lifetime of the ADM3260 depends on the voltage

waveform type imposed across the isolation barrier. The iCoupler

insulation structure degrades at different rates, depending on

whether the waveform is bipolar ac, unipolar ac, or dc. Figure 24,

Figure 25, and Figure 26 illustrate these different isolation voltage

waveforms.

Bipolar ac voltage is the most stringent environment. A 50-year

operating lifetime under the bipolar ac condition determines

the Analog Devices recommended maximum working voltage.

In the case of unipolar ac or dc voltage, the stress on the insulation

is significantly lower. This allows operation at higher working

voltages while still achieving a 50-year service life. The working

voltages listed in Table 14 can be applied while maintaining the

50-year minimum lifetime, provided that the voltage conforms to

either the unipolar ac or dc voltage cases. Any cross-insulation

voltage waveform that does not conform to Figure 25 or Figure 26

must be treated as a bipolar ac waveform, and its peak voltage must

be limited to the 50-year lifetime voltage value listed in Table 14.

RATED PEAK VOLTAGE

11890-024

Figure 24. Bipolar AC Waveform

RATED PEAK VOLTAGE

11890-025

Figure 25. DC Waveform

RATED PEAK VOLTAGE

NOTES

1. THE VOLTAGE IS SHOWN AS SINU SOIDAL FOR ILLUSTRATION

PUPOSES ONLY. IT IS MEANT TO REPRESENT ANY VOLTAGE

WAVEFORM VARYING BETWEEN 0V AND SOME LIMITING VALUE.

THE LIMITING VALUE CAN BE POSITIVE OR NEGATIVE,

BUT THE VOLTAGE CANNOT CROSS 0V.

11890-026

Figure 26. Unipolar AC Waveform

ADM3260 Data Sheet

Rev. D | Page 18 of 19

APPLICATIONS EXAMPLE

RTN 12V

3.3V MANAGEMENT BUS

PROCESSOR

–48V

ADM3260

POWER + I

ISOLATOR

3.3V_ISO

SDA

SCL

SDA_ISO

SCL_ISO

VIN

VDDPVDDISO

VISO

SCL2

GNDP

SDA2

SCL1

GNDISO

SDA1

ADP1046

ISOLATED

DIGITAL

DC-TO-DC

CONVERTER

11890-027

ADM1075

–48V HOT SWAP

CONTROLLER

AND

DIGITAL POWER

MONITOR

Figure 27. The ADM3260 Used in −48 V Power Monitoring and Control

Data Sheet ADM3260

Rev. D | Page 19 of 19

OUTLINE DIMENSIONS

COMPLIANT TO JEDEC STANDARDS MO-150-AE

060106-A

20 11

7.50

7.20

6.90

8.20

7.80

7.40

5.60

5.30

5.00

SEATING

PLANE

0.05 MIN

0.65 BSC

2.00 MAX

0.38

0.22

COPLANARITY

0.10

1.85

1.75

1.65

0.25

0.09

0.95

0.75

0.55

8°

4°

0°

Figure 28. 20-Lead Shrink Small Outline Package [SSOP]

(RS-20)

Dimensions shown in millimeters

ORDERING GUIDE

Model1 Temperature Range Package Description Package Option

ADM3260ARSZ −40°C to +105°C 20-Lead Shrink Small Outline Package [SSOP] RS-20

ADM3260ARSZ-RL7 −40°C to +105°C 20-Lead Shrink Small Outline Package [SSOP] RS-20

EVAL-ADM3260EBZ Evaluation Board

1 Z = RoHS Compliant Part.

I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).

registered trademarks are the property of their respective owners.

D11890-0-11/17(D)