© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN73402 • 1.0.1 12
FAN73402 — LED Backlight Driving Boost Switch
Internal Dimming MOSFET
A dimming MOSFET (200 V N-channel MOSFET) is
incorporated in the FAN73402. The power transistor is
produced using Fairchild’s proprietary, planar stripe,
DMOS technology. This advanced technology is tailored
to minimize on-state resistance (RDS(on)=1.0 ) to
provide superior switching performance. This device is
suited for high-efficiency SMPS and shows desirable
thermal characteristic during operation. To prevent
initial LED current overshoot at low VADIM levels, gate
resistance of the internal dimming FET is designed as
5 k.
Feedback Loop Compensation
Stable closed-loop control can be accomplished by
connecting a compensation network between COMP and
GND. The compensation needed to stabilize the
converter can be a Type-I circuit (a simple integrator) or
a Type-II circuit (and integrator with and additional pole-
zero pair). The type of the compensation circuit required
is dependent on the phase of the power stage at the
crossover frequency.
FAN73402 adopts a Type-II compensator circuit.
Programmed Current Control
FAN73402 uses Current-Mode control. Current-Mode
control loops: an outer feedback loop that senses output
voltage (current) and delivers a DC control voltage to an
inner feedback loop, which senses the peak current of
the inductor and keeps it constant on a pulse-by-pulse
basis. One of the advantages of the Current-Mode
control is line/load regulation, which is corrected
instantaneously against line voltage changes without the
delay of an error amplifier.
Programmable Slope Compensation
When the power converter operates in Continuous
Conduction Mode (CCM), the current programmed
controller is inherently unstable when duty is larger than
50%, regardless of the converter topology. The FAN73402
uses a Peak-Current-Mode control scheme with
programmable slope compensation and includes an
internal transconductance amplifier to accurately control
the output current over all line and load conditions.
An internal Rslope resistor (5 kΩ) connected to sensing
resistor, RS, and an external resistor, R1, can control the
slope of VSC for the slope compensation. Although the
normal operating mode of the power converter is DCM,
the boost converter operates in CCM in the case of rapid
LED current increase. As a result, slope compensation is
an important feature.
The value of an external series resistor (R1) can be
programmed. In normal DCM operation, 5 k is
recommended.
5k R1
RS
Ipeak=45µA
Iramp
VCS
VS
VSC
VCMP
Iinductor
m1 m2
m
Ts
Figure 27. Slope Compensation
Cycle-by-Cycle Over-Current Protection
In boost topology, the switch can be damaged in
abnormal conditions (inductor short, diode short, output
short). It is always necessary to sense the switch current
to protect against over-current failures. Switch failures
due to excessive current can be prevented by limiting Id.
DRV
CS
CLK+LEB
-
+
0.5V
5k
Switch Off
R1RS
Id
vcs
Figure 28. Cycle-by-Cycle OCP Circuit
When the voltage drops at R1 and RS exceed a threshold
of approximately 0.5 V, the power MOSFET over-current
function is triggered after minimum turn-on time or LEB
time (300 ns).
The peak voltage level at CS terminal:
Choose the boost switch current-sensing resistor (RCS):
Open-LED Protection (OLP)
After the first PWM dimming-HIGH signal, the feedback
sensing resistor (RSENSE) starts sensing the LED current. If
the feedback voltage of the SENSE pin drops below 0.2 V,
the OLP triggers to generate an error flag signal. Because
OLP can be detected only in PWM dimming-HIGH; if OLP
detecting time is over 5 μs, PWM dimming signal is pulled
HIGH internally regardless of external dimming signal. If
OLP signal continues over blanking time, an error flag
signal is triggered.
OLP blanking time is dependent on the boost switch
frequency, per Equation 6. FAULT OUT signal is made
through the FAULT pin, which needs to be connected 5 V
reference voltage through a pull-up resistor. In normal
operation, the FAULT pin voltage is pulled down to
ground. In OLP condition, the FAULT pin voltage is
pulled HIGH.