is the registered trademark of Atmel Corporation,
2325 Orchard Parkway, San Jose, CA 95131
R
Rev. 1743A–04/01
Atmel’s ARM®-based Microcontroller
Low Power for Portable Systems
White Paper
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Abstract The driving force behind the semiconductor industry today is the digital nomad. The dig-
ital nomad is an active, productive and creative person who is not constrained by
conventional boundaries of space and time, work and leisure. He or she simply needs to
be connected – to all the digital information services available – anywhere, any time.
This is creating a demand for portable electronic devices on an unprecedented scale.
The mobile telephone is the highest-profile example, but this is becoming the voice-
driven interface for many other activities. Most significant is voice/keypad Web access,
for information, Web phone calls, voice-driven e-mail, e-commerce and more. As road
vehicles accumulate intelligence, for navigation, hands-off convoy driving, accident pre-
vention, etc, a related growth market for on-board electronic systems comes into focus.
These lifestyle accessories for the digital nomad are designed for mass consumption.
They must be small, attractive, lightweight, easy-to-use and cheap. They have a short
useful life – they are soon obsoleted by superior successors. In particular, the inconve-
nience of re-charging or carrying bulky power packs must be kept to a minimum.
The information processing element behind these information appliances is the micro-
controller. Embedded microcontrollers are the key building block in any system that
responds to instructions or transforms information, from a pager to a satellite telephone.
To satisfy the demanding requirements of the hand-held systems market, notably mini-
mum battery size and weight along with maximum battery life, the lowest possible power
consumption is mandatory.
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Atmel’s AT91 Series
Microcontrollers –
the Low Power
Solution
Atmel has responded to this challenge in the design of its AT91 series microcontrollers,
which embed the 32-bit ARM Thumb processor core. The bandwidth inherent in a 32-
bit processor is more than adequate for most tasks required by hand-held systems. The
key to making this bandwidth available for portable systems is to minimize power
consumption.
The ARM7TDMI core is a market-leader in MIPS/Watt. Its advanced RISC architec-
ture gives it a minimal yet highly efficient instruction set. This allows for a simple
structure and small core size. In particular the instruction decode mechanism is highly
compact and implemented in standard low-power logic. This architectural approach min-
imizes both the number of power-consuming elements, and the power consumption per
element.
Figure 1. The power saving modules of the AT91R40807 architecture
The dual-bus structure surrounding the ARM core carries this concept to its peripherals.
The ASB system bus is designed for maximum data throughput between the core and
ARM7TDMI Core
Embedded
ICE
Reset
EBI: External Bus Interface
RAM
136K bytes
ASB
Controller
Clock
AIC: Advanced
Interrupt Controller
AMBA Bridge
EBI User
Interface
TC: Timer
Counter
TC0
TC1
TC2
USART0
USART1
2 PDC
Channels
2 PDC
Channels
PIO: Parallel I/O Controller
PS: Power Saving
Chip ID
APB
ASB
P
I
O
P
I
O
NRST
D0-D15
A1-A19
A0/NLB
NRD/NOE
NWR0/NWE
NWR1/NUB
NWAIT
NCS0
NCS1
P26/NCS2
P27/NCS3
P28/A20/CS7
P29/A21/CS6
P30/A22/CS5
P31/A23/CS4
P0/TCLK0
P3/TCLK1
P6/TCLK2
P1/TIOA0
P2/TIOB0
P4/TIOA1
P5/TIOB1
P7/TIOA2
P8/TIOB2
NWDOVF
TMS
TDO
TDI
TCK
MCKI
P25/MCKO
P12/FIQ
P9/IRQ0
P10/IRQ1
P11/IRQ2
P13/SCK0
P14/TXD0
P15/RXD0
P20/SCK1
P21/TXD1/NTRI
P22/RXD1
P16
P17
P18
P19
P23
P24/BMS
Modules designed for power saving
WD: Watchdog
Timer
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memory blocks (both on- and off-chip). The AMBA Bridge links this to a lower-speed
APB, which minimizes power consumption in data transfers to and from the peripherals.
The AT91 series surrounds the ARM core with an SRAM workspace, External Bus Inter-
face and a set of general-purpose peripherals. These include an Advanced Interrupt
Controller, USARTs, Timer/Counters, SPI, Watchdog Timer, Real Time Clock, etc. Fig-
ure 1 shows the peripherals for the entry-level AT91R40807. The modular design
enables power consumption to be minimized in every aspect of the operation of the
device, under all scenarios of use.
Fully Static Operation All AT91 devices are fully static, driven by a single system clock. The operational power
consumption is proportional to the clock frequency. Power can be saved at device level
by stopping the clock externally, or running it at the slowest rate required to complete a
task in the time interval available. A common practice is to accomplish each task at full
clock speed, and then stop the clock until the device is next required. With the external
clock disabled, an AT91 device consumes between 30 and 60 µA.
Low Voltage
Operation
The AT91 devices normally operate at 3.3V, but they can be powered down to 1.8V and
still deliver the performance required for most power-sensitive applications. The I/Os
continue to operate at 3.3V all internal level shifting is transparent to the environment
of the system. This gives a power saving of around 35%.
Power-saving SRAM The large on-chip SRAM (up to 136K bytes in the case of the AT91R40807) significantly
reduces system power consumption compared with a two-ship solution. For example,
an AT91M40800 operating at 40 MHz with an external 12 ns SRAM consumes 120 mA.
The AT91R40807 under the same conditions consumes only 50 mA.
Power Reduction
during Interrupts and
Data Transfer
Two architectural features play significant roles in reducing power consumption during
operation: the Advanced Interrupt Controller and the Peripheral Data Controller chan-
nels associated with the on-chip peripherals.
The 8-level priority Advanced Interrupt Controller intercepts all internal and external
interrupt requests, prioritizes them, associates them with the corresponding interrupt
vector and passes them to the core when they are scheduled for handling. It reduces the
number of core instructions required to reach the interrupt handler to only one. In real-
time interrupt driven systems (the majority of hand-held devices are in this category) this
represents a major saving of processor cycles, and hence of power.
The integral Peripheral Data Controller provides a direct memory access (DMA) function
between on-chip peripherals such as the USART, SPI or DAC and the system memory
(on- or off-chip). The PDC does not use any processor resources, allowing the proces-
sor to be put into idle mode during data transfers. With a capacity of up to 64K
contiguous bytes from the same start address, it significantly reduces power consump-
tion during data transfer.
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The Way Ahead –
Enable Logic and
Self-timed Power-
down
The programmable Power Management Module features enable logic for each periph-
eral (as well as for the core). See Figure 2. This permits the application developer to
switch off the clock to each peripheral device, and to the core, when it is not in use. The
core is re-activated by an enabled interrupt, and resumes operation after only a few
clock cycles. Only the elements required for each activity are consuming power at any
given instant. This minimizes power consumption during operation with very little pro-
gramming effort and no intervention on the external clock source. Power consumption is
reduced to between 150 and 250 µA when all internal clocks are off.
Figure 2. AT91 Power Management Enable Logic
Power
Management
Enable
Logic
ARM7TDMI Core
SPI
USARTs
Counter/Timers
Parallel I/O
Watchdog Timer
Reset
MCKI
Internal
Clocks
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The AT91M55800A has a Real Time Clock with an independent battery power supply
that provides shut-down and wake-up logic for the system power source. This permits
the AT91 (apart from the RTC) to be powered down under program control, and awak-
ened either by an external source such as a push-button or radio receiver, or by an
alarm set in the RTC. See Figure 3. Only the RTC is active in shut-down mode, which
may be for extended periods of time. This gives power consumption of just a few µA in
shut-down mode.
Figure 3. AT91 Real Time Clock Shut-down/Wake-up System
Towards System
Level Integration
Atmels AT91 series of standard products aim to provide an off-the-shelf solution to
immediate requirements for low-power, high-performance microcontrollers. They are
also an element in Atmels corporate strategy of system level integration. The constitu-
ent modules of an AT91 device can be incorporated into an application-specific or
customer-specific system-on-chip. This can include whatever peripherals are required,
plus on-chip memory (Atmel is an industry leader in NVM), DSP cores, analog interfaces
and application-specific IP. The power saving features of the AT91 are all made avail-
able to the system-on-chip.
SLI gives the ultimate in power reduction the entire device is implemented in a single
IC. This minimizes silicon area, eliminates board interconnections and enables total sys-
tem power management to be optimized.
In this way the digital nomad can be equipped with advanced communication and infor-
mation processing devices that are practically invisible, except as fashion accessories.
DC/DC
Switching
Regulator
SHUT-
DOWN
Power
Supply
VDDCORE
VDDIO
GND
AT91
VDDBU
GND
Battery
SHUTDOWN
WAKEUP
Real Time
Clock
© Atmel Corporation 2001.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Companys standard warranty
which is detailed in Atmels Terms and Conditions located on the Companys web site. The Company assumes no responsibility for any errors
which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does
not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted
by the Company in connection with the sale of Atmel products, expressly or by implication. Atmels products are not authorized for use as critical
components in life support devices or systems.
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1743A04/01/0M
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