39353
The A3935 is designed specifically for automotive applications that
require high-power motors. The A3935 provides six high-current gate drive
outputs capable of driving a wide range of power n-channel MOSFETs.
A requirement of automotive systems is steady operation over a
varying battery input range. The A3935 integrates a pulse frequency
modulated boost converter to create a constant supply voltage for driving
the external MOSFETs. Bo otstrap capacitors are utilized to provide the
above battery supply voltage required for n-channel MOSFETs.
Direct control of each gate output is possible via six TTL-compatible
inputs. A differential amplifier is integrated to allow accurate measurement of
the current in the three-phase bridge.
A diagnostic output can be continuously monitored to protect the
driver from short-to-battery, short-to-supply, bridge-open, and battery
under/overvoltage conditions. Additional protection features include dead-
time, VDD undervoltage, and thermal shutdown.
FEATURES
Drives Wide Range of N-Channel
MOSFETs in 3-Phase Bridges
PFM Boost Converter for Use With
Low-Voltage Battery Supplies
Internal LDO Regulator for Gate-
Driver Supply
Bootstrap Circuits for High-Side Gate
Drivers
Current Monitor Output
Adjustable Battery Overvoltage
Detection.
Diagnostic Outputs
Motor Lead Short-to-Battery,
Short-to-Ground, and Bridge-Open
Protection
Undervoltage Protection
-40°C to 150°C, TJ Operation
Ther mal Shutdown
4
3
2
1
5
12
11
10
9
33
34
35
36
29
32
25
26
27
28
VDSTH
CSP
LSS
GLC
SC
SB
GHB
CB
GLA
CSOUT
OVSET
CSN
VDD
ALO
~ FAULT
BHI
AHI
BLO
ENABLE
A3935KLQ
15
14
13
SA
GHA
CA
18
17
16
VREG
VDRAIN
VBOOST
8
7
6
GHC
CC
GLB
31
30 CLO
CHI
22
23
24
UVFLT
VBAT
OVFLT
19
20
21
BOOSTD
BOOSTS
GND
[44-pin, PLCC pkg. ED also available]
ABSOL UTE MAXIMUM RATINGS
Load Supply Voltages, VBAT, VDRAIN,
VBOOST, BOOSTD……………… 40 V
GHA/GHB/GHC, VGHX …………… -4 to 55 V
SA/SB/SC, VSX ………………... -4 to 40 V
GLA/GLB/GLC, VGLX …………… -4 to 16 V
CSP,CSN, LSS …………………… -4 to 6.5 V
CA/CB/CC, VCX …………… -0.6 to 55 V
Logic Supply Voltage, VDD …… - 0.3 V to 6.5 V
Logic Input/Outputs and OVSET, BOOSTS,
CSOUT, VDSTH ………… -0.3 V to 6.5 V
Package Thermal Impedances (TA = +25°C)
ED pkg:
Θ
JA (JEDEC Hi-K PCB) …... 23
°
C/W
LQ pkg:
Θ
JA (JEDEC Hi-K PCB) …….44
°
C/W
Operatin g Ambient Temperatu r e Range,
TA ……………….. -40 °C to +135 °C
Operatin g Junction Temperature Range,
TJ............................. -40 °C to +150 °C
Stor age Temperature Range,
TS............................ -55 °C to +150 °C
A
DVANCED DATA SHEET –- 8/29/02AUTOMOTIVE POWER-
MOSFET CONTROLLER
3935
Automotive Power-MOSFET Controller
Functional Block Diagram (1 of 3 outputs shown)
VREG
High Side
Driver
Low Side
Driver
Turn ON
Delay
CA
GHA
SA
GLA
LSS
CSN
To Phase B
CBOOT
To Phase C
Turn ON
Delay
RSENSE
VBOOST
VBAT
-
+
Control
Logic
CSP
BOOSTS
BOOSTD
AHI
ALO
BHI
BLO
CHI
CLO
ENABLE
GND
cs
Drain-Source
Fault Monitor
VBAT Overvoltage
VBAT Undervoltage
VREG Undervoltage
Short to Ground
Short to Battery
Bridge Open
VDD Undervoltage
Thermal Shutdown
VDSTH
SA
SB
SC
CSOUTVDRAIN
Low Drop
Out
Linear
Regulator
VREG
OS (off) bi
bv
LSS
VDRAIN
(KELVIN)
OS (blank)
~ FAULT
Motor
Supply
Voltage
UVFLT
OVFLT
OVSET
VDD
Phase A
3935
VBAT VIGN
VBAT
VREG
VDD
VDD
External +5V
3935
Automotive Power-MOSFET Controller
Terminal Descriptions
AHI/BHI/CHI. Dire ct control of high-side ga te outputs
GHA/GHB/GHC. Logic “1 ” drives the gate “on”. Logic ”0”
pulls the gate down, turning off the external power
MOSFET. Internally pulled down when terminal is open.
ALO/BLO/CLO. Direct control of low-side gate outputs
GLA/GLB/GLC. Lo gic “1” drives the gate “on”. Logic ”0”
pulls the gate down, turning off the external power
MOSFET. Internally pulled down when terminal is open.
BOOSTD. Boost converter switch drain connection.
BOOSTS. Boost converter switch source connection
CA/CB/CC. High-side connection for bootstrap capacitor,
positive supply for high-side gate drive. The bootstrap
capacitor is charged to VREG when the output Sx terminal is
Low. When the output swings High, the voltage on this pin
rises with the output to provide the boosted gate voltage
needed for n-channel power MOSFETs.
CSN. Input for current-sense, differential amplifier,
inverting, ne gative side. Kelvin co nnection fo r ground side
of current-sense resistor.
CSOUT. Amplifier output voltage proportional to current
sensed across an external low-value resistor placed in the
ground-side of the power MOSFET bridge.
CSP. Input for current-sense differential amplifier, non-
inverting, positive side. Connected to po sitive side of sense
resistor.
ENABLE. Logic “0” disables the gate control signals and
switches off all the gate drivers “low” causing a “Coast”.
Can be used in conjunction with the gate inputs to PWM the
load current. Internally pulled down when terminal is open.
FAULT\. Diagnostic logic output signal indicates that one
or more fault conditions has occurred, when “Low”.
GHA/GHB/GHC. High-side gate drive outputs for n-ch
MOSFET drivers. External series gate resistors can control
slew rate seen at the power driver gate; thereby, controlling
the di/dt and d v/d t of Sx outputs.
GLA/GLB/GLC. Low-side gate drive outputs for
external, n-channel MOSFET drivers. External series gate
resistors can co ntrol slew rate
GND. Ground or negative side of VDD and VBAT
supplies.
LSS. Low-side gate driver returns. Connects to the
common sources in the low-side of the power MOSFET
bridge.
OVFLT. Logic “1” means that the VBAT exceeded the
VBAT overvoltage trip point set by OVSET level. It will
recover after a hysteresis below that maximum value. Has a
Hi-Z state.
OVSET. A positive, dc level that controls the VBAT
Overvoltage trip point. Usually, provided from precision
resistor divider network between VDD and GND, but can be
held grounded for a preset value. When terminal is open sets
unspecified but high overvoltage trip point.
SA/SB/SC. Directly connected to the motor terminals,
these pins sense the voltages switched across the load and
are connected to the negative side of the bootstrap
capacitors. Also, are the negative supply connection for the
floating, high-side dr ivers.
UVFLT. Logic “1” means that VBAT is below its minimum
value and will recover after a hysteresis ab ove that minimum
value. Has a Hi-Z state. [If UVFLT and OVFLT are both in
Hi-Z state; then, at least, a Thermal shutdown or VDD
Undervoltage has occurred.]
VBAT. Battery voltage, positive input and is usually
connected to the motor voltage supply.
VBOOST. Boost converter output, nominally 16 V, is also
input to regulator for VREG. Has internal boost current and
boost voltage control loops. In high-voltage systems is
approximately one diode drop below VBAT.
VDD. Logic supply, positive side.
VDRAIN. Kelvin connection for d rain-to-source voltage
monitor and is connected to high-side drains of MOSFET
bridge. High Z when pin is open and registers as a short-to-
ground fault on all motor phases.
VDSTH. A positive, dc level that sets the drain-to-source
monitor threshold voltage. Internally pulled down when
terminal is open.
VREG. High-side, gate-driver supply, nominally, 13.5 V.
Has low-voltage dropout (LDO) feature.
3935
Automotive Power-MOSFET Controller
ELECTRICAL CHARACTERISTICS (unless noted; -40°C < Tj < 150°C, 7V < VBAT < 16 V, 4.75V < VDD < 5.25V, ENABLE =
22.5 kHz, 50% Duty cycle, two phases active. (*) or Typ. for design guide, only. Neg. current flows out of designated pin.)
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Power Supply
VDD Supply Current IDD All logic input s = 0 V. 7 mA
VBAT Supply CurrentIBATAll logic inputs = 0 V.3mA
Battery Voltage Operating RangeVBATSee Absolute Maximum Rat i ngs. 7 40 V
IDBOOT = 10 mA 0.8 2 VBootstrap Diode Forward Voltage VDBOOT
IDBOOT = 100 mA 1.5 2.3 V
Bootstrap Diode ResistancerDBOOTrD(100 mA)=[VD (150) -VD (50]/1002.57.5Ω
Bootstrap Diode Current LimitILIM3 V < [VREG – VCX] < 12 V-150-900mA
Bootstrap Quiesc ent Current ICX VCX = 40V, GHx = ON 10 30 uA
Bootstrap Refresh Time * tREFRESHVSX = LOW to guarantee ∆V=+0.5 V refresh of
0.47 uF Boot Cap at Vcx –Vsx = +10 V.2.0us
VREG Output Voltage 1VREGVBAT=7 V to 40 V, Vboost from Boost Reg.12.714V
VREG Dropout Voltage
2
V
REGDO
V
REGDO
= Vboost – Vreg, Ireg = 40 mA-0.9-V
Gate Drive Avg. Supply Current *IREGNo external dc load at Vreg. Creg=10 uF.40mA
VREG Input Bias Current IREGBIAS Current into VBOOST, ENABLE = 0. 4mA
Boost Supply
VBOOST Output Voltage LimitVBOOSTLIMVBAT = 7 V14.916.3V
VBOOST Output Volt. Limit Hys teresis VHYST 35 180 mV
Boost Switch ONrDS(on) IBOOSTD < 300 mA.1.4 3.3 Ω
Max. Boost Switc h Current IBOOST_SW 300 mA
Boost Current Lim i t Threshold Volt . VBI Increasing VBOOSTS 0.45 0.55 V
OFF Time tOFF 38uS
Blanking Ti me tBLANK 100 220 nS
Footnotes: 1) For Vboostlim < Vboost < 40 V power dissipation in the Vreg LDO increases. Observe Tj < 150°C limit.
2) With Vboost decreasing Dropout Voltage measured at VREG = VREGref – 200 mV where VREGref = VREG at
Vboost= 16 V.
3935
Automotive Power-MOSFET Controller
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Control Logic
VIN (1) Minimum high level i nput for logical “one”. 2.0 – – VLogic Input Voltages
VIN (0)Maximum low level input for logical “zero”.––.8V
IIN (1) VIN = VDD – 500 µALogic Input Currents
IIN (0) VIN = 0.8 V 50 µA
Input Hys teresis Vhys 100 200 mV
Logic Output HIGH Voltage VohIoh = - 800 uAVDD -.8V
Logic Output LOW Voltage Vol Iol = 1.6 mA .4 V
Gate Drives, GHx, GLx ( internal SOURCE or upper switch stages)
GHx: IxU = -10 mA , Vsx=0 VREG – 2.26 VREG VOutput HIGH Volt age VDSL(HI)
GLx: IxU = -10 mA, Vlss=0 VREG – 0.26 VREG V
VSDU = 10 V, Tj = 25 °C 800 mA Source Current (pul sed) IxU
VSDU = 10 V, Tj = 135 °C 400 mA
IxU = -150 mA , Tj = 25 °C410ΩSource ON ResistancerSDU(on)
IxU = -150 mA , Tj = 135 °C715Ω
Gate Drives, GHx, GLx ( internal SINK or lower switch stages)
VDSL = 10 V, Tj = 25 °C 850 mASink Current (pul sed) IxL
VDSL = 10 V, Tj = 135 °C 550 mA
IxL = +150 mA, Tj = 25 °C1.86.0ΩSink ON ResistancerDSL(on)
IxL = +150 mA, Tj = 135 °C3.07.5Ω
Gate Drives, GHx, GLx (General)
Propagation Delay,
Logic only
tPROPLogic input to
unloaded
GHx, GLx150nS
Prop Delay Dif ferences tPROP Grouped by edge, phase-to-phase. 50 nS
Dead Time (S hoot-through Prevent i on) tDEAD Between GHx, GLx transiti ons of same phase 75 180 nS
Notes: For
GHX: VSDU = VCX – VGHX .For
GLX: VSDU = VREG – VGLX .
VDSL = VGHX – VSX .V
DSL = VGLX – VLSS .
VDSL(HI) = VCX – VSDU – VSX .VDSL(HI) = VREG – VSDU – VLSS .
3935
Automotive Power-MOSFET Controller
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Sense Amplifier
Input Bi as Current IBIAS CSP=CSN=0 V. -360 -180 uA
Input Offset Current IOS CS P = CS N=0 V. -35 35 uA
CSP with respect to gnd. 80 kΩInput Impedance * RIN
CSN with respect to gnd. 4 kΩ
Diff. Input Operating Voltage * VID VID = CSP – CSN. -1.3V < CS P,N < 4V. 200 mV
Output Offset V ol tage VOSOUT CSP=CSN=0V 77 250 450 mV
Output Offset V ol tage Drift * VOSOUT CSP=CSN=0V 100 uV/°C
Input Common Mode Oper. Range * VCM CSP = CSN -1.5 4 V
Voltage GainAVVID = 40 mV to 200 mV18.619.219.8V/V
Low Output Voltage ErrorVerrVid = 0 to 40 mV, Vout = 19.2*Vid + Vos + Verr-25+25mV
DC Common Mode GainACMCSP = CSN = +200 mV-28dB
Output Impedance * ROUT VCSOUT = 2.0 V 8 Ω
Output Dynamic RangeVCSOUTICSOUT = -100 uA at top rail, 100 uA at bottom
rail. 0.075 VDD -
.25 V
Output Current, Sink ISINK VCSOUT = 2.5 V 20 mA
Output Current, Source ISOURCE VCSOUT = 2.5 V -1 mA
VDD Supply Rippl e Gain PSRG CSP=CSN=GND. Freq = 0 to 1 MHz -20 dB
VREG Suppl y Ri ppl e Gai n PSRG CSP=CS N=GND. Freq = 0 to 300 kHz -45 dB
Small Signal 3-dB Bandwidth ( * )B10 mv input1.6MHz
AC Common-Mode GainAcmVcm = 250 mV/pp, Freq = 0 to 800 kHz-26dB
| Output Slew Rate |SR200 mV step input. Meas. 10/90 % points.10V/us
3935
Automotive Power-MOSFET Controller
Characteristics Symbol Test Conditions Min. Typ. Max. Units
Fault Logic
VDD Under-voltage VUVDD Dec reasing VDD 3.8 4.3 V
VDD Under-voltage Hysteresi s VHYSDD VUVDD_RECOVERY = VUVDD + VHYSDD 100 300 mV
OVSET Operating Voltage Range * VOVSET 0V
DD V
OVSET Calibrated Voltage Range VOVSET 02.5V
OVSET Input Current Range IOVSET -1 +1 uA
VBAT Over-voltage RangeVOVBAT0 V < VOVSET < 2.5 19.440V
VBAT Over-voltageVOVBATIncreasing VBAT , VOVSET = 0 v19.422.425.4V
VBAT Over-voltage Hysteresis VHYSOVBAT Percent of V OVBAT value s et by VOVSET 915%
VBAT Over-voltage Gain Constant * KOVBAT VOVBAT = ( KOVBAT ∗VOVSET ) + VOVBAT [0] 12 V/V
VBAT Under-voltage VUVBAT Decreasing VBAT 5 5.25 5.5 V
VBAT Under-voltage Hysteresis VHYSUVBAT Percent of V UVBAT 812%
VREG Under-voltage VUVREG Decreasing VREG 9.9 11.1 V
VDSTH I nput Range * VDSTH 0.5 3 V
VDSTH Input CurrentIDSTHVDSTH > 0.8 V40 100 uA
Short-to-Ground Threshold VSTG Wit h a Hi gh-side driver “on”, as VSX decreases,
VDRAIN - VSX > VSTG caus es a fault . VDSTH
-0..3 VDSTH
+ 0.2 V
Short-to-Battery Threshold VSTB With a Low-side driver “on”, as VSX increas es,
VSX - VLSS > VSTB causes a fault. VDSTH
-0.3 VDSTH
+ 0.2 V
VDRAIN /Open Bri dge Operating
Range VDRAIN7 V < VBAT < 40 V-0.3VBAT+
2V
VDRAIN /Open Bridge Leakage Curr.I (VDRAIN)7 V < VBAT < 40 V.01.0mA
VDRAIN /Open Bri dge Threshold Volt . VBDGOTH If VDRAIN < VBDGOTH then a Bridge fault oc c urs. 1 3 V
Thermal S hut down Tem p. * TJ160 170 180 °C
Thermal Shutdown Hysteresi s * ∆TJ71013°C
3935
Automotive Power-MOSFET Controller
Functional Description
Motor Lead Protecti on. A fault detection circuit
monitors the voltage across the drain to source of the
external MOSFETs. A fault is asserted “Low” on the output
pin, FAULT\, if the voltage across the drain-to-source of
any MOSFET that is instructed to turn on is greater than the
voltage applied to the VDSTH input terminal. When a high-
side switch is turned on, the voltage from pin VDRAIN to the
appropriate motor phase output, VSX, is examined. If the
motor lead is shorted to ground before the high side is turned
on, the measured voltage will exceed the threshold and the
FAULT\ pin will be go “Low”. Similarly, when a low-side
MOSFET is turned o n, the differential voltage between the
motor phase (drain) and the LSS pin (source) is monitored.
The VDSTH voltage is set by a resistor divider to VDD.
Pin VDRAIN is intended to b e a Kelvin connection for the
high-side, drain-source monito r circ uit. Voltage drops acr oss
the power bus are eliminated by connecting a private PCB
trace from the VDRAIN pin to the drain of the MOSFET
bridge. This allows improved accuracy in setting the VDSTH
threshol d voltage . The low-side, drain-sourc e monitor uses
the LSS pin, rather than VDRAIN pin, in comparing against the
VDSTH voltage.
The A3935 merely reports these motor faults.
Fault Out put s. Transient faults on any of the fault
outputs are to be expected during switching and will not
disable the gate drive o utputs. External circuitry or contro ller
logic must determine if the faults represent a hazardous
condition.
FAULT\. The FAULT\ terminal will go active “Low” when
any of the following conditions occur:
VBAT Overvoltage
VBAT Undervoltage
VREG Undervoltage
Motor Lead Short-to-Ground
Motor Lead Short-to-Supply (or Battery).
Bridge (or VDRAIN) Open
VDD Undervoltage
Ther mal Shutdown
OVFLT. Asserts “High” when a VBAT Overvoltage fault
occurs and resets after a recovery hysteresis. It has a Hi-Z
state when a thermal shutdown or VDD undervoltage
occurs. The voltage at the OVSET pin, VOVSET, controls the
VBAT overvoltage set point VOVBAT, i.e.,
VOVBAT = ( KOVBAT ∗ VOVSET ) + VOVBAT[0],
where KOVBAT is the gain and VOVBAT[0] is the value of
VOVBAT when VOVSET is zero. For valid formula, all variables
must be in range and below maximum operating spec.
UVFLT. Asserts “High” when a V BAT undervoltage fault
occurs and resets after a recovery hysteresis. It has a Hi-Z
state when a thermal shutdown or VDD undervoltage
occurs. OVFLT and UVFLT are mutually exclusive by
definition.
Current Sensing. A current sense amplifier is provided
to allow system monitoring of the load current. The
differential amplifier inputs are intended to be Kelvin
connec t ed across a low-value sense resistor or c urrent shunt.
The output vo ltage is represented by:
VCSOUT = ( ILOAD ∗ AV ∗ RSENSE ) + VOS
Where VOS is output voltage calibrated at zero load current
and AV = diff amp gain of about 19.
Shutdown. If a fault occurs because of excessive
junction temperature or undervoltage on VDD or VBAT, all
gate driver outputs are d riven “Low” until the fault condition
is removed. In addition, the boost supply switch and the
VREG are turned “off” until those undervoltages and
junction temperatures recover.
Boost Supply. The VBOOST voltage is controlled by an
inner current-control loop, and by an outer voltage-feedback
loop. The current-control loop turns “off” the boost switch
for 5 us whenever the voltage across the boost current-sense
resistor exceeds 500 mV. A diode reverse-recovery current
flows through the sense resistor whenever the boost switch
turns “on” that could turn it “off”, again, if not for the
“blanking time” circuit. Adjustment of this external sense
resistor determines the maximum current in the inductor.
Whenever VBOOST exceeds the predefined threshold,
nominally 16 V, the boost switch is inhibited.
3935
Automotive Power-MOSFET Controller
Input Logic.
Enable (x)LO (x)HI GL(x) GH(x) Mode of Operation
0XX00All gate-drive outputs Low
10000All gate drive outputs Low
10101High Side On
11010Low Side On
11100XOR feature prevents shoot-through.
Fault Responses.
FAULT MODEENABLEFA ULT\ OVFLT UVFLT BOOST
REG. VREG REG.GHXGLX
No Fault X 1 0 0 ON ON - -
Short-to-Battery 1* 0 0 0 ON ON - -
Short-to-Ground1*000ONON--
VREG UndervoltageX000ON ON - -
VDD Undervoltage or
Thermal Shutdown !X0ZZOFFOFF00
Bridge (VDRAIN) Fault 1* 0 0 0 ON ON - -
VBAT OvervoltageX010 OFF* ON - -
VBAT Undervoltage !X001 O FF OFF 0 0
Notes: OFF* = Off, only because VBOOST ~ VBAT is above the voltage threshold of the regulator’s voltage control loop.
x = “little x ”indicates A, B, or C phase.
X = “Capital X “ indicates a “don’t care”.
- = Depends on (x)LO, (x)HI inputs and ENABLE.
Z = Tri-stated output.
1* = Short-to-Battery can only be detected when the corresponding GLX = 1. Similarly, Short-to-Ground can only be
detected when the corresponding GHX = 1. Bridge Fault appears as a Short-to-Ground Fault on all motor phases.
These faults are not detected when ENABLE = 0
! = These Faults are not only reported but action is taken by the internal logic to protect the 3935 and the system.
3935
Automotive Power-MOSFET Controller
Terminal List
LQ pin # Pin Name Pin Description
ED pin #
1CSPCurrent-sense input, positive-side31
2VDSTHDC Input, Drain-to-Source Monitor Threshold Voltage32
3LSSLow-Side, Gate Drive Source returns33
4GLCLow-Side C Gate Drive Output36
5SCMotor Phase C Input37
6GHCHigh-Side C Gate Drive Output38
7CCBootstrap C Cap39
8GLBLow-Side B Gate Drive Output40
9SBMotor Phase B Input41
10GHBHigh-Side B Gate Drive Output42
11CBBootstrap B Cap43
12GLALow-Side A Gate Drive Output44
13SAMotor Phase A Input3
14GHAHigh-Side A Gate Drive Output4
15CABootstrap A Cap5
16VREGGate Drive Supply, Positive6
17VDRAINKelvin Connection to MOSFET High-Side Drain 7
18VBOOSTBoost Supply Output8
19BOOSTSBoost Switch, Source9
20BOOSTDBoost Switch, Drain10
21GNDGround , DC Supply Returns, Negative12
22VBATBattery Supply Connection, Positive13
23UVFLTVBAT Undervoltage Fault14
24OVFLTVBAT Overvoltage Fault15
25FAULT\ Fault Output, Primary16
26ALOGate Control Signal, A, Low-Side17
27AHIGate Control Signal, A, High-Side18
28BHIGate Control Signal, B, High-Side19
29BLOGate Control Signal, B, Low-Side20
30CLOGate Control Signal, C, Low-Side21
31CHIGate Control Signal, C, High-Side24
32ENABLEGate Output Enable25
33OVSETDC Input, Overvoltage Threshold Setting for VBAT26
-
TPTest Point for manufacturing test use, only.
27
34CSOUTCurrent-Sense Amplifier Output28
35VDDLogic Supply, Positive29
36CSNCurrent-Sense Input, Negative-Side30
-
GNDGROUND, DC Supply Returns, Negative. Heat Path,
Die Attach, Connected to Chip GND at Terminal 12.
1,2,11,12,22,
23,34,35
