1. Product profile
1.1 General description
Fivefold ElectroStatic Discharge (ESD) protection diode arrays in a SOT457 (SC-74) small
Surface-Mounted Device (SMD) plastic package designed to protect up to five signal lines
from the damage caused by ESD and other transients.
1.2 Features
1.3 Applications
1.4 Quick reference data
PESDxS5UD series
Fivefold ESD protection diode arrays
Rev. 02 — 7 December 2006 Product data sheet
nESD protection of up to five lines nESD protection up to 30 kV
nMax. peak pulse power: PPP = 200 W nIEC 61000-4-2; level 4 (ESD)
nUltra low leakage current: IRM =50pA nIEC 61000-4-5 (surge); IPP up to 20 A
nLow clamping voltage: VCL =12V at
IPP =20A
nComputers and peripherals nCommunication systems
nAudio and video equipment nPortable electronics
nCellular handsets and accessories nSubscriber Identity Module (SIM) card
protection
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage
PESD3V3S5UD - - 3.3 V
PESD5V0S5UD - - 5 V
PESD12VS5UD - - 12 V
PESD15VS5UD - - 15 V
PESD24VS5UD - - 24 V
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 2 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
2. Pinning information
3. Ordering information
4. Marking
Cddiode capacitance f = 1 MHz; VR=0V
PESD3V3S5UD - 215 300 pF
PESD5V0S5UD - 165 220 pF
PESD12VS5UD - 73 100 pF
PESD15VS5UD - 60 90 pF
PESD24VS5UD - 45 70 pF
Table 1. Quick reference data
…continued
Symbol Parameter Conditions Min Typ Max Unit
Table 2. Pinning
Pin Description Simplified outline Symbol
1 cathode 1
2 common anode
3 cathode 2
4 cathode 3
5 cathode 4
6 cathode 5
132
4
56 61
52
43
006aaa159
Table 3. Ordering information
Type number Package
Name Description Version
PESD3V3S5UD SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
PESD5V0S5UD
PESD12VS5UD
PESD15VS5UD
PESD24VS5UD
Table 4. Marking codes
Type number Marking code
PESD3V3S5UD E1
PESD5V0S5UD E2
PESD12VS5UD E3
PESD15VS5UD E4
PESD24VS5UD E5
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 3 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
5. Limiting values
[1] Non-repetitive current pulse 8/20 µs exponential decay waveform according to IEC 61000-4-5.
[2] Measured from pin 1, 3, 4, 5 or 6 to 2.
[1] Device stressed with ten non-repetitive ESD pulses.
[2] Measured from pin 1, 3, 4, 5 or 6 to 2.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per diode
PPP peak pulse power tp= 8/20 µs[1][2] - 200 W
IPP peak pulse current tp= 8/20 µs[1][2]
PESD3V3S5UD - 20 A
PESD5V0S5UD - 20 A
PESD12VS5UD - 10 A
PESD15VS5UD - 6 A
PESD24VS5UD - 4 A
Per device
Tjjunction temperature - 150 °C
Tamb ambient temperature 65 +150 °C
Tstg storage temperature 65 +150 °C
Table 6. ESD maximum ratings
Symbol Parameter Conditions Min Max Unit
Per diode
VESD electrostatic discharge voltage IEC 61000-4-2
(contact discharge) [1][2]
PESD3V3S5UD - 30 kV
PESD5V0S5UD - 30 kV
PESD12VS5UD - 30 kV
PESD15VS5UD - 30 kV
PESD24VS5UD - 23 kV
PESDxS5UD series MIL-STD-883 (human
body model) -10kV
Table 7. ESD standards compliance
Standard Conditions
Per diode
IEC 61000-4-2; level 4 (ESD) > 15 kV (air); > 8 kV (contact)
MIL-STD-883; class 3 (human body model) > 10 kV
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 4 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
6. Characteristics
Fig 1. 8/20 µs pulse waveform according to
IEC 61000-4-5 Fig 2. ESD pulse waveform according to
IEC 61000-4-2
t (µs)
0403010 20
001aaa630
40
80
120
IPP
(%)
0
et
100 % IPP; 8 µs
50 % IPP; 20 µs
001aaa631
IPP
100 %
90 %
t
30 ns 60 ns
10 %
tr = 0.7 ns to 1 ns
Table 8. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage
PESD3V3S5UD - - 3.3 V
PESD5V0S5UD - - 5 V
PESD12VS5UD - - 12 V
PESD15VS5UD - - 15 V
PESD24VS5UD - - 24 V
IRM reverse leakage current
PESD3V3S5UD VRWM = 3.3 V - 300 800 nA
PESD5V0S5UD VRWM = 5 V - 80 200 nA
PESD12VS5UD VRWM = 12 V - 0.05 15 nA
PESD15VS5UD VRWM = 15 V - 0.05 15 nA
PESD24VS5UD VRWM = 24 V - 0.05 15 nA
VBR breakdown voltage IR=1mA
PESD3V3S5UD 5.3 5.6 5.9 V
PESD5V0S5UD 6.4 6.8 7.2 V
PESD12VS5UD 12.5 14.5 16 V
PESD15VS5UD 17 18 19 V
PESD24VS5UD 25.5 27 29 V
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 5 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
[1] Non-repetitive current pulse 8/20 µs exponential decay waveform according to IEC 61000-4-5.
[2] Measured from pin 1, 3, 4, 5 or 6 to 2.
Cddiode capacitance f = 1 MHz; VR=0V
PESD3V3S5UD - 215 300 pF
PESD5V0S5UD - 165 220 pF
PESD12VS5UD - 73 100 pF
PESD15VS5UD - 60 90 pF
PESD24VS5UD - 45 70 pF
VCL clamping voltage [1][2]
PESD3V3S5UD IPP =1A --8V
IPP =20A --12V
PESD5V0S5UD IPP =1A --8V
IPP =20A --13V
PESD12VS5UD IPP =1A --17V
IPP =10A --24V
PESD15VS5UD IPP =1A --22V
IPP =6A --33V
PESD24VS5UD IPP =1A --33V
IPP =4A --52V
rdif differential resistance IR=5mA --25
Table 8. Characteristics
…continued
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Tamb =25°C
Fig 3. Peak pulse power as a function of exponential
pulse duration; typical values Fig 4. Relative variation of peak pulse power as a
function of junction temperature; typical values
006aaa698
tp (µs)
110
4
103
10 102
10
102
103
104
PPP
(W)
1
Tj (°C)
0 20015050 100
001aaa633
0.4
0.8
1.2
PPP
0
PPP(25°C)
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 6 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
f = 1 MHz; Tamb =25°C
(1) PESD3V3S5UD
(2) PESD5V0S5UD
f = 1 MHz; Tamb =25°C
(1) PESD12VS5UD
(2) PESD15VS5UD
(3) PESD24VS5UD
Fig 5. Diode capacitance as a function of reverse
voltage; typical values Fig 6. Diode capacitance as a function of reverse
voltage; typical values
PESD3V3S5UD; PESD5V0S5UD
IR is less than 5 nA at 150 °C for:
PESD12VS5UD; PESD15VS5UD; PESD24VS5UD
Fig 7. Relative variation of reverse leakage current as
a function of junction temperature; typical
values
Fig 8. V-I characteristics for a unidirectional ESD
protection diode
VR (V)
054231
006aaa700
140
100
180
220
Cd
(pF)
60
(1)
(2)
VR (V)
0252010 155
006aaa701
40
20
60
80
Cd
(pF)
0
(1)
(2)
(3)
006aaa699
1
10
101
Tj (°C)
100 15010005050
IRM
IRM(25°C)
006aaa407
VCL VBR VRWM IRM
IR
IPP
V
I
P-N
+
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 7 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
Fig 9. ESD clamping test setup and waveforms
006aaa702
50
Rd
Cs
DUT
(DEVICE
UNDER
TEST)
GND
GND
450 RG 223/U
50 coax
ESD TESTER
IEC 61000-4-2 network
Cs = 150 pF; Rd = 330
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
GND
GND
GND
GND
GND
GND PESD3V3S5UD
PESD5V0S5UD
PESD12VS5UD
PESD15VS5UD
PESD24VS5UD
unclamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
unclamped 1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped 1 kV ESD voltage waveform
(IEC 61000-4-2 network)
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 20 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 10 V/div
horizontal scale = 50 ns/div
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 8 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
7. Application information
The PESDxS5UD series is designed for the protection of up to five unidirectional data
lines from the damage caused by ESD and surge pulses. The PESDxS5UD series may be
used on lines where the signal polarities are both, positive and negative with respect to
ground. The PESDxS5UD series provides a surge capability of 200 W per line for an
8/20 µs waveform.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESDxS5UD as close to the input terminal or connector as possible.
2. The path length between the PESDxS5UD and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
Fig 10. Application diagram
6
5
4
1
2
3
006aaa019
PESDxS5UD
high-speed
data lines
unidirectional protection of 5 lines
6
5
4
1
2
3
PESDxS5UD
bidirectional protection of 4 lines
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 9 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
8. Package outline
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
[2] T1: normal taping
[3] T2: reverse taping
Fig 11. Package outline SOT457 (SC-74)
04-11-08Dimensions in mm
3.0
2.5 1.7
1.3
3.1
2.7
pin 1 index
1.9
0.26
0.10
0.40
0.25
0.95
1.1
0.9
0.6
0.2
132
4
56
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 10000
PESD3V3S5UD SOT457 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165
PESD5V0S5UD SOT457 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165
PESD12VS5UD SOT457 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165
PESD15VS5UD SOT457 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165
PESD24VS5UD SOT457 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 10 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
10. Soldering
Dimensions in mm
Fig 12. Reflow soldering footprint SOT457 (SC-74)
Dimensions in mm
Fig 13. Wave soldering footprint SOT457 (SC-74)
solder lands
solder resist
occupied area
solder paste
0.95
2.825 0.45 0.55
1.60
1.95
3.45
1.70
3.10
3.20
3.30
msc422
1.40
4.30
5.30
0.45
msc423
1.45 4.45
5.05
solder lands
solder resist
occupied area
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 11 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
11. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PESDXS5UD_SER_2 20061207 Product data sheet - PESDXS5UD_SER_1
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Table 2 “Pinning”: symbol drawing amended
Table 5 “Limiting values”: amended
Table 6 “ESD maximum ratings”: amended
Table 7 “ESD standards compliance”: amended
Table 8 “Characteristics”: VBR minimum and maximum values for PESD15VS5UD adapted
Figure 7: figure notes adapted
Section 10 “Soldering”: added
PESDXS5UD_SER_1 20060404 Product data sheet - -
PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 12 of 13
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PESDxS5UD series
Fivefold ESD protection diode arrays
© NXP B.V. 2006. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 December 2006
Document identifier: PESDXS5UD_SER_2
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Application information. . . . . . . . . . . . . . . . . . . 8
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Packing information. . . . . . . . . . . . . . . . . . . . . . 9
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Contact information. . . . . . . . . . . . . . . . . . . . . 12
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13